Reviewed-by: Sean Rhodes
On Sat, 1 Apr 2023 at 00:58, Benjamin Doron
wrote:
> MemoryType information assists GCD with defragmenting the memory map.
> When the DXE core starts, GCD adds memory descriptors for the resource
> descriptors HOBs. This allocates heap space which can be reused later
>
Reviewed-by: Sean Rhodes
On Sat, 1 Apr 2023 at 00:58, Benjamin Doron
wrote:
> Copied values from OVMF, these are sufficient for a debug build.
>
> Now that those are improved, remove
> PcdResetOnMemoryTypeInformationChange override. If the memory map must
> change, reset system so that an S4 re
PR created at https://github.com/tianocore/edk2/pull/4231
On Mon, 3 Apr 2023 at 08:32, Sean Rhodes wrote:
> Reviewed-by: Sean Rhodes
>
> On Sat, 1 Apr 2023 at 00:58, Benjamin Doron
> wrote:
>
>> Copied values from OVMF, these are sufficient for a debug build.
>>
>> Now that those are improved,
On Sun, 2 Apr 2023 at 20:23, Kinney, Michael D
wrote:
>
> Hi Gerd,
>
> I have investigated this failure with enabling -smp 4. I think this is an
> important feature that should be on by default.
>
Agreed. And given your investigation below (thanks!), we should be
able to revert the revert as lon
Cc to Chao Li who is maintainer of edk2 about LoongArch support.
Hi Chao,
Fedora38 is used to build edk2 binary in qemu CI, cross gcc-12 is
integrated on Fedora38. There is one issue when gcc-12 is used to
build edk2 loongarch like this:
> ... but when trying to use them to compile the loongarch
Currently, in reset vector, pagetable is creating from top to bottom.
It does this way: First a 4K buffer for PML4, then a 4K buffer for
Page-directory pointer table, at last multiples 4K buffers for
Page-Directory. The PML4 have loweset address.
It works. However, if we change it to creating from
Use a macro USE_5_LEVEL_PAGE_TABLE to determine whether to create
5 level page table. Whether creating it or not, the highest level
page table address is fixed.
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Gerd Hoffmann
Cc: Debkumar De
Cc: Catharine West
Signed-off-by: Zhiguang Liu
---
...
Hi Bibo,
Thanks for Cc to me.
Hi Gerd,
This problem is because the gcc-12 does not yet to support the option
'mno-explicit-reloc', this option is used to open the new reloaction
type for LoongArch, this new feature is very important for LoongArch,
because it can reduce the binary size and i
On 03/04/2023 11:13, Chao Li wrote:
This problem is because the gcc-12 does not yet to support the option
'mno-explicit-reloc', this option is used to open the new reloaction
type for LoongArch, this new feature is very important for LoongArch,
because it can reduce the binary size and improve
On Mon, Apr 03, 2023 at 10:21:27AM +0200, Ard Biesheuvel wrote:
> On Sun, 2 Apr 2023 at 20:23, Kinney, Michael D
> wrote:
> >
> > Hi Gerd,
> >
> > I have investigated this failure with enabling -smp 4. I think this is an
> > important feature that should be on by default.
> >
>
> Agreed. And giv
On Mon, Apr 03, 2023 at 06:13:41PM +0800, Chao Li wrote:
> Hi Bibo,
>
> gcc-13 will support this new feature, so we expect this issue to be resolved
> when using gcc-13, which may be released at this month.
>
> If Fedora38 does not plan to use gcc-13 now, I suggest that CI can download
> a LoongA
On Mon, Apr 03, 2023 at 10:29:52AM +, Michael Brown wrote:
> On 03/04/2023 11:13, Chao Li wrote:
> > This problem is because the gcc-12 does not yet to support the option
> > 'mno-explicit-reloc', this option is used to open the new reloaction
> > type for LoongArch, this new feature is very im
Hi,
> > I agree that the efi variable store is not secure without smm. But after
> > 58eb8517ad7b be introduced, the -D SECURE_BOOT_ENABLE doesn't work
> > with SEV. System just hangs in "NvVarStore FV headers were invalid."
> Hi, Joeyli
> ASSERT is triggered in DEBUG version. In RELEASE version
V4 changes:
Rename MinBoardPkg to AmdMinBoardPkg.
removed empty Guid section.
V3 changes:
Dropped the PlatformPkg package.
Rename BoardPkg to MinBoardPkg
Addressed review comments from Leif and Abner.
Adds AMD/AmdMinBoardPkg to support MinPlatformPkg framework.
PR: https://github.com/ti
Adds initial DEC and DSC file for AmdMinBoardPkg.
This package provides supporting modules for AMD boards to
leverage MinPlatformPkg framework.
Signed-off-by: Abdul Lateef Attar
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Abner Chang
Cc: Michael D Kinney
---
.../AMD/AmdMinBoardPkg/AmdMinBoardPk
Adds SetCacheMtrrLib library for AmdMinBoardPkg,
which sets MTRR values for PEI phase and also
modifies the MTRR value at the end of PEI phase.
Signed-off-by: Abdul Lateef Attar
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Abner Chang
Cc: Michael D Kinney
---
.../AMD/AmdMinBoardPkg/AmdMinBoardPk
From: Abdul Lateef Attar
Adds maintainers for AMD/AmdMinBoardPkg
Signed-off-by: Abdul Lateef Attar
Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Abner Chang
Cc: Michael D Kinney
---
Maintainers.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Maintainers.txt b/Maintainers.txt
index
On Sun, Apr 02, 2023 at 03:50:33PM -0600, Rebecca Cran wrote:
> On 4/2/23 12:38 PM, Pedro Falcato wrote:
> > As expressed off-list on UEFI talkbox, I like GCCNOLTO, but I would
> > rather keep GCC5 as GCC5, for the next future iteration of "lets bump
> > a new toolchain because we need feature X".
On 4/3/23 5:30 AM, Gerd Hoffmann wrote:
I'm wondering what the point in keeping a known-broken toolchain though.
It is apparently unused when nobody noticed the breakage ...
I agree. At this point I want to reach a consensus and get this patch
series committed, even if that means leaving a kno
On Mon, Apr 03, 2023 at 05:33:10AM -0600, Rebecca Cran wrote:
> On 4/3/23 5:30 AM, Gerd Hoffmann wrote:
> > I'm wondering what the point in keeping a known-broken toolchain though.
> > It is apparently unused when nobody noticed the breakage ...
>
> I agree. At this point I want to reach a consens
On Mon, 3 Apr 2023 at 13:39, Gerd Hoffmann wrote:
>
> On Mon, Apr 03, 2023 at 05:33:10AM -0600, Rebecca Cran wrote:
> > On 4/3/23 5:30 AM, Gerd Hoffmann wrote:
> > > I'm wondering what the point in keeping a known-broken toolchain though.
> > > It is apparently unused when nobody noticed the break
On Mon, Apr 03, 2023 at 05:28:14PM +0800, Zhiguang Liu wrote:
> Use a macro USE_5_LEVEL_PAGE_TABLE to determine whether to create
> 5 level page table. Whether creating it or not, the highest level
> page table address is fixed.
Can we create the 5level page table unconditionally?
We should have
On Mon, Apr 03, 2023 at 13:55:19 +0200, Ard Biesheuvel wrote:
> I agree that we should either support a toolchain (and have CI
> coverage for it) or not, in which case we should just remove it.
>
> However, the issues being reported are specific to SEV-SNP and TDX,
> which implies that they are sp
On 4/3/23 6:15 AM, Leif Lindholm wrote:
On Mon, Apr 03, 2023 at 13:55:19 +0200, Ard Biesheuvel wrote:
I agree that we should either support a toolchain (and have CI
coverage for it) or not, in which case we should just remove it.
However, the issues being reported are specific to SEV-SNP and TD
On Mon, 3 Apr 2023 at 14:15, Leif Lindholm wrote:
>
> On Mon, Apr 03, 2023 at 13:55:19 +0200, Ard Biesheuvel wrote:
> > I agree that we should either support a toolchain (and have CI
> > coverage for it) or not, in which case we should just remove it.
> >
> > However, the issues being reported are
Are the same issue(s) found with GCC5 with -b NOOPT?
Mike
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Ard Biesheuvel
> Sent: Monday, April 3, 2023 6:05 AM
> To: devel@edk2.groups.io; quic_llind...@quicinc.com
> Cc: Gerd Hoffmann ; rebe...@bsdio.com; Pedro Falcato
> ;
On Mon, 3 Apr 2023 at 15:27, Kinney, Michael D
wrote:
>
> Are the same issue(s) found with GCC5 with -b NOOPT?
>
None of these are found with NOOPT. Without the optimizer, GCC doesn't
perform the analysis that is needed to figure out which variables are
live (and valid) at which time, so it is no
On Mon, Apr 3, 2023 at 1:27 PM Rebecca Cran wrote:
>
> In terms of CI coverage, I'd like to have both gcc 6 and gcc 12 running
> GCC and GCCNOLTO builds: we've already broken gcc 5 compatibility by
> introducing GoogleTest (which uses nullptr), so by doing builds with gcc
> 6 we'll be able to know
On 4/3/23 7:44 AM, Pedro Falcato wrote:
On Mon, Apr 3, 2023 at 1:27 PM Rebecca Cran wrote:
In terms of CI coverage, I'd like to have both gcc 6 and gcc 12 running
GCC and GCCNOLTO builds: we've already broken gcc 5 compatibility by
introducing GoogleTest (which uses nullptr), so by doing builds
> Given it's catching issues, I'd like to keep it too.
>
> In terms of CI coverage, I'd like to have both gcc 6 and gcc 12 running GCC
> and GCCNOLTO builds: we've already broken gcc 5 compatibility by introducing
> GoogleTest (which uses nullptr), so by doing builds with gcc 6 we'll be able
> to
On 3/31/23 09:35, Tom Lendacky wrote:
On 3/31/23 04:41, Tan, Dun wrote:
Hi Tom,
Reccentlly I sent this patch set to change DxeIpl code to use
CpuPageTableLib to create page table. I have done some test on Intel CPU
to make sure that the page table created by DxeIpl before the change is
the s
On 4/3/23 8:08 AM, Gerd Hoffmann wrote:
So you want gcc-6 specifically or just an older version instead of
latest? I could try add a RHEL-8 container (which ships gcc-8).
I'd want the oldest version that we support, so we know when we add
incompatible code.
From Pedro's reply, it sounds lik
We have a special version of CpuExceptionHandlerLib for XCODE5, whose
linker (LLD) does not permit absolute symbol references in read-only
sections.
Instead of fixing this up at runtime for all toolchains (which is done
by writing the fixed up values to the .text section, which we'd prefer
to avoi
We rely on PIE executables to get the codegen that is suitable for
PE/COFF conversion where the resulting executables can be loaded
anywhere in the address space.
However, ELF linkers may default to disallowing text relocations in PIE
executables, as this would require text segments to be updated
The PEI flavor of CpuExceptionHandlerLib never populates more than 32
IDT vectors, and there is no CET shadow stack support in the PEI phase.
So there is no need to use the generic ExceptionHandler NASM source,
which carries a 256-entry template and CET support, and writes to its
own .text section
Currently, we use the non-Xcode5 version of ExceptionHandlerAsm.nasm
only for the SEC and PEI phases, and this version was not compatible
with the XCODE or LLD linkers, which do not permit absolute relocations
in read-only sections.
Given that SEC and PEI code typically executes in place from flas
The CPU exception handler library code was rewritten at some point to
populate the vector code templates with absolute references at runtime,
given that the XCODE linker does not permit absolute references in
executable code when creating PIE executables.
This is rather unfortunate, as this preven
The generic and XCODE5 versions of this library are now identical, so
drop the special case. The library will be removed entirely in a
subsequent patch.
Signed-off-by: Ard Biesheuvel
Acked-by: Jiewen Yao
---
OvmfPkg/AmdSev/AmdSevX64.dsc | 4
OvmfPkg/CloudHv/CloudHvX64.dsc | 4
O
This library is no longer used or needed, so let's remove it.
Signed-off-by: Ard Biesheuvel
Reviewed-by: Ray Ni
---
UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHandlerLib.inf
| 67
UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHa
Isaac/Nate :
Please let us know whether you received this patch email from Ram. If so,
please review the changes and push it to repo.
Thank you
-Manic
-Original Message-
From: Ramkumar Krishnamoorthi
Sent: Monday, March 27, 2023 7:04 AM
To: devel@edk2.groups.io
Cc: Selvaraj V ; Harikr
[AMD Official Use Only - General]
Hi Sean,
Renamed the AMD/MinBoardPkg to AMD/AmdMinBoardPkg and submitted the V4
version for review.
PR: https://github.com/tianocore/edk2-platforms/pull/75
Thanks
AbduL
-Original Message-
From: Sean Brogan
Sent: 01 April 2023 01:50
To: devel@edk
From: Abner Chang
In part II, we had implemented
- PLDM protocol
- MCTP protocol
- PLDM SMBIOS Transfer protocol
- MCTP manageability transport interface
- Support maximum transfer unit of transport interface
- Add more heler functions
- Add two new fields HeaderSize and TrailerSize in
MANAGEAB
From: Abner Chang
1. Add a helper function to output payload binary
to debug output device.
2. Add a helper function to split payload into
packages according to maximum transfer unit
of transport interface.
3. Add a helper function to generate CRC8.
Signed-off-by: Abner Chang
Cc: Isaac
From: Abner Chang
Update GetTransportCapability to support
Maximum Transfer Unit (MTU) of transport interface.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../Library/ManageabilityTransportLib.h | 31 ++-
.
From: Abner Chang
Fix Uncrustify errors of IPMI protocol
and KCS manageability transport library.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../Library/ManageabilityTransportLib.h | 8 ++--
.../IpmiProtocol/Pei/IpmiPpiI
From: Abner Chang
Add HeaderSize and TrailerSize in
MANAGEABILITY_TRANSFER_TOKEN structure.
Manageability transport interface may used by
multiple protocols which have different header
and trailer of payload. (e.g. MCTP over KCS and
IPMI over KCS).
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc:
From: Abner Chang
PldmProtocolLib provides the library
function to PLDM protocol.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../ManageabilityPkg/ManageabilityPkg.dec | 3 +
.../Include/Dsc/Manageability.dsc |
From: Abner Chang
- Return Maximum Transfer Unit for MCTP over KCS
- Check the parameters
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../Common/ManageabilityTransportKcs.h| 2 +-
.../Common/KcsCommon.c
From: abnchang
Add edk2 driver that supports PLDM SMBIOS Transfer
Specification.
https://www.dmtf.org/sites/default/files/standards/documents/DSP0246_1.0.1.pdf
We currently only support "Push" mode of PLDM SMBIOS
transfer. That says only BIOS to BMC direction is
supported.
The functionality is v
From: abnchang
Add definitions of MCTP manageability transport
interface library.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
Features/ManageabilityPkg/ManageabilityPkg.dec | 16
1 file changed, 16 insertions(+)
From: Abner Chang
MctpProtocol that transmits MCTP message
over manageability transport interface
library.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../Include/Dsc/Manageability.dsc | 1 +
.../MctpProtocol/Dxe/M
From: Abner Chang
Add MCTP manageability transport interface library.
The functionality is verified by checking the binary
debug output of payload.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../ManageabilityPkg/ManageabilityP
From: Abner Chang
PldmProtocol that transmits PLDM message
over manageability transport interface
library.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
---
.../Include/Dsc/Manageability.dsc | 1 +
.../PldmProtocol/Dxe/P
From: abnchang
Add FDF include files for build in ManageabilityPkg
modules to firmware device.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
Cc: Tinh Nguyen
---
.../ManageabilityPkg/Include/PostMemory.fdf | 28 +++
From: abnchang
Add PCDs to control ManageabilityPkg
modules.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
Cc: Tinh Nguyen
---
Features/ManageabilityPkg/ManageabilityPkg.dec | 8
.../Include/Dsc/Manageability.dsc
From: abnchang
Relocate Manageability.dsc to just under \Include
folder.
Signed-off-by: Abner Chang
Cc: Isaac Oram
Cc: Abdul Lateef Attar
Cc: Nickle Wang
Cc: Igor Kulchytskyy
Cc: Tinh Nguyen
---
Features/ManageabilityPkg/Include/{Dsc => }/Manageability.dsc | 0
Features/ManageabilityPkg/M
Reviewed-by: Isaac Oram
I amended the author to match "Ramkumar K ". Please
correct. I am not sure if it is git config or groups.io that is mismatching.
You can do git log and see the delta between author and your signoff.
Thanks for fixing the enum.
Regards,
Isaac
-Original Message--
Pushed as 857a342e50..07f5955bad
-Original Message-
From: devel@edk2.groups.io On Behalf Of Isaac Oram
Sent: Monday, April 3, 2023 8:56 AM
To: Ramkumar Krishnamoorthi ; devel@edk2.groups.io
Cc: Venkatesan, Selvaraj ; DOPPALAPUDI, HARIKRISHNA
; KARPAGAVINAYAGAM, MANICKAVASAKAM
; Ponnusam
Mike, Liming:
Could you review/approve this v2 patch please?
Thanks.
Rebecca Cran
On 3/31/23 7:48 AM, Rebecca Cran wrote:
In order to support building BaseTools using non-default compilers, a
change is being made in the edk2 BaseTools directory to remove the
'BUILD_' prefix to CC, CXX, CFLA
Reviewed-by: Michael D Kinney
> -Original Message-
> From: Rebecca Cran
> Sent: Monday, April 3, 2023 9:11 AM
> To: devel@edk2.groups.io; Barkelew, Bret ; Sean
> Brogan ; Chris
> Fernald ; Feng, Bob C ;
> Kubacki, Michael ;
> Oliver Steffen ; Gao, Liming ;
> Kinney, Michael D
>
> Sub
Turns out my old email was getting sent to a lot of folks spam, so
resending with hopefully a better email...
On 3/27/2023 4:01 AM, Ard Biesheuvel wrote:
The memory attributes table has been extended with a flag that indicates
whether or not the OS is permitted to map the EFI runtime code regio
On 4/3/23 09:24, Tom Lendacky wrote:
On 3/31/23 09:35, Tom Lendacky wrote:
On 3/31/23 04:41, Tan, Dun wrote:
Hi Tom,
Reccentlly I sent this patch set to change DxeIpl code to use
CpuPageTableLib to create page table. I have done some test on Intel
CPU to make sure that the page table created
Hi Ray,
Yes, the step 3 will be redundant after adding the check for microcode already
loaded scenario in earlier point. I will remove it and sent V4 patch.
Thanks,
Chasel
> -Original Message-
> From: Ni, Ray
> Sent: Sunday, April 2, 2023 11:31 PM
> To: devel@edk2.groups.io; Chiu,
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4391
FSP should support the scenario that CPU microcode already loaded
before calling LoadMicrocodeDefault(), in this case it should return
directly without spending more time.
Also the LoadMicrocodeDefault() should only attempt to load one versi
Rebecca,
I have a test PR running that splits up CodeQL analysis
and builds to attempt to balance the execution times.
https://github.com/tianocore/edk2/pull/4233
GitHub Actions CodeQL:
* Max job time ~21 minutes
* Total Action Time ~31 minutes
Azure Pipelines Builds:
* Max job time ~32 minutes
I wonder if it might be possible to get the total time to be under 10
minutes by adding more agents?
--
Rebecca Cran
On 4/3/23 1:42 PM, Kinney, Michael D wrote:
Rebecca,
I have a test PR running that splits up CodeQL analysis
and builds to attempt to balance the execution times.
https://g
Some of the longer execution jobs can be easily broken up into smaller pieces.
20 min may be a more realistic goal no matter how many agents are available.
But would still require a lot of effort to implement caches and rebalance and
tune.
Mike
> -Original Message-
> From: devel@edk2.g
As part of my work on the toolchain definitions, I've come across a
situation where ld.lld fails to align sections correctly, due to it
being invoked via clang with the '-n' option, which causes GenFw to fail
with "Section address not aligned to its own alignment.".
The following messages are
> On 3. Apr 2023, at 22:33, Rebecca Cran wrote:
>
> As part of my work on the toolchain definitions, I've come across a
> situation where ld.lld fails to align sections correctly, due to it being
> invoked via clang with the '-n' option, which causes GenFw to fail with
> "Section address no
On 4/3/23 09:29, Ard Biesheuvel via groups.io wrote:
We have a special version of CpuExceptionHandlerLib for XCODE5, whose
linker (LLD) does not permit absolute symbol references in read-only
sections.
Instead of fixing this up at runtime for all toolchains (which is done
by writing the fixed up
*Reminder: Tools, CI, Code base construction meeting series*
*When:*
Monday, April 3, 2023
4:30pm to 5:30pm
(UTC-07:00) America/Los Angeles
*Where:*
https://github.com/tianocore/edk2/discussions/2614
View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=1753772 )
*Description:*
TianoCo
On 4/3/23 2:58 PM, Marvin Häuser wrote:
That last part is actually not ignoring the use-case, that *is* our use-case.
The terminology again is very OS-oriented, it’s important to know that
generally OSes will fail to load binaries that are aligned less than the
platform page size, as they can
*Tools, CI, Code base construction meeting series*
*When:*
Monday, April 3, 2023
4:30pm to 5:30pm
(UTC-07:00) America/Los Angeles
*Where:*
https://github.com/tianocore/edk2/discussions/2614
View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=1753772 )
*Description:*
TianoCore communi
Bump the version of edk2-basetools in pip-requirements.txt to 0.1.42.
This version contains the update to generate makefiles with both
CFLAGS and BUILD_CFLAGS.
Signed-off-by: Rebecca Cran
---
pip-requirements.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/pip-requirement
Reviewed-by: Michael D Kinney
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Rebecca Cran
> Sent: Monday, April 3, 2023 4:47 PM
> To: devel@edk2.groups.io; Andrew Fish ; Leif Lindholm
> ; Kinney, Michael D
> ; Sean Brogan ;
> Michael Kubacki
> Cc: Rebecca Cran
> Subj
Reviewed-by: Michael Kubacki
On 4/3/2023 7:47 PM, Rebecca Cran wrote:
Bump the version of edk2-basetools in pip-requirements.txt to 0.1.42.
This version contains the update to generate makefiles with both
CFLAGS and BUILD_CFLAGS.
Signed-off-by: Rebecca Cran
---
pip-requirements.txt | 2 +-
CC_FLAGS2 also needs to be set when running on Windows, otherwise the
wrong line is added and nmake fails when building using Visual Studio.
Signed-off-by: Rebecca Cran
---
edk2basetools/Workspace/DscBuildData.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/edk2basetools/Workspace/DscBuil
Reviewed-by: Michael D Kinney
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Rebecca Cran
> Sent: Monday, April 3, 2023 5:33 PM
> To: devel@edk2.groups.io; Gao, Liming ; Chen,
> Christine ; Kinney, Michael
> D
> Cc: Rebecca Cran
> Subject: [edk2-devel] [PATCH edk2-bas
Thank you a lot! I misunderstood the condition for remapping GHCB page in
previous code. I'll fix the issue in next version patch.
Thanks,
Dun
-Original Message-
From: Tom Lendacky
Sent: Tuesday, April 4, 2023 1:14 AM
To: Tan, Dun ; devel@edk2.groups.io
Cc: Ni, Ray
Subject: Re: [edk2
*Reminder: TianoCore Bug Triage - APAC / NAMO*
*When:*
Tuesday, April 4, 2023
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles
*Where:*
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTk1YzJhN2UtOGQwNi00NjY4LWEwMTktY2JiODRlYTY1NmY0%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed
Reviewed-by: Nate DeSimone
-Original Message-
From: Chiu, Chasel
Sent: Friday, March 31, 2023 4:16 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L
; Zeng, Star
Subject: [PATCH] IntelFsp2Pkg: TempRamInit API should preserve EBX/RBX register.
REF: https://bugzilla.
Rebecca:
There are more discussion on GCC49 tool chain. So, I think it is the safe way
to keep GCC49 and GCC5 now. We can make the changes for other tool chains
first.
Thanks
Liming
> -邮件原件-
> 发件人: Rebecca Cran
> 发送时间: 2023年4月3日 5:51
> 收件人: Pedro Falcato ; devel@edk2.groups.io
> 抄送:
[AMD Official Use Only - General]
Hi Mike and Ray,
Do you think we should bring this topic to Tianocore design meeting? Because
this is also the matter of Tianocore GitHub organization, who should be also
invited to the discussion? I think we have someone who manages tianocore
GitHub, right?
Reviewed-by: Nate DeSimone
-Original Message-
From: Chiu, Chasel
Sent: Monday, April 3, 2023 11:34 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L
; Zeng, Star ; Ni, Ray
; Kuo, Ted
Subject: [PATCH v4] IntelFsp2Pkg: LoadMicrocodeDefault() causing unnecessary
dela
Reviewed-by: Ray Ni
> -Original Message-
> From: Chiu, Chasel
> Sent: Tuesday, April 4, 2023 2:34 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Ni,
> Ray ; Kuo, Ted
> Subject: [PATCH v4] IntelFsp2Pkg: LoadMicrocodeDefault() causing
> unnecessa
在 2023/4/3 19:04, Gerd Hoffmann 写道:
On Mon, Apr 03, 2023 at 10:29:52AM +, Michael Brown wrote:
On 03/04/2023 11:13, Chao Li wrote:
This problem is because the gcc-12 does not yet to support the option
'mno-explicit-reloc', this option is used to open the new reloaction
type for LoongArch,
MdeModulePkg and CryptoPkg have double the CodeQL analysis
time of all other packages. Split these packages up to perform
separate analysis of IA32 and X64.
CryptoPkg has double the build time of all other packages.
Split CryptoPkg up matching the style applied to MdeModulePkg.
Cc: Sean Brogan
CryptoPkg has double the build time of all other packages.
Split CryptoPkg up matching the style applied to MdeModulePkg.
Cc: Sean Brogan
Cc: Michael Kubacki
Cc: Liming Gao
Signed-off-by: Michael D Kinney
---
.azurepipelines/templates/pr-gate-build-job.yml | 7 +--
1 file changed, 5 inser
MdeModulePkg and CryptoPkg have double the CodeQL analysis
time of all other packages. Split these packages up to perform
separate analysis of IA32 and X64.
Cc: Sean Brogan
Cc: Michael Kubacki
Signed-off-by: Michael D Kinney
---
.github/workflows/codeql-analysis.yml | 64 ++---
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