The Fanuc's can read fan fold paper tape, just fine. You put the fan fold in a
horizontal feed hopper, basically a cut to size cardboard box, and collect it
into a big bin on the other side. Certainly works fine for fat PDP-11
MainDecs. Then you have to refold it, tedious but therapeutic.
Folks
The jpg I posted previously
https://www.emeritus-solutions.com/papertape/fanuc/Pic16F13145FanucInterface_Integration.JPG
says it all cryptically
To unpack the approach:
- ex CNC machine paper tape readers are available, the Fanuc ones are both
common and susceptable to house training
- s
ACM's precis of who what when : https://amturing.acm.org/info/wilkes_1001395.cfm
To paraphrase:
- 1951 concept
- 1958 reduced to practice in ESDAC2 in the chilly fens; Cambridge UK
- 1964 IBM 360 Model $
Martin
-Original Message-
From: Chuck Guzis via cctalk [mailto:cctalk@classiccmp.org
8
To: cctalk@classiccmp.org
Cc: ben
Subject: [cctalk] Re: Wang TTL BASIC
On 2025-05-04 3:13 p.m., Martin Bishop via cctalk wrote:
> These days microcode works well in FPGAs, RAM access times of 3 ns without
> pipelining, and as Xilinx BRAM comes in 1k Wd x 36b quanta eg 108 bits. BRAM
&
Source code for the rtc -- the KW11-L and KW11-P diagnostics are available on
BitSavers et al via goo.
MAINDEC-11-DDKWA for the KW11-L line frequency clock
and
MAINDEC-11-DDKWB for the KW11-P real time clock (ie 50/60/10k and 100k Hz).
I appreciate this is agricultural, but these are probably th
There can also be nanocode where code drives microcode drives nanocode.
http://www.easy68k.com/paulrsm/doc/dpbm68k1.htm gives an exposition of nanocode
used below microcode in the 68000 and also examples of vertical and horizontal
microcode. Paul Konig has just posted on the V H distinction - I
Will Cooke wrote " although surely some people used it for normal machine code "
Anyone without knowledge of microcode, in the sense it is being discussed here,
since at least the mid 70's would assume you were talking about code for a
6800, PIC or whatever uP/uC.
Saying "I have just upissued t
Folks
There was another Basic Language Machine, UK 1960's, nothing to do with the
eponymous language and goo's AI seems able to halucinate it and microcode in
responses.
https://en.wikipedia.org/wiki/John_Iliffe_(computer_designer)#The_Basic_Language_Machine
The BLM was a precursor to the ICL
R6 (SP) is a magic register in the PDP-11 architecture.
Its use is baked into JSR, RTS, MARK, BPT, RTI, etc, traps and aborts.
You are quite correct that all registers provide address inc/dec
However, some instructions / actions (eg aborts) make implicit use of SP
Martin
-Original Message
Once upon a time - 35 - 45 years ago - I had the pleasure (sic) of working with:
https://archive.org/details/TNM_Versatec_printers_and_plotters_-_Versatec_a_X_20180227_0009
for temperamental plots of telemetry traces
https://www.ebay.co.uk/itm/404623414575 manual for sale
EPC Graphic Recorder 16
For a Meta Assembler you may find
https://hamblen.ece.gatech.edu/book/wintim/index.html useful, its useable and
the source is available (as VS6 C++).
If you have AmdAsm sources, esp suitable for building with gcc, I would be
interested in making their acquaintance.
You may find FPGAs and their
If you are doing "industrial" IO the first thing you need is galvanic
isolation, the second is usually sone of Ethernet, Can bus and 24V bit IO. The
24V IO can be done with optos and (LED) constant current sources. There are 8
pin Can bus drivers with dual supplies and isolation. Plus, any (l
One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memory /
MAC assemblies) or a simple processor
Something like https://www.aliexpress.com/item/1005005779045608.html provides a
wholly adequate platform for a microcoded processor, with lots of 3v3 IO for
external logic analys
Should you make further progress very interested to hear of it
Best Regards
Martin
-Original Message-
From: David Bridgham via cctalk [mailto:cctalk@classiccmp.org]
Sent: 30 March 2025 14:59
To: Martin Bishop via cctalk
Cc: David Bridgham
Subject: [cctalk] DEC bus transceivers (was: DEC
Hi shad / Andrea
Thank you for the exposition of the merits of FPGA implementations for Unibus
and Qbus machines; it was cheeky of me to pose the question.
Regarding cost savings from reusing the main module I suspect the cost of a
Zynq module would be much less than that of the bus adapter
https://forum.vcfed.org/index.php?threads/unibus-qbus-alternative-driver-chips.1243045/
Found on my travels - should have been attached to my previous eMail
My summary is "no easy answer"
Martin
-Original Message-----
From: Martin Bishop via cctalk [mailto:cctalk@classiccmp.org]
David
The SOT-23 wide per output signal is a useful metric, thankyou. I presume that
is with outputs drivers on both sides.
Your comparator ask is probably unobtanium:
- OC output => slow (75+ ns, just like the Unibus settling time - although
perhaps largely due to an initially overdriven )
-
The why not use a UniBone comment has merit, what will your (FPGA)
implementation add ?
If you have additional capability in prospect, there remains the matter of
drivers
https://retrocmp.com/projects/qbone/326-qbone-unibone-alternative-bus-drivers
If you solve the (near) unobtanium OC driver
Steve
Thank you for the link to Shrriff (below) - interesting and with valuable
references, including from the commentariat
Folks
Two microprogramming URLs worth following up - both pdfs
https://ed-thelen.org/comp-hist/MicroprogrammingABriefHistoryOf.pdf 2012
commentary on microprogramming
htt
https://www.pdp-11.nl/pdp11-45/pdp11-45startpage.html ? see system console 18
addr lites for an 18b Unibus
cf https://www.pdp-11.nl/pdp11-70startpage.html with a 22b Unibus, but still
16b data bus
So 11/45 11/40 are certainly possibilities, documentation at bitsavers or
online pix may generat
0) location
1) nature of fault : dead transceiver, broken track, damaged connector, ex-VLSI
device, etc
2) what materiel do you have to hand; eg donor boards
3) diagnostic resources (DVM, digital CRO, etc) & electronics hand tools (10
rembi hot stick -> IR stage for BGA)
Martin
-Original Me
It would be a good thing
Where is the UKs centre of gravity - wrt interested folk ?
Martin DT1 2BS (postcode)
-Original Message-
From: Adrian Godwin via cctalk [mailto:cctalk@classiccmp.org]
Sent: 20 June 2025 21:52
To: General Discussion: On-Topic and Off-Topic Posts
Cc: Adrian Godwin
"Local Only" because folk either don't want the buyers grief over (potential /
guaranteed) transit damage, or (for folk who cherish old systems) they want to
hand them on directly to another pair of kid gloves.
I have seen quite a few things come to grief in transit, old plastic mouldings
seem
https://kikusuiamerica.com/products-index/ac/pcr-ma/ will oblige
I have a PCR500MA : good for 400 Hz synchro work, also 40/50/60 Hz induction
motors - IIRC the wfm is much cleaner than the usu 12V -> ~ static inverter.
The pricing reflects this.
3 phase (Op) VFD are wonderful for driving 3 pha
Location ?
It could well be possible - I have had 30+ yo tapes read
B
-Original Message-
From: Luke Parkerson via cctalk [mailto:cctalk@classiccmp.org]
Sent: 17 July 2025 13:21
To: cctalk@classiccmp.org
Cc: lukeparkers...@gmail.com
Subject: [cctalk] 9-Track Tape Extraction
Hi all,
I r
Nagle's algorithm is another legacy from the past which can require the whack a
mole treatment.
And, I am certain there are many more.
Designed for the 9600 baud era (1980's), it remains in the Gbaud era - not
helpful for timely TCP/IP console traffic to real time systems
Martin
<< snip >>
It
I have a salvaged Epson 6110 tape punch on the bench, also it's interface card
from a Data Dynamics Zip 30.
The 6110 is the shiny paper tape punch which was very common, at front left, on
TTY etc in the 70's and into the 80's
I'm working on reverse engineering the Epson 6110's connector / interf
Iff a device has a 5V tollerant input and the device at the other end is TTL
that is essentially what you are doing - fitting a real level shifter
In the case of the RP2050, subject to the mask revision being A4 ...
Martin
-Original Message-
From: emanuel stiebler [mailto:e...@e-bbes.co
Adrian
The summary answer to your questions must be "in general no" : 5V CMOS levels
are quite different from TTL levels and open drain /collector signalling is
inherently slow.
5V CMOS, with its very high Vih (typ > 3.5V), is one of those things it is nice
not to have to work with. If you do
https://www.raspberrypi.com/products/rp2350/
>From postings, I know that folks use the RP2350 for interfacing; the trade
>press has been shipping news of RP's rev A4 datasheet in volume.
The datasheet should tell all. However, the 5V tollerance of the "IO" pins is
significant for its simplific
is handy to know.
>
> The RP2350 is quite an amazing chip for very little money. A dollar or two
> more than the RP2040, which itself is already highly capable. By the way,
> there is a very nice FORTH system for these called Zeptoforth; I've been
> doing a bunch of
The UK also has that T-shirt from 2005 - although with gasoline as the
overflowing fluid ...
https://en.wikipedia.org/wiki/Buncefield_fire#Causes
Martin
-Original Message-
From: Jon Elson via cctalk [mailto:cctalk@classiccmp.org]
Sent: 27 July 2025 14:53
To: Doug Jackson via cctalk
Cc
I suppose we should tell them / ask for confirmation
Amusing that an issue with an Arm / RiscV SoC update was identified by the
"Classic Computer" crew
Martin
PS The credit is yours, I skimmed the data sheet
-Original Message-
From: Paul Koning [mailto:paulkon...@comcast.net]
Sent: 30
cy or speed, I went with a simple voltage divider
rather than a level shifter.
--Jay
On 7/30/25 07:04, Martin Bishop via cctalk wrote:
> https://www.raspberrypi.com/products/rp2350/
>
> From postings, I know that folks use the RP2350 for interfacing; the trade
> press has been ship
money. A dollar or two
>> more than the RP2040, which itself is already highly capable. By the way,
>> there is a very nice FORTH system for these called Zeptoforth; I've been
>> doing a bunch of work with that.
>>
>> paul
>>
>>> On Jul 30,
I have successfully used a 74LVC1G34DBV to do exactly that, 5V supply, 10u &
100n on the supply, 499R in series on the output, driven from 3v3 LVTTL.
Run at 5V the WS2812B has Vil/Vih of 0.9 and 3.5 V. Hence you need more than
LVTTL or TTL logic levels. I would be surprised if a pull up was a
https://archive.org/details/bitsavers_decqbusDigterfacesHandbook1980_21089144
appendix F pp732-734 is 3 pages of what I mentioned re the 8881
http://bitsavers.org/pdf/dec/qbus/Chipkit_Users_Manual_1982.pdf related but not
8881 - lots of handy IC descriptions
http://www.bitsavers.org/pdf/dec/int
https://forum.vcfed.org/index.php?threads/dec-ttl-part-number-equivalents.79306/
is a collection of rumours about what DEC 8881's
DS3862 was a National Semi trapezoidal (ie slew rate limited driver), whether
that makes a DS3881 a National part is a good question (never found it).
DEC documenta
How available, as NoS rather than pulls, are K559IP1 and its chums 2 & 3 ?
Martin
-Original Message-
From: Holm Tiffe [mailto:h...@freibergnet.de]
Sent: 01 August 2025 10:45
To: Martin Bishop
Subject: Re: [cctalk] Q about DS3881, N8881 DEC8881..
Martin Bishop wrote:
> The 8881 data sh
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