If you are doing "industrial" IO the first thing you need is galvanic isolation, the second is usually sone of Ethernet, Can bus and 24V bit IO. The 24V IO can be done with optos and (LED) constant current sources. There are 8 pin Can bus drivers with dual supplies and isolation. Plus, any (low) logic level will act as an open drain output.
If you wish 5v IO Microchip have some (new) SAMD derivatives eg PIC32CM1216CM00032 which feature 5v IO - and all its attendant troubles : high Vih, high Voh, ... Judicious use of LV HCT with 5v tollerant inputs and the option of 5v Vcc, or some other translation parts may be a preferable option. Only the low end FPGAs now have copious 3v3 IO, the bigger faster beasties are 1v8 or below. And then there is LVDS etc etc. I can't see any reason that a common engine could not implement multiple architectures, making it do all of them well would be a greater challenge, XFU ? Dual ported BRAM is certainly the location for microcode, and many kilo bytes of main memory ? Martin -----Original Message----- From: ben via cctalk [mailto:cctalk@classiccmp.org] << snip >> They goofed on that, 3 volt transistor logic is negative. :) I really wonder what is used in a Industrial Setting now days, HTL logic is long gone. << snip >> From when you could get a FPGA with 5 volt I/O and sane packaging and easy to use floor planning. What may be a valid option with a FPGA, is to design a computer with programmable microcode into block ram. Then you could have PDP XYZ, IBM 360, A ALGOL machine,ect. Ben.
