R6 (SP) is a magic register in the PDP-11 architecture. Its use is baked into JSR, RTS, MARK, BPT, RTI, etc, traps and aborts. You are quite correct that all registers provide address inc/dec However, some instructions / actions (eg aborts) make implicit use of SP
Martin -----Original Message----- From: Jon Elson via cctalk [mailto:cctalk@classiccmp.org] Sent: 17 February 2025 17:07 To: Frank Leonhardt via cctalk <cctalk@classiccmp.org> Cc: Jon Elson <el...@pico-systems.com> Subject: [cctalk] Re: Classic computers with more than one stack pointer, but not FORTH machines. On 2/17/25 08:02, Frank Leonhardt via cctalk wrote: > On 17/02/2025 05:12, ben via cctalk wrote: >> Did any classic computers have a subroutine call as (S++)=PC, >> PC=(EFA) as well as the standard call (--S)=PC,PC=(EFA) ? >> One could have a virtual stack machine, using helper functions >> without having to deal with return addresses on the stack. > > On the more than "one stack pointer" in the subject, it was a bit > arbitrary on the PDP-11 (or VAX) as the pre/post indexed indirect > addressing made every register a stack pointer. But this is where I > get hazy between DEC and 68K, and I did a lot more 68K. I'm pretty > sure you could do a move.l PC, An and you could certainly do an > indirect jmp (An), so effectively you could have multiple call stacks > if you wanted. Yes, on the PDP11, any register could be used as an autoincrement/decrement indirect pointer. So, the use of R6 was merely a convention, baked into the macros in the assembler. R7 was firmly fixed in the CPU logic as the PC, however. Jon
