On 2025-03-13 6:01 p.m., Paul Koning via cctalk wrote:
An additional comment on that. To understand any field well, it is generally helpful,
and at times crucial, to have some knowledge of early work. I just read a translation of
some of the works of Galileo that makes that point in so many
> On Mar 13, 2025, at 7:56 PM, Paul Koning via cctalk
> wrote:
>
>
>
>> On Mar 13, 2025, at 4:35 PM, ben via cctalk wrote:
>>
>> On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote:
>>
>>> Depends on which one. RTL was 3.6 volts positive, as far as I can
>>> remember. I actually hav
> On Mar 13, 2025, at 4:35 PM, ben via cctalk wrote:
>
> On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote:
>
>> Depends on which one. RTL was 3.6 volts positive, as far as I can remember.
>> I actually have a keyboard that has some of those devices in it. Yes, ECL
>> is around 3 vol
ISTR that some time ago I read mention here about an EPROM fast enough to
approach PROM speeds; anyone share that recollection, or even have a
source/part no.?
On Thu, Mar 13, 2025 at 12:47 PM Holm Tiffe via cctalk <
cctalk@classiccmp.org> wrote:
> Jon Elson via cctalk wrote:
>
> [..]
> > >
> > >
Jon Elson via cctalk wrote:
> On 3/13/25 11:47, Holm Tiffe via cctalk wrote:
> >
> > ...and you can expand the Registers externally with AM29705 (AM29707)
>
> Actually, the 2903 didn't have any general registers at all. And, yes the
> 29705 provided dual-port registers for the 2903, that's what
On 3/13/25 11:47, Holm Tiffe via cctalk wrote:
...and you can expand the Registers externally with AM29705 (AM29707)
Actually, the 2903 didn't have any general registers at all.
And, yes the 29705 provided dual-port registers for the
2903, that's what I used in my bit-slice CPU project.
Jo
On 3/13/25 13:09, ben via cctalk wrote:
On 2025-03-13 10:47 a.m., Holm Tiffe via cctalk wrote:
Of course, now this could all be built on a few FPGAs,
and get vastly higher
performance.
Most designs seem to 8 bitter's, and all memory fits in
block ram.
Once you hit external ram/rom things slo
If you are doing "industrial" IO the first thing you need is galvanic
isolation, the second is usually sone of Ethernet, Can bus and 24V bit IO. The
24V IO can be done with optos and (LED) constant current sources. There are 8
pin Can bus drivers with dual supplies and isolation. Plus, any (l
On 2025-03-13 1:36 p.m., Paul Koning via cctalk wrote:
Depends on which one. RTL was 3.6 volts positive, as far as I can remember. I actually
have a keyboard that has some of those devices in it. Yes, ECL is around 3 volts also
but negative supply. And of course some people designed system
On Thu, Mar 13, 2025, 12:37 PM Mike Stein via cctalk
wrote:
> ISTR that some time ago I read mention here about an EPROM fast enough to
> approach PROM speeds; anyone share that recollection, or even have a
> source/part no.?
>
How big and how fast? Cypress made some 15ns UV eraseable parts, for
> On Mar 13, 2025, at 3:28 PM, ben via cctalk wrote:
>
> On 2025-03-13 12:24 p.m., Martin Bishop via cctalk wrote:
>> One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memory
>> / MAC assemblies) or a simple processor
>
> When it works.
> I see lots low cost Chinese FPGA
On 3/13/25 06:36, Holm Tiffe via cctalk wrote:
Ok, this is a full fledged mainframe CPU.. not really what I want todo first.
That stuff tends to "explode" in sight of parts, needed power and space,
I know that.
On the other side I saw different controllers for PDP11/VAX stuff that
used the 290x
On 2025-03-13 12:24 p.m., Martin Bishop via cctalk wrote:
One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memory /
MAC assemblies) or a simple processor
When it works.
I see lots low cost Chinese FPGA cards, so that is valid option.
Something like https://www.aliexpress
One FPGA will easily do a VLIW sequencer + scalar mills (one or more, memory /
MAC assemblies) or a simple processor
Something like https://www.aliexpress.com/item/1005005779045608.html provides a
wholly adequate platform for a microcoded processor, with lots of 3v3 IO for
external logic analys
On 2025-03-13 10:47 a.m., Holm Tiffe via cctalk wrote:
Of course, now this could all be built on a few FPGAs, and get vastly higher
performance.
Most designs seem to 8 bitter's, and all memory fits in block ram.
Once you hit external ram/rom things slow down again.
That's the point where the
Paul Koning via cctalk wrote:
>
>
> > On Mar 13, 2025, at 7:36 AM, Holm Tiffe via cctalk
> > wrote:
> >
> > ...
> > Ok, this is a full fledged mainframe CPU.. not really what I want todo
> > first.
> > That stuff tends to "explode" in sight of parts, needed power and space,
> > I know that.
> On Mar 13, 2025, at 7:36 AM, Holm Tiffe via cctalk
> wrote:
>
> ...
> Ok, this is a full fledged mainframe CPU.. not really what I want todo first.
> That stuff tends to "explode" in sight of parts, needed power and space,
> I know that.
> On the other side I saw different controllers for P
Jon Elson via cctalk wrote:
> On 3/9/25 04:14, Holm Tiffe via cctalk wrote:
> > ben via cctalk wrote:
> >
> > > On 2025-03-08 8:09 a.m., emanuel stiebler via cctalk wrote:
> > > > On 2025-03-07 15:36, Holm Tiffe via cctalk wrote:
> > > > > Hi all,
> > > > >
> > > > > I'm dreaming to build someti
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