[PATCH 29/29] drm/amd/display: 3.2.212

From: Aric Cyr DC version 3.2.212 brings along the following fixes: - Fix DPIA AUX timeout issue - Add HUBP surface flip interrupt handler - Fix dpms_off issue when disabling bios mode - Update SubVP Visual Confirm - Program pipes for ODM when removing planes - Use min transition for all SubVP p

[PATCH 28/29] drm/amd/display: [FW Promotion] Release 0.0.143.0

From: Anthony Koo - New boot options to enable USB4 DP BW Allocation mode in DPIA Reviewed-by: Aric Cyr Acked-by: Tom Chung Signed-off-by: Anthony Koo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/am

[PATCH 27/29] drm/amd/display: Adjust DP 8b10b LT exit behavior

From: Ilya Bakoulin [Why] Polling SINK_STATUS DPCD can cause some non-DP2.0 LTTPR hubs to hang and no longer respond to AUX. [How] As a workaround for the problem hubs, and also to more closely match DP spec 8b10b behavior, don't poll for intra-hop AUX reply indication on 8b10b-encoded links. R

[PATCH 26/29] drm/amd/display: rework macros for DWB register access

From: Aurabindo Pillai [Why] A hack was used to access DWB register due to difference in the register naming convention which was not compatible with existing SR/SRI* macros. The additional macro needed were added to dwb ip specific header file (dcnxx_dwb.h) instead of soc resource file (dcnxx_re

[PATCH 25/29] drm/amd/display: Set max for prefetch lines on dcn32

From: Dillon Varone [WHY?] Max number of lines that can be used for prefetch due to type constraints is 63.75. [HOW?] Enforce maximum prefetch lines as 63.75. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Dillon Varone --- .../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h

[PATCH 24/29] drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32

From: Dillon Varone [WHY?] DCN32 uses fclk pstate watermarks for dummy pstate, and must always be supported. [HOW?] Validation needs to be run with fclk pstate latency set as the dummy pstate latency to get correct prefetch and bandwidth outputs. Reviewed-by: Jun Lei Acked-by: Tom Chung Signe

[PATCH 23/29] drm/amd/display: Fix prefetch calculations for dcn32

From: Dillon Varone [Description] Prefetch calculation loop was not exiting until utilizing all of vstartup if it failed once. Locals need to be reset on each iteration of the loop. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Dillon Varone --- drivers/gpu/drm/amd/display/dc/dml/

[PATCH 21/29] drm/amd/display: Fix optc2_configure warning on dcn314

From: Roman Li [Why] dcn314 uses optc2_configure_crc() that wraps optc1_configure_crc() + set additional registers not applicable to dcn314. It's not critical but when used leads to warning like: WARNING: drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.c Call Trace: generic_reg_set_ex+0x6d/0x

[PATCH 22/29] drm/amd/display: Fix Subvp phantom pipe transition

From: Alvin Lee [Description] - When transitioning a pipe in use (non-phantom) to become a phantom pipe, we must fully disable the pipe first before doing any phantom pipe programming - Move phantom OTG enablement to after "regular" front-end programming sequence (including wait for vupdate

[PATCH 15/29] drm/amd/display: Align phantom pipe dst/src scaling with main for subvp

From: Dillon Varone [WHY?] Subvp src/dst stream rectangles are not being created with the same scaling factors as the main stream. [HOW?] Make sure subvp stream src rectangle scales its height to have the same src/dst ratio as the main stream. Reviewed-by: Alvin Lee Reviewed-by: Jun Lei Acked

[PATCH 18/29] drm/amd/display: Don't check output BPP for phantom

From: Alvin Lee [Description] - If we're enabling phantom pipe for a high link rate display we could fail DML on the phantom pipe since it's set to virtual signal - Therefore don't consider Output BPP for phantom pipe Reviewed-by: Dillon Varone Acked-by: Tom Chung Signed-off-by: Alvin

[PATCH 20/29] drm/amd/display: fix array index out of bound error in bios parser

From: Aurabindo Pillai [Why&How] Firmware headers dictate that gpio_pin array only has a size of 8. The count returned from vbios however is greater than 8. Fix this by not using array indexing but incrementing the pointer since gpio_pin definition in atomfirmware.h is hardcoded to size 8 Revie

[PATCH 16/29] drm/amd/display: Fix calculation for cursor CAB allocation

From: George Shen [Why] The cursor size (in memory) is currently incorrectly calculated, resulting not enough CAB being allocated for static screen cursor in MALL refresh. This results in cursor image corruption. [How] Use cursor pitch instead of cursor width when calculating cursor size. Update

[PATCH 14/29] drm/amd/display: Check context constructed for pipe split flags is still valid

From: Dillon Varone [WHY?] After applying pipesplit flags, DML can select a different configuration upon revalidation, despite the desired one still being valid. [HOW?] Check the configuration is still has mode support, and apply it. Reviewed-by: Martin Leung Acked-by: Tom Chung Signed-off-by

[PATCH 19/29] drm/amd/display: revert Disable DRR actions during state commit

From: Martin Leung why and how: causes unstable on certain surface format/mpo transitions This reverts commit 480c320055c475b342703d4b53f6ed1d922adf21 Reviewed-by: Wesley Chalmers Acked-by: Tom Chung Signed-off-by: Martin Leung --- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 3 +++

[PATCH 11/29] drm/amd/display: enable dchub request limit for NV32

From: Jun Lei [why] HW recommend we enable this for better DF QoS for NV32 [how] Add interfaces to hubbub to program register Add initialization as part of init_hw Add default settings for NV32 Add registry override for debug/tuning Reviewed-by: Alvin Lee Acked-by: Tom Chung Signed-off-by: Ju

[PATCH 17/29] drm/amd/display: fix unbounded requesting for high pixel rate modes on dcn315

From: Dmytro Laktyushkin Unbounded requesting is getting configured for odm mode calculations which is incorrect. This change checks whether mode requires odm ahead of time. Reviewed-by: Jun Lei Acked-by: Tom Chung Signed-off-by: Dmytro Laktyushkin --- drivers/gpu/drm/amd/display/dc/dcn315/d

[PATCH 12/29] drm/amd/display: Workaround to increase phantom pipe vactive in pipesplit

From: George Shen [Why] Certain high resolution displays exhibit DCC line corruption with SubVP enabled. This is likely due to insufficient DCC meta data buffered immediately after the mclk switch. [How] Add workaround to increase phantom pipe vactive height by meta_row_height number of lines, t

[PATCH 13/29] drm/amd/display: fix dcn3.1x mode validation on high bandwidth config

From: Charlene Liu [why] 1. correct dram_channel_width (was hard coded to 4 for 32bit) 2. use dm's is_hvm_enable status flag for hostvm_en input for dml. 3. add a function to override to all dcn3.1x. Reviewed-by: Dmytro Laktyushkin Acked-by: Tom Chung Signed-off-by: Charlene Liu --- .../disp

[PATCH 10/29] drm/amd/display: Support parsing VRAM info v3.0 from VBIOS

From: George Shen [Why] For DCN3.2 and DCN3.21, VBIOS has switch to using v3.0 of the VRAM info struct. We should read and override the VRAM info in driver with values provided by VBIOS to support memory downbin cases. Reviewed-by: Alvin Lee Acked-by: Tom Chung Signed-off-by: George Shen ---

[PATCH 09/29] drm/amd/display: use low clocks for no plane configs

From: Dmytro Laktyushkin Stream only configurations do not require DCFCLK, SOCCLK, DPPCLK or FCLK. They also always allow pstate change. Reviewed-by: Charlene Liu Acked-by: Tom Chung Signed-off-by: Dmytro Laktyushkin --- .../drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 18 ++

[PATCH 04/29] drm/amd/display: fix dpms_off issue when disabling bios mode

From: Zhongwei Zhang [Why] disable_vbios_mode_if_required() will set dpms_off to false during boot when pixel clk dismatches with driver requires. This will cause extra backlight on and off if OS call 2 times setmode. [How] Set dpms_off to true to keep power_off and let OS control BL by display'

[PATCH 07/29] drm/amd/display: Program pipes for ODM when removing planes

From: Dillon Varone [WHY?] Software state expects pipes to be configured for ODM, but due to the transition occurring on a plane disable, the ODM enablement code is not run. [HOW?] Update ODM when removing a plane, and dynamic ODM is active. Also acquire pipe lock when removing a plane. Reviewe

[PATCH 06/29] drm/amd/display: clean up some irq service code for dcn201

From: Liu Xi [Why and how] Clean up some irq service code for dcn201. Reviewed-by: Charlene Liu Acked-by: Tom Chung Signed-off-by: Liu Xi --- .../display/dc/irq/dcn201/irq_service_dcn201.c | 17 ++--- .../display/dc/irq/dcn201/irq_service_dcn201.h | 2 +- 2 files changed, 11

[PATCH 01/29] drm/amd/display: Fix access timeout to DPIA AUX at boot time

From: Stylon Wang [Why] Since introduction of patch "Query DPIA HPD status.", link detection at boot could be accessing DPIA AUX, which will not succeed until DMUB outbox messaging is enabled and results in below dmesg logs: [ 160.840227] [drm:amdgpu_dm_process_dmub_aux_transfer_sync [amdgpu]]

[PATCH 08/29] drm/amd/display: Use min transition for all SubVP plane add/remove

From: Alvin Lee [Description] - Whenever disabling a phantom pipe, we must run through the minimal transition sequence - In the case where SetVisibility = false for the main pipe, we also need to run through the min transtion when disabling the phantom pipes Reviewed-by: Jun Lei Acked-by:

[PATCH 02/29] drm/amd/display: Add HUBP surface flip interrupt handler

From: Rodrigo Siqueira On IGT, there is a test named amd_hotplug, and when the subtest basic is executed on DCN31, we get the following error: [drm] *ERROR* [CRTC:71:crtc-0] flip_done timed out [drm] *ERROR* flip_done timed out [drm] *ERROR* [CRTC:71:crtc-0] commit wait timed out [drm] *ERROR* f

[PATCH 05/29] drm/amd/display: Update SubVP Visual Confirm

From: David Galiffi [Why] The visual confirm bar is displayed on all displays, but is only updated on a flip. If an update causes SubVP to be disabled on all displays, but there are no updates on the other displays, it will lead to stale information displayed on the non-active displays. An exampl

[PATCH 03/29] drm/amd/display: Fix invalid DPIA AUX reply causing system hang

From: Stylon Wang [Why] Some DPIA AUX replies have incorrect data length from original request. This could lead to overwriting of destination buffer if reply length is larger, which could cause invalid access to stack since many destination buffers are declared as local variables. [How] Check fo

[PATCH 00/29] DC Patches November 07, 2022

This version brings along following fixes: - Fix DPIA AUX timeout issue - Add HUBP surface flip interrupt handler - Fix dpms_off issue when disabling bios mode - Update SubVP Visual Confirm - Program pipes for ODM when removing planes - Use min transition for all SubVP plane add/remove - Support p

[linux-next:master] BUILD REGRESSION b6fc3fddade7a194bd141a49f2689e50f796ef46

tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: b6fc3fddade7a194bd141a49f2689e50f796ef46 Add linux-next specific files for 20221108 Error/Warning reports: https://lore.kernel.org/linux-mm/202210111318.mbufyhps-...@intel.com https

Re: [PATCH] drm/amd/display: Amend descriptions within enum pipe_split_policy

On 11/7/22 09:37, Carlos Bilbao wrote: > Correct descriptions of two last fields of enum pipe_split_policy, updating > comments with proper field names. > > Signed-off-by: Carlos Bilbao Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/dc/dc.h | 9 + > 1 file chan

Re: FW: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

Am 08.11.22 um 18:30 schrieb Zhang, Bokun: [AMD Official Use Only - General] Please find below patch after passing code style check Thanks! I'm not sure which coding style check you use, but when I use checkpatch.pl it points out tons of problems with this patch. -Original Message

FW: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

[AMD Official Use Only - General] Please find below patch after passing code style check Thanks! -Original Message- From: Bokun Zhang Sent: Tuesday, November 8, 2022 12:29 PM To: amd-gfx@lists.freedesktop.org Cc: Zhang, Bokun ; Liu01, Tong (Esther) Subject: [PATCH] drm/amdgpu: add vra

[PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

- Move TMR region from top of FB to 2MB for FFBM, so we need to reserve TMR region firstly to make sure TMR can be allocated at 2MB Signed-off-by: Tong Liu01 Signed-off-by: Bokun Zhang --- .../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 106 ++ drivers/gpu/drm/amd/amdgpu/amdgp

Re: [PATCH 1/2] drm/amdgpu: Move racy global PMU list into device

On 2022-10-28 18:48, Brian Norris wrote: If there are multiple amdgpu devices, this list processing can be racy. We're really treating this like a per-device list, so make that explicit and remove the global list. I agree with the problem and the solution. See one comment inline. Signed-of

Re: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

Hi, Applying this patch to amd-staging-drm-next, with checkpatch.pl enabled, generates the following output. Perhaps those issues should be address and fixed. $git am ~/patches/tongliu01/\[PATCH]\ drm_amdgpu\:\ add\ vram\ reservation\ logic\ based\ on\ vram_usagebyfirmware_v2_2\ -\ Tong\ Liu01

Re: [PATCH] drm/amd/display: Amend descriptions within enum pipe_split_policy

On Mon, Nov 7, 2022 at 9:37 AM Carlos Bilbao wrote: > > Correct descriptions of two last fields of enum pipe_split_policy, updating > comments with proper field names. > > Signed-off-by: Carlos Bilbao Acked-by: Alex Deucher > --- > drivers/gpu/drm/amd/display/dc/dc.h | 9 + > 1 file c

Re: [PATCH 1/2] drm/amdgpu: Move racy global PMU list into device

On Fri, Oct 28, 2022 at 6:48 PM Brian Norris wrote: > > If there are multiple amdgpu devices, this list processing can be racy. > > We're really treating this like a per-device list, so make that explicit > and remove the global list. > > Signed-off-by: Brian Norris @Kuehling, Felix @Kim, Jonath

Re: [PATCH v1] drm/amd/display: Have risk for memory exhaustion

On Fri, Nov 4, 2022 at 10:06 AM LongJun Tang wrote: > > In dcn*_clock_source_create when dcn*_clk_src_construct fails allocated > clk_src needs release. A local attack could use this to cause memory > exhaustion. > > Signed-off-by: LongJun Tang Applied. Thanks! Alex > --- > drivers/gpu/drm/a

Re: [PATCH] [next] drm/amdgpu: Replace 1-element array with flexible-array member

Applied. Thanks! Alex On Mon, Nov 7, 2022 at 4:33 AM Paulo Miguel Almeida wrote: > > One-element arrays are deprecated, and we are replacing them with > flexible array members instead. So, replace one-element array with > flexible-array member in structs _ATOM_GPIO_PIN_ASSIGNMENT, > _ATOM_DISPL

Re: [PATCH] drm/amdgpu: Decouple RAS EEPROM addresses from chips

On Mon, Nov 7, 2022 at 12:45 PM Luben Tuikov wrote: > > Abstract RAS I2C EEPROM addresses from chip names, and set their macro > definition names to the address they set, not the chip they attach > to. Since most chips either use I2C EEPROM address 0 or 4h for the RAS > table start offset, thi

Re: [PATCH 2/2] drm/radeon: Add the missed acpi_put_table() to fix memory leak

Applied. Thanks On Fri, Nov 4, 2022 at 6:05 AM Hanjun Guo wrote: > > When the radeon driver reads the bios information from ACPI > table in radeon_acpi_vfct_bios(), it misses to call acpi_put_table() > to release the ACPI memory after the init, so add acpi_put_table() > properly to fix the memor

Re: [PATCH] drm/amdgpu: Remove redundant I2C EEPROM address

On 2022-11-08 09:31, Alex Deucher wrote: > On Mon, Nov 7, 2022 at 12:23 PM Luben Tuikov wrote: >> >> Remove redundant EEPROM_I2C_MADDR_54H address, since we already have it >> represented (ARCTURUS), and since we don't include the I2C device type >> identifier in EEPROM memory addresses, i.e. that

RE: [PATCH] drm/amdgpu: Decouple RAS EEPROM addresses from chips

[AMD Official Use Only - General] Reviewed-by: Kent Russell > -Original Message- > From: amd-gfx On Behalf Of Luben > Tuikov > Sent: Monday, November 7, 2022 12:44 PM > To: AMD Graphics > Cc: Zhou1, Tao ; Deucher, Alexander > ; Tuikov, Luben ; Li, > Candice > Subject: [PATCH] drm/

Re: [PATCH] drm/amdgpu: Remove redundant I2C EEPROM address

On Mon, Nov 7, 2022 at 12:23 PM Luben Tuikov wrote: > > Remove redundant EEPROM_I2C_MADDR_54H address, since we already have it > represented (ARCTURUS), and since we don't include the I2C device type > identifier in EEPROM memory addresses, i.e. that high up in the device > abstraction--we only u

Re: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

Yeah, I mean the code looks correct. It's just that style problems are usually pointed out by automated checkers, especially things like dos line endings. So get that fixed and we can push it immediately. Thanks, Christian. Am 08.11.22 um 14:49 schrieb Chang, HaiJun: [AMD Official Use Only

Re: [PATCH v2] drm/amd/pm: enable mode1 reset on smu_v13_0_10

On 11/8/2022 6:05 AM, Kenneth Feng wrote: enable mode1 reset and prioritize debug port on msu_v13_0_10 as a more reliable message processing v2 - move mode1 reset callback to smu_v13_0_0_ppt.c Signed-off-by: Kenneth Feng --- drivers/gpu/drm/amd/amdgpu/soc21.c| 1 + drivers/g

RE: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

[AMD Official Use Only - General] + Bokun to help addressing the coding style problem in MKM side. -Original Message- From: Koenig, Christian Sent: Tuesday, November 8, 2022 8:53 PM To: Liu01, Tong (Esther) ; amd-gfx@lists.freedesktop.org Cc: Quan, Evan ; Chen, Horace ; Tuikov, Luben ;

Re: [PATCH] ACPICA: Fix return

On Tue, Nov 8, 2022 at 12:48 PM wrote: > > return is not a function, parentheses are not required > > Signed-off-by: KaiLong Wang ACPICA material is to be submitted to the upstream project at GitHub (please see MAINTAINERS for the link). You may notice, however, that your changes do not align w

Re: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

Hi Esther well there are a couple of things which you need to address before getting this merged. First of all the patch you send out uses dos line endings instead of the unix line endings. Not sure how you manage to do that, but please use "git send-email" instead to avoid that. Then your

RE: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

[AMD Official Use Only - General] Hi @Koenig, Christian, Refined as your comment. By the way: if ((start_addr & ATOM_VRAM_OPERATION_FLAGS_MASK) == + (uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION << + ATOM_VRAM_OPERATION_FLAGS_SHIFT)) This part is the old code

[PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

Move TMR region from top of FB to 2MB for FFBM, so we need to reserve TMR region firstly to make sure TMR can be allocated at 2MB Signed-off-by: Tong Liu01 --- .../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 106 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 50 + d

Re: [PATCH] drm/amdgpu: add vram reservation logic based on vram_usagebyfirmware_v2_2

Am 08.11.22 um 03:46 schrieb Tong Liu01: Move TMR region from top of FB to 2MB for FFBM, so we need to reserve TMR region firstly to make sure TMR can be allocated at 2MB Signed-off-by: Tong Liu01 --- .../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 106 ++ drivers/gpu/drm/amd

Re: [PATCH] ALSA: hda/hdmi - enable runtime pm for more AMD display audio

On Tue, 08 Nov 2022 09:47:46 +0100, Evan Quan wrote: > > We are able to power down the GPU and audio via the GPU driver > so flag these asics as supporting runtime pm. > > Signed-off-by: Evan Quan > Change-Id: Ib7ea9bfe7b62b98afd63f96a2d98795504e7ae04 Applied now. I dropped the useless change-

[PATCH] ALSA: hda/hdmi - enable runtime pm for more AMD display audio

We are able to power down the GPU and audio via the GPU driver so flag these asics as supporting runtime pm. Signed-off-by: Evan Quan Change-Id: Ib7ea9bfe7b62b98afd63f96a2d98795504e7ae04 --- sound/pci/hda/hda_intel.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/pci/hda/hda_intel.

Re: [PATCH v7 18/21] dma-buf: Move dma_buf_mmap() to dynamic locking specification

On 11/7/22 20:25, Daniel Vetter wrote: >> Move dma_buf_mmap() function to the dynamic locking specification by >> taking the reservation lock. Neither of the today's drivers take the >> reservation lock within the mmap() callback, hence it's safe to enforce >> the locking. >> >> Acked-by: Sumit Sem

RE: [PATCH 4/5] drm/amdgpu: MCBP based on DRM scheduler (v8)

[AMD Official Use Only - General] Hi Michel, I reproduced the glxgears 400fps scenario locally. The issue is caused by the patch5 "drm/amdgpu: Improve the software rings priority scheduler" which slows down the low priority scheduler thread if high priority ib is under executing. I'll drop thi