Re: [9fans] Barrelfish

Sorry to kick this rotting horse but I just got back You've got to feed in 2 hours of source material - 820Gb per stream, how? I suppose some sort of parallel bus of wires or optic fibres. we call that "hand waving" If I have massively parallel processing I would want massively p

Re: [9fans] Barrelfish

On Wed, Oct 21, 2009 at 8:43 AM, Sam Watkins wrote: >  People do this stuff every day. > Have you heard of a render-farm? Yes, and some of them are on this list, and have actually done this sort of work, as you clearly have not. Else you would understand where the limits on parallelism are in p

Re: [9fans] Barrelfish

On Wed, Oct 21, 2009 at 09:11:10AM -0700, Russ Cox wrote: > > Can you give one example of a slow task that you think cannot benefit much > > from parallel processing? > > Rebuilding a venti index is almost entirely I/O bound. Perhaps I should have specified a processor-bound task. I don't know m

Re: [9fans] Barrelfish

> Can you give one example of a slow task that you think cannot benefit much > from > parallel processing? Rebuilding a venti index is almost entirely I/O bound. You can have as many cores as you want and they will all be sitting idle waiting for the disks. Parallel processing helps only to the

Re: [9fans] Barrelfish

I wrote: >I calculated roughly that encoding a 2-hour video could be parallelized by a >factor of perhaps 20 trillion, using pipelining and divide-and-conquer On Tue, Oct 20, 2009 at 03:16:22AM +0100, matt wrote: > I know you are using video / audio encoding as an example and there are > probably

Re: [9fans] Barrelfish

> Add into that the datarate of full 10 bit uncompressed 1920x1080/60i HD > is 932Mbit so your 1Ghz clockspeed might not be fast enough to play it :) Not sure I agree, I think its worse than that: 1920pixels * 1080lines * 30 frames/sec * 20bits/sample in YUV => 1.244Gbps Also, if you want to en

Re: [9fans] Barrelfish

this is quite an astounding thread. you brought up clock speed doubling and now refute yourself. i just noted that 48ghz is not possible with silicon non-quantium effect tech. - erik I think I've been misunderstood, I wasn't asserting the clock speed increase in the first place, I was ho

Re: [9fans] Barrelfish

> >you motivated me to find my copy of _high speed > >semiconductor devices_, s.m. sze, ed., 1990. > > > > > > > which motivated me to dig out the post I made elsewhere : > > "Moore's law doesn't say anything about speed or power. It says > manufacturing costs will lower from technological impr

Re: [9fans] Barrelfish

Eris Discordia wrote: "Moore's law doesn't say anything about speed or power. But why'd you assume "people in the wrong" (w.r.t. their understanding of Moore's law) would measure "speed" in gigahertz rather than MIPS or FLOPS? because that's what the discussion I was having was about

Re: [9fans] Barrelfish

Sam Watkins wrote: I calculated roughly that encoding a 2-hour video could be parallelized by a factor of perhaps 20 trillion, using pipelining and divide-and-conquer, with a longest path length of 1 operations in series. Such a system running at 1Ghz could encode a single 2-hour video in 1

Re: [9fans] Barrelfish

"Moore's law doesn't say anything about speed or power. But why'd you assume "people in the wrong" (w.r.t. their understanding of Moore's law) would measure "speed" in gigahertz rather than MIPS or FLOPS? --On Tuesday, October 20, 2009 02:38 +0100 matt wrote: erik quanstrom wrote: y

Re: [9fans] Barrelfish

erik quanstrom wrote: you motivated me to find my copy of _high speed semiconductor devices_, s.m. sze, ed., 1990. which motivated me to dig out the post I made elsewhere : "Moore's law doesn't say anything about speed or power. It says manufacturing costs will lower from technological i

Re: [9fans] Barrelfish

totally ot. sorry. > > 1. p. 8. "the most promising devices are quantum effect > > devices." (none are currently in use in processors.) > > Since quantics means unpredictable, I think that we see more and more > quantum effects in hardware and software. So, I beg to disagree ;) you may not fu

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 12:13:34PM -0400, erik quanstrom wrote: > > 1. p. 8. "the most promising devices are quantum effect > devices." (none are currently in use in processors.) Since quantics means unpredictable, I think that we see more and more quantum effects in hardware and software. So,

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 10:30 AM, ron minnich wrote: > On Mon, Oct 19, 2009 at 9:34 AM, Sam Watkins wrote: > > > The "processors" (actually smaller processing units) would mostly be > configured > > at load time, much like an FPGA. Most units would execute a single > simple > > operation repeat

Re: [9fans] Barrelfish

ron minnich wrote: On Mon, Oct 19, 2009 at 9:34 AM, Sam Watkins wrote: The "processors" (actually smaller processing units) would mostly be configured at load time, much like an FPGA. Most units would execute a single simple operation repeatedly on streams of data, they would not read instruc

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 9:34 AM, Sam Watkins wrote: > The "processors" (actually smaller processing units) would mostly be > configured > at load time, much like an FPGA.  Most units would execute a single simple > operation repeatedly on streams of data, they would not read instructions and > e

Re: [9fans] Barrelfish

> My point is, one can design systems to solve practical problems that use > almost > arbitrarily large numbers of processing units running in parallel. design != build russ

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 12:05:19PM -0400, erik quanstrom wrote: > > Details of the calculation: 7200 seconds * 30fps * 12*16 (50*50 pixel > > chunks) * 50 elementary arithmetic/logical operations in a pipeline > > (unrolled). 7200*30*12*16*50 = 20 trillion (20,000,000,000,000) > > processi

Re: [9fans] Barrelfish

> I ran the numbers the other day based on sped doubles every 2 years, a > 60Mhz Pentium would be running 16Ghz by now > I think it was the 1ghz that should be 35ghz you motivated me to find my copy of _high speed semiconductor devices_, s.m. sze, ed., 1990. there might be one our two little pro

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 8:57 AM, Sam Watkins wrote: > This is only a very rough estimate and does not consider all the issues. well that part is right anyway. ron

Re: [9fans] Barrelfish

> Details of the calculation: 7200 seconds * 30fps * 12*16 (50*50 pixel chunks) > * > 50 elementary arithmetic/logical operations in a pipeline (unrolled). > 7200*30*12*16*50 = 20 trillion (20,000,000,000,000) processing units. > This is only a very rough estimate and does not consider all

Re: [9fans] Barrelfish

On Sun, Oct 18, 2009 at 01:12:58AM +, Roman Shaposhnik wrote: > I would appreciate if the folks who were in the room correct me, but if I'm > not mistaken Ken was alluding to some FPGA work/ideas that he had done > and my interpretation of his comments was that if we *really* want to > make thi

Re: [9fans] Barrelfish

On Sat, Oct 17, 2009 at 07:45:40PM +0100, Eris Discordia wrote: > Another embarrassingly parallel problem, as Sam Watkins pointed out, arises > in digital audio processing. The pipelining + divide-and-conquer method which I would use for parallel systems is much like a series of production lines

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 8:26 AM, Sam Watkins wrote: > On Fri, Oct 16, 2009 at 12:18:47PM -0600, Latchesar Ionkov wrote: >> How do you plan to feed data to these 31 thousand processors so they >> can be fully utilized? Have you done the calculations and checked what >> memory bandwidth would you ne

Re: [9fans] Barrelfish

> I would use a pipelining + divide-and-conquer approach, with some RAM on chip. > Units would be smaller than a 6502, more like an adder. you mean like the Thinking Machines CM-1 and CM-2? it's not like it hasn't been done before :)

Re: [9fans] Barrelfish

On Fri, Oct 16, 2009 at 12:18:47PM -0600, Latchesar Ionkov wrote: > How do you plan to feed data to these 31 thousand processors so they > can be fully utilized? Have you done the calculations and checked what > memory bandwidth would you need for that? I would use a pipelining + divide-and-conque

Re: [9fans] Barrelfish

On Mon, Oct 19, 2009 at 6:44 AM, erik quanstrom wrote: > > At the hardware level we do have message passing between a > > processor and the memory controller -- this is exactly the > > same as talking to a shared server and has the same issues of > > scaling etc. If you have very few clients, a si

Re: [9fans] Barrelfish

The misinterpretation of Moore's Law is to blame here, of course: Moore is a smart guy and he was talking about transistor density, but pop culture made is sound like he was talking speed up. For some time the two were in lock-step. Not anymore. I ran the numbers the other day based on sped

Re: [9fans] Barrelfish

> At the hardware level we do have message passing between a > processor and the memory controller -- this is exactly the > same as talking to a shared server and has the same issues of > scaling etc. If you have very few clients, a single shared > server is indeed a cost effective solution. just

Re: [9fans] Barrelfish

Since we seem to be having the parallel programming discussion again please look at this: https://asc.llnl.gov/sequoia/benchmarks/ The summaries are interesting. ron

Re: [9fans] Barrelfish

On Sun, 18 Oct 2009 06:22:33 PDT Roman Shaposhnik wrote: > On Sun, Oct 18, 2009 at 6:06 AM, Roman Shaposhnik wrot > e > >> It is. But what's your proposal on code sharing? All those PC > >> registers belonging to > >> different cores have to point somewhere. Is that somewhere is not shared m > e

Re: [9fans] Barrelfish

>> See cons/scons. > > Thanks for the suggestion. In this project someone actually > made that same suggestion, but rudely?basically insulting the > very thought that someone would be stupid enough to base a > build system for commercial software on make. The non-Plan 9 world suffers from several

Re: [9fans] Barrelfish

On Sun, Oct 18, 2009 at 6:06 AM, Roman Shaposhnik wrote >> It is. But what's your proposal on code sharing? All those PC >> registers belonging to >> different cores have to point somewhere. Is that somewhere is not shared me= >> mory >> the code has to be put there for every single core, right? >

Re: [9fans] Barrelfish

Could be wrong, but I think he's referring to the SPURS Engine: http://en.wikipedia.org/wiki/SpursEngine I had never seen that but I had encountered news on the Leadtek card based on it. --On Saturday, October 17, 2009 16:18 -0500 Eric Van Hensbergen wrote: Could be wrong, but I think he

Re: [9fans] Barrelfish

Interesting, 1080p? you have a link? The one I read long ago: First Google "sponsored link:" (This one's an industrial rackmounted machine. No expansion card.) BadaBoom is just software that uses C

Re: [9fans] Barrelfish

On Sun, 18 Oct 2009 01:15:45 - Roman Shaposhnik wrote: > On Thu, Oct 15, 2009 at 10:53 AM, Sam Watkins wrote: > > On Wed, Oct 14, 2009 at 06:50:28PM -0700, Roman Shaposhnik wrote: > >> > The mention that "... the overhead of cache coherence restricts the ab= > ility > >> > to scale up to ev

Re: [9fans] Barrelfish

>> One thing complicating this is that make and its common >> variants aren't smart enough to handle the case where >> version control systems regress a file and present an >> earlier date not newer than the derived object. > > See cons/scons. Thanks for the suggestion. In this project someone ac

Re: [9fans] Barrelfish

On Thu, Oct 15, 2009 at 10:53 AM, Sam Watkins wrote: > On Wed, Oct 14, 2009 at 06:50:28PM -0700, Roman Shaposhnik wrote: >> > The mention that "... the overhead of cache coherence restricts the ability >> > to scale up to even 80 cores" is also eye openeing. If we're at aprox 8 >> > cores today, t

Re: [9fans] Barrelfish

On Fri, Oct 16, 2009 at 5:21 PM, Sam Watkins wrote: > On Thu, Oct 15, 2009 at 04:21:16PM +0100, roger peppe wrote: >> BTW it seems the gates quote is false: >> >> http://en.wikiquote.org/wiki/Bill_Gates > > maybe the Ken quote is false too - hard to believe he's that out of touch I think the reve

Re: [9fans] Barrelfish

On Sun, Oct 18, 2009 at 12:06 AM, ron minnich wrote: > the use of qualitative terms such as "embarassingly parallel" often > leads to confusion. > > Scaling can be measured. It can be quantified. Nothing scales forever, > because at some point you want to get an answer back to a person, > and/or t

Re: [9fans] Barrelfish

the use of qualitative terms such as "embarassingly parallel" often leads to confusion. Scaling can be measured. It can be quantified. Nothing scales forever, because at some point you want to get an answer back to a person, and/or the components of the app need to talk to each other. It's these b

Re: [9fans] Barrelfish

Could be wrong, but I think he's referring to the SPURS Engine: http://en.wikipedia.org/wiki/SpursEngine -eric On Oct 17, 2009, at 4:07 PM, Steve Simon wrote: I'm a tiny fish, this is the ocean. Nevertheless, I venture: there are already Cell-based expansion cards out there for "rea

Re: [9fans] Barrelfish

> I'm a tiny fish, this is the ocean. Nevertheless, I venture: there are > already Cell-based expansion cards out there for "real-time" > H.264/VC-1/MPEG-4 AVC encoding. Meaning, 1080p video in, H.264 stream out, > "real-time." Interesting, 1080p? you have a link? -Steve

Re: [9fans] Barrelfish

> One thing complicating this is that make and its common > variants aren't smart enough to handle the case where > version control systems regress a file and present an > earlier date not newer than the derived object. See cons/scons. Dave Eckhardt

Re: [9fans] Barrelfish

There is a vast range of applications that cannot be managed in real time using existing single-core technology. please name one. I'm a tiny fish, this is the ocean. Nevertheless, I venture: there are already Cell-based expansion cards out there for "real-time" H.264/VC-1/MPEG-4 AVC encoding

Re: [9fans] Barrelfish

On Fri, Oct 16, 2009 at 10:03 AM, Sam Watkins wrote: > On Thu, Oct 15, 2009 at 12:50:48PM +0100, Richard Miller wrote: >> > It's easy to write good code that will take advantage of arbitrarily many >> > processors to run faster / smoother, if you have a proper language for the >> > task. >> >> ...

Re: [9fans] Barrelfish

> maybe the Ken quote is false too - hard to believe he's that out of touch The whole table was ganging up on Roman and his crazy idea, I believe ;). The objection mostly was to Intel dumping the complexity of another core on the programmer after it ran out of steam in containing parallelism with

Re: [9fans] Barrelfish

i missed this the first time On Fri Oct 16 17:19:36 EDT 2009, jason.cat...@gmail.com wrote: > > Instantaneous building of a complex project from source. > > (I'm defining instantaneous as less than 1 second for this.) > > Depends on how complex. good story. it's hard to know when to rewrite. g

Re: [9fans] Barrelfish

> Instantaneous building of a complex project from source. > (I'm defining instantaneous as less than 1 second for this.) Depends on how complex. I spent two years retrofitting a commercial parallel make (which only promises a 20x speedup, even with dedicated hardware) into the build system of a

Re: [9fans] Barrelfish

ron minnich wrote: Insignificant bits of code that were not even visible suddenly dominate the time. Reminds me of some project development teams. Maybe Marvin Minsky was on to something.

Re: [9fans] Barrelfish

> > > There is a vast range of applications that cannot > > > be managed in real time using existing single-core technology. > > > > please name one. > > Your apparent lack of imagination surprises me. > > Surely you can see that a whole range of applications becomes possible when > using a mas

Re: [9fans] Barrelfish

On Fri, Oct 16, 2009 at 10:03 AM, Sam Watkins wrote: > So it would only be a problem supposing that a significant part of the program > is unparallelizable.  I can think of many many tasks where "Amdahl's law" is > not going to be a problem at all, for a properly designed system. > > For example

Re: [9fans] Barrelfish

How do you plan to feed data to these 31 thousand processors so they can be fully utilized? Have you done the calculations and checked what memory bandwidth would you need for that? There are reasons Pentium 4 has the performance you mention, but these reasons don't necessary include the "great hu

Re: [9fans] Barrelfish

On Thu, Oct 15, 2009 at 04:21:16PM +0100, roger peppe wrote: > BTW it seems the gates quote is false: > > http://en.wikiquote.org/wiki/Bill_Gates maybe the Ken quote is false too - hard to believe he's that out of touch

Re: [9fans] Barrelfish

> > There is a vast range of applications that cannot > > be managed in real time using existing single-core technology. > > please name one. Your apparent lack of imagination surprises me. Surely you can see that a whole range of applications becomes possible when using a massively parallel sy

Re: [9fans] Barrelfish

On Thu, Oct 15, 2009 at 12:50:48PM +0100, Richard Miller wrote: > > It's easy to write good code that will take advantage of arbitrarily many > > processors to run faster / smoother, if you have a proper language for the > > task. > > ... and if you can find a way around Amdahl's law (qv). "The s

Re: [9fans] Barrelfish

Christopher Nielsen wrote: I think this is an interesting approach. There are several interesting ideas being pursued here. The focus of the discussion has been on the multikernel approach, which I think has merit. Something that has not been discussed here is the wide use of DSLs for systems p

Re: [9fans] Barrelfish

I think this is an interesting approach. There are several interesting ideas being pursued here. The focus of the discussion has been on the multikernel approach, which I think has merit. Something that has not been discussed here is the wide use of DSLs for systems programming, and using haskell

Re: [9fans] Barrelfish

it sounds like the kernel (L4-like, supposedly tuned to the specific hardware) and the "monitor" (userland, portable) are shared, from the paper. I'm confused what you mean by "shared". ugh, I completely botched that.. I meant "replicated" not "shared". -eric Tim Newsham http://www.the

Re: [9fans] Barrelfish

On Thu Oct 15 11:06:41 EDT 2009, leim...@gmail.com wrote: > On Thu, Oct 15, 2009 at 6:11 AM, hiro <23h...@googlemail.com> wrote: > > > > There is a vast range of applications that cannot > > > be managed in real time using existing single-core technology. > > > > I'm sorry to interrupt your discu

Re: [9fans] Barrelfish

BTW it seems the gates quote is false: http://en.wikiquote.org/wiki/Bill_Gates

Re: [9fans] Barrelfish

On Thu, Oct 15, 2009 at 6:52 AM, erik quanstrom wrote: > On Thu Oct 15 09:41:29 EDT 2009, 9f...@hamnavoe.com wrote: > > > in fact, i believe i used an apple ][ around > > > that time that had ~744k. > > > > Are you sure that was an apple II? When I bought mine I remember > > wrestling with the dec

Re: [9fans] Barrelfish

On Thu, Oct 15, 2009 at 6:11 AM, hiro <23h...@googlemail.com> wrote: > > There is a vast range of applications that cannot > > be managed in real time using existing single-core technology. > > I'm sorry to interrupt your discussion, but what is real time? > > Real time just means "fast enough to

Re: [9fans] Barrelfish

On Thu Oct 15 09:41:29 EDT 2009, 9f...@hamnavoe.com wrote: > > in fact, i believe i used an apple ][ around > > that time that had ~744k. > > Are you sure that was an apple II? When I bought mine I remember > wrestling with the decision over whether to get the standard 48k of > RAM or upgrade to t

Re: [9fans] Barrelfish

On Thu Oct 15 08:01:29 EDT 2009, w...@conducive.org wrote: > Richard Miller wrote: > >> It's easy to write good code that will take advantage of arbitrarily many > >> processors to run faster / smoother, if you have a proper language for the > >> task. > > > > ... and if you can find a way around

Re: [9fans] Barrelfish

> in fact, i believe i used an apple ][ around > that time that had ~744k. Are you sure that was an apple II? When I bought mine I remember wrestling with the decision over whether to get the standard 48k of RAM or upgrade to the full 64k. This was long before the IBM PC.

Re: [9fans] Barrelfish

On Thu Oct 15 06:55:24 EDT 2009, s...@nipl.net wrote: > task. With respect to Ken, Bill Gates said something along the lines of "who > would need more than 640K?". on the other hand, there were lots of people using computers with 4mb of memory when bill gates said this. it was quite easy to see

Re: [9fans] Barrelfish

> There is a vast range of applications that cannot > be managed in real time using existing single-core technology. I'm sorry to interrupt your discussion, but what is real time?

Re: [9fans] Barrelfish

Richard Miller wrote: It's easy to write good code that will take advantage of arbitrarily many processors to run faster / smoother, if you have a proper language for the task. ... and if you can find a way around Amdahl's law (qv). http://www.cis.temple.edu/~shi/docs/amdahl/amdahl.html

Re: [9fans] Barrelfish

On Oct 15, 2009, at 3:53 AM, Sam Watkins wrote: With respect to Ken, Bill Gates said something along the lines of "who would need more than 640K?" With respect to Ken, from Roman's report, you only know that he asked a question. Roman was the one without an answer, and no one echoed Gates

Re: [9fans] Barrelfish

> It's easy to write good code that will take advantage of arbitrarily many > processors to run faster / smoother, if you have a proper language for the > task. ... and if you can find a way around Amdahl's law (qv).

Re: [9fans] Barrelfish

On Wed, Oct 14, 2009 at 06:50:28PM -0700, Roman Shaposhnik wrote: > > The mention that "... the overhead of cache coherence restricts the ability > > to scale up to even 80 cores" is also eye openeing. If we're at aprox 8 > > cores today, thats only 5 yrs away (if we double cores every > > 1.5 yrs)

Re: [9fans] Barrelfish

On Oct 14, 2009, at 9:32 PM, Tim Newsham wrote: If you look at the core of Barrelfish, you'll see that this is essentially what they are doing -- essentially using an extremely small microkernel (like L4) that's very efficient at various forms of message passing. That's the only thing tha

Re: [9fans] Barrelfish

If you look at the core of Barrelfish, you'll see that this is essentially what they are doing -- essentially using an extremely small microkernel (like L4) that's very efficient at various forms of message passing. That's the only thing that is duplicated on the various cores. The services th

Re: [9fans] Barrelfish

On Oct 14, 2009, at 8:05 PM, Roman Shaposhnik wrote: And how does one deal with heterogeneous cores and complex on chip interconnect topologies? Good question. Do they have to be heterogeneous? My oppinion is that the future of big multicore will be more Cell-like. They don't have to be

Re: [9fans] Barrelfish

On Oct 14, 2009, at 7:50 PM, Roman Shaposhnik wrote: On Wed, Oct 14, 2009 at 2:21 PM, Tim Newsham wrote: I'm not familiar with the berkeley work. Sorry I can't readily find the paper (the URL is somewhere on IMAP @Sun :-() But it got presented at the Birkeley ParLab overview given to us

Re: [9fans] Barrelfish

> And how does one deal with heterogeneous cores and complex on chip > interconnect topologies? Good question. Do they have to be heterogeneous? My oppinion is that the future of big multicore will be more Cell-like. > There's no real evdence that single kernels do well with hundreds of real > co

Re: [9fans] Barrelfish

On Wed, Oct 14, 2009 at 2:21 PM, Tim Newsham wrote: > I'm not familiar with the berkeley work. Sorry I can't readily find the paper (the URL is somewhere on IMAP @Sun :-() But it got presented at the Birkeley ParLab overview given to us by Dave Patterson. They were talking thin hypervisors and th

Re: [9fans] Barrelfish

> > > > Did you find any ideas there particularly engaging? >> > > I'm still digesting it. My first thoughts were that if my pc is a > distributed heterogeneous computer, what lessons it can borrow from earlier > work on distributed heterogeneous computing (ie. plan9). > > I found the discussion

Re: [9fans] Barrelfish

Do want. On Thu, Oct 15, 2009 at 12:10 AM, Eric Van Hensbergen wrote: > On Oct 14, 2009, at 3:42 PM, Noah Evans wrote: > >> http://ramp.eecs.berkeley.edu/ >> >> Tim: Andrew Baumann is aware of Plan 9 but their approach is quite a >> bit different. They are consciously avoiding the networking issu

Re: [9fans] Barrelfish

On Oct 14, 2009, at 3:42 PM, Noah Evans wrote: http://ramp.eecs.berkeley.edu/ Tim: Andrew Baumann is aware of Plan 9 but their approach is quite a bit different. They are consciously avoiding the networking issue as well(they've been asked to extend their messaging model to the network and have

Re: [9fans] Barrelfish

Have you read the paper? I don't think you understand the difference in scope or goals here. On Wed, Oct 14, 2009 at 11:45 PM, erik quanstrom wrote: >> http://ramp.eecs.berkeley.edu/ >> >> Tim: Andrew Baumann is aware of Plan 9 but their approach is quite a >> bit different. They are consciously

Re: [9fans] Barrelfish

> http://ramp.eecs.berkeley.edu/ > > Tim: Andrew Baumann is aware of Plan 9 but their approach is quite a > bit different. They are consciously avoiding the networking issue as > well(they've been asked to extend their messaging model to the network > and have actively said they're not interested)

Re: [9fans] Barrelfish

http://ramp.eecs.berkeley.edu/ Tim: Andrew Baumann is aware of Plan 9 but their approach is quite a bit different. They are consciously avoiding the networking issue as well(they've been asked to extend their messaging model to the network and have actively said they're not interested). On Wed, O

Re: [9fans] Barrelfish

And how does one deal with heterogeneous cores and complex on chip interconnect topologies? Barrelfish also gas a nice benefit in that it could span coherence domains. There's no real evdence that single kernels do well with hundreds of real cores (as opposed to hw threads) - in fact most

Re: [9fans] Barrelfish

> I'm not familiar with the berkeley work. Me either. Any chance of some references to this?

Re: [9fans] Barrelfish

Somehow this feels related to the work that came out of Berkeley a year or so ago. I'm still not convinced what is the benefits of multiple kernels. If you are managing a couple of 100s of cores a single kernel would do just fine, once the industry is ready for a couple dozen of thousands PUs -- t

Re: [9fans] Barrelfish

On Wed, Oct 14, 2009 at 12:09 PM, Tim Newsham wrote: > Rethinking multi-core systems as distributed heterogeneous > systems.  Thoughts? Somehow this feels related to the work that came out of Berkeley a year or so ago. I'm still not convinced what is the benefits of multiple kernels. If you are m

[9fans] Barrelfish

Rethinking multi-core systems as distributed heterogeneous systems. Thoughts? http://www.sigops.org/sosp/sosp09/papers/baumann-sosp09.pdf Tim Newsham http://www.thenewsh.com/~newsham/