Re: [U-Boot] [PATCH] spl: unbreak CONFIG_SPL_MULTI_DTB_FIT after fixing CONFIG_OF_EMBED

2018-01-10 Thread Lokesh Vutla


On Wednesday 10 January 2018 12:32 PM, Goldschmidt Simon wrote:
> Commit 9bd76b80 "spl: make CONFIG_OF_EMBED pass dts through fdtgrep"
> moved the fdtgrep code from scripts/Makefile.spl to dts/Makefile so
> that the dtb is stripped in embedded mode, too.
> 
> This broke CONFIG_SPL_MULTI_DTB_FIT where fdtgrep is still called
> from scripts/Makefile.spl to strip all dtbs in CONFIG_SPL_OF_LIST.
> To fix that, cmd_fdtgrep is brought back into scripts/Makefile.spl
> at the downside of having it duplicated in two makefiles.

Missing Signed-off-by? Also a Reported-by credits would be nice :)

> ---
>  scripts/Makefile.spl | 16 
>  1 file changed, 16 insertions(+)
> 
> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
> index 64390e5785..72e74f14c3 100644
> --- a/scripts/Makefile.spl
> +++ b/scripts/Makefile.spl
> @@ -239,6 +239,22 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
>   @bss_size_str=$(shell $(NM) $< | awk 'BEGIN {size = 0} /__bss_size/ 
> {size = $$1} END {print "ibase=16; " toupper(size)}' | bc); \
>   dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2>/dev/null;
>  
> +# Pass the original device tree file through fdtgrep twice. The first pass
> +# removes any unwanted nodes (i.e. those which don't have the
> +# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second
> +# pass removes various unused properties from the remaining nodes.
> +# The output is typically a much smaller device tree file.
> +ifeq ($(CONFIG_TPL_BUILD),y)
> +fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
> +else
> +fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl
> +endif
> +quiet_cmd_fdtgrep = FDTGREP $@
> +  cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
> + -n /chosen -n /config -O dtb | \
> + $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
> + $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
> +

hmm..we are duplicating code here. Why can't dtb build for
CONFIG_OF_EMBED be moved to scripts/Makefile.spl?

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH] arm: am33xx: security: Fix size calculation on header

2018-01-10 Thread Lokesh Vutla


On Wednesday 10 January 2018 02:02 AM, Andrew F. Davis wrote:
> From: Madan Srinivas 
> 
> Fix the size calculation in the verify boot. The header size
> should be subtracted from the image size, not be assigned to
> the image size.

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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[U-Boot] [PATCH v2] armv8: Remove dependency of SERDES for LS CHASIS3

2018-01-10 Thread Sriram Dash
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 3.

Signed-off-by: Sriram Dash 
---
Changes in v2:
  - Remove ifdef when including fsl_serdes.h

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 6c03dfb..0aa0673 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -69,6 +69,8 @@ config ARCH_LS1088A
bool
select ARMV8_SET_SMPEN
select FSL_LSCH3
+   select SYS_FSL_SRDS_1
+   select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50
@@ -102,6 +104,8 @@ config ARCH_LS2080A
select ARM_ERRATA_829520
select ARM_ERRATA_833471
select FSL_LSCH3
+   select SYS_FSL_SRDS_1
+   select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50
@@ -144,8 +148,6 @@ config FSL_LSCH2
 
 config FSL_LSCH3
bool
-   select SYS_FSL_SRDS_1
-   select SYS_HAS_SERDES
 
 config FSL_MC_ENET
bool "Management Complex network"
-- 
1.9.1

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Re: [U-Boot] [PATCH v2] musb: sunxi: Use base address from device tree

2018-01-10 Thread Marek Vasut
On 01/10/2018 07:10 AM, Jagan Teki wrote:
> On Thu, Jan 4, 2018 at 6:55 PM, Maxime Ripard
>  wrote:
>> On Sat, Dec 30, 2017 at 08:44:07PM +0800, Chen-Yu Tsai wrote:
>>> Now that the musb sunxi glue driver is completely device model / device
>>> tree driven, we should use the base address from the device tree,
>>> instead of hard-coding it in the source code.
>>>
>>> Fixes: 3a61b080acee ("musb: sunxi: switch to the device model")
>>> Signed-off-by: Chen-Yu Tsai 
>>
>> Acked-by: Maxime Ripard 
> 
> Applied to u-boot-sunxi/master

This is a USB patch, this goes through USB tree, so drop it.

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH v1 01/03] spmi: msm: display the PMIC Arb version (debug)

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

Signed-off-by: Jorge Ramirez-Ortiz 
---
 drivers/spmi/spmi-msm.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
index c226913..e9bfbb0 100644
--- a/drivers/spmi/spmi-msm.c
+++ b/drivers/spmi/spmi-msm.c
@@ -17,6 +17,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+
+/* PMIC Arbiter configuration registers */
+#define PMIC_ARB_VERSION   0x
+#define PMIC_ARB_VERSION_V2_MIN0x2001
+
 #define ARB_CHANNEL_OFFSET(n)  (0x4 * (n))
 #define SPMI_CH_OFFSET(chnl)   ((chnl) * 0x8000)
 
@@ -148,6 +153,8 @@ static int msm_spmi_probe(struct udevice *dev)
struct udevice *parent = dev->parent;
struct msm_spmi_priv *priv = dev_get_priv(dev);
int node = dev_of_offset(dev);
+   u32 hw_ver;
+   bool is_v1;
int i;
 
priv->arb_chnl = devfdt_get_addr(dev);
@@ -155,6 +162,12 @@ static int msm_spmi_probe(struct udevice *dev)
dev_of_offset(parent), node, "reg", 1, NULL, false);
priv->spmi_obs = fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
dev_of_offset(parent), node, "reg", 2, NULL, false);
+
+   hw_ver = readl(priv->arb_chnl + PMIC_ARB_VERSION - 0x800);
+   is_v1  = (hw_ver < PMIC_ARB_VERSION_V2_MIN);
+
+   dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", (is_v1 ? 1 : 2), hw_ver);
+
if (priv->arb_chnl == FDT_ADDR_T_NONE ||
priv->spmi_core == FDT_ADDR_T_NONE ||
priv->spmi_obs == FDT_ADDR_T_NONE)
-- 
2.7.4

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[U-Boot] [PATCH v1 03/03] dm: core: parse chosen node

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Rob Clark 

This is the node that would contain, for example, the framebuffer setup
by an earlier stage.

Signed-off-by: Rob Clark 
---
 arch/sandbox/dts/test.dts |  7 +++
 drivers/core/root.c   | 12 
 test/dm/bus.c |  2 +-
 test/dm/test-fdt.c|  2 +-
 4 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e67d428..3f9e788 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -478,6 +478,13 @@
wdt0: wdt@0 {
compatible = "sandbox,wdt";
};
+
+   chosen {
+   chosen-test {
+   compatible = "denx,u-boot-fdt-test";
+   reg = <9 1>;
+   };
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 976e2c4..5a1c599 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -266,6 +266,18 @@ static int dm_scan_fdt_node(struct udevice *parent, const 
void *blob,
for (offset = fdt_first_subnode(blob, offset);
 offset > 0;
 offset = fdt_next_subnode(blob, offset)) {
+
+   /* "chosen" node isn't a device itself but may contain some: */
+   if (!strcmp(fdt_get_name(blob, offset, NULL), "chosen")) {
+   pr_debug("parsing subnodes of \"chosen\"\n");
+
+   err = dm_scan_fdt_node(parent, blob, offset,
+  pre_reloc_only);
+   if (err && !ret)
+   ret = err;
+   continue;
+   }
+
if (pre_reloc_only &&
!dm_fdt_pre_reloc(blob, offset))
continue;
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 7006d41..1da398a 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -105,7 +105,7 @@ UCLASS_DRIVER(testbus) = {
 /* Test that we can probe for children */
 static int dm_test_bus_children(struct unit_test_state *uts)
 {
-   int num_devices = 6;
+   int num_devices = 7;
struct udevice *bus;
struct uclass *uc;
 
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index dcc2ef8..920ccbf 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -167,7 +167,7 @@ int dm_check_devices(struct unit_test_state *uts, int 
num_devices)
 /* Test that FDT-based binding works correctly */
 static int dm_test_fdt(struct unit_test_state *uts)
 {
-   const int num_devices = 6;
+   const int num_devices = 7;
struct udevice *dev;
struct uclass *uc;
int ret;
-- 
2.7.4

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[U-Boot] [PATCH v1 02/03] poplar: configs: increase gunzip buffer size for the kernel

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

Signed-off-by: Jorge Ramirez-Ortiz 
---
 include/configs/poplar.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/poplar.h b/include/configs/poplar.h
index 1c39ed1..8a12b52 100644
--- a/include/configs/poplar.h
+++ b/include/configs/poplar.h
@@ -18,7 +18,7 @@
 #define CONFIG_NR_DRAM_BANKS   2
 
 /* SYS */
-#define CONFIG_SYS_BOOTM_LEN   0x140
+#define CONFIG_SYS_BOOTM_LEN   SZ_64M
 #define CONFIG_SYS_INIT_SP_ADDR0x20
 #define CONFIG_SYS_LOAD_ADDR   0x80
 #define CONFIG_SYS_MALLOC_LEN  SZ_32M
-- 
2.7.4

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[U-Boot] [PATCH v1 01/05] env: enable accessing the environment in an EXT4 partition

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

For example to store the environment in a file named "/uboot.env" in MMC
"0", where partition "1" contains the EXT4 filesystem, the following
configs should be added to the board's default config:

  CONFIG_ENV_IS_IN_EXT4=y
  CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
  CONFIG_ENV_EXT4_FILE="/uboot.env"
  CONFIG_ENV_EXT4_INTERFACE="mmc"

Signed-off-by: Jorge Ramirez-Ortiz 
---
 env/Kconfig | 39 +++
 env/env.c   |  2 ++
 env/ext4.c  | 20 ++--
 3 files changed, 51 insertions(+), 10 deletions(-)

diff --git a/env/Kconfig b/env/Kconfig
index bef6e89..692f863 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -81,6 +81,13 @@ config ENV_IS_IN_FAT
  - CONFIG_FAT_WRITE:
  This must be enabled. Otherwise it cannot save the environment file.
 
+config ENV_IS_IN_EXT4
+   bool "Environment is in a EXT4 filesystem"
+   depends on !CHAIN_OF_TRUST
+   select EXT4_WRITE
+   help
+ Define this if you want to use the EXT4 file system for the 
environment.
+
 config ENV_IS_IN_FLASH
bool "Environment in flash memory"
depends on !CHAIN_OF_TRUST
@@ -396,6 +403,38 @@ config ENV_FAT_FILE
  It's a string of the FAT file name. This file use to store the
  environment.
 
+config ENV_EXT4_INTERFACE
+   string "Name of the block device for the environment"
+   depends on ENV_IS_IN_EXT4
+   help
+ Define this to a string that is the name of the block device.
+
+config ENV_EXT4_DEVICE_AND_PART
+   string "Device and partition for where to store the environemt in EXT4"
+   depends on ENV_IS_IN_EXT4
+   help
+ Define this to a string to specify the partition of the device. It can
+ be as following:
+
+   "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
+  - "D:P": device D partition P. Error occurs if device D has no
+   partition table.
+  - "D:0": device D.
+  - "D" or "D:": device D partition 1 if device D has partition
+ table, or the whole device D if has no partition
+ table.
+  - "D:auto": first partition in device D with bootable flag set.
+  If none, first valid partition in device D. If no
+  partition table then means device D.
+
+config ENV_EXT4_FILE
+   string "Name of the EXT4 file to use for the environemnt"
+   depends on ENV_IS_IN_EXT4
+   default "uboot.env"
+   help
+ It's a string of the EXT4 file name. This file use to store the
+ environment (explicit path to the file)
+
 if ARCH_SUNXI
 
 config ENV_OFFSET
diff --git a/env/env.c b/env/env.c
index 76a5608..7455632 100644
--- a/env/env.c
+++ b/env/env.c
@@ -32,6 +32,8 @@ static enum env_location env_get_default_location(void)
return ENVL_EEPROM;
else if IS_ENABLED(CONFIG_ENV_IS_IN_FAT)
return ENVL_FAT;
+   else if IS_ENABLED(CONFIG_ENV_IS_IN_EXT4)
+   return ENVL_EXT4;
else if IS_ENABLED(CONFIG_ENV_IS_IN_FLASH)
return ENVL_FLASH;
else if IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
diff --git a/env/ext4.c b/env/ext4.c
index 6520221..07fd061 100644
--- a/env/ext4.c
+++ b/env/ext4.c
@@ -46,8 +46,8 @@ static int env_ext4_save(void)
if (err)
return err;
 
-   part = blk_get_device_part_str(EXT4_ENV_INTERFACE,
-   EXT4_ENV_DEVICE_AND_PART,
+   part = blk_get_device_part_str(CONFIG_ENV_EXT4_INTERFACE,
+   CONFIG_ENV_EXT4_DEVICE_AND_PART,
&dev_desc, &info, 1);
if (part < 0)
return 1;
@@ -57,16 +57,16 @@ static int env_ext4_save(void)
 
if (!ext4fs_mount(info.size)) {
printf("\n** Unable to use %s %s for saveenv **\n",
-  EXT4_ENV_INTERFACE, EXT4_ENV_DEVICE_AND_PART);
+  CONFIG_ENV_EXT4_INTERFACE, 
CONFIG_ENV_EXT4_DEVICE_AND_PART);
return 1;
}
 
-   err = ext4fs_write(EXT4_ENV_FILE, (void *)&env_new, sizeof(env_t));
+   err = ext4fs_write(CONFIG_ENV_EXT4_FILE, (void *)&env_new, 
sizeof(env_t));
ext4fs_close();
 
if (err == -1) {
printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
-   EXT4_ENV_FILE, EXT4_ENV_INTERFACE, dev, part);
+   CONFIG_ENV_EXT4_FILE, CONFIG_ENV_EXT4_INTERFACE, dev, 
part);
return 1;
}
 
@@ -84,8 +84,8 @@ static int env_ext4_load(void)
int err;
loff_t off;
 
-   part = blk_get_device_part_str(EXT4_ENV_INTERFACE,
-   EXT4_ENV_DEVICE_AND_PART,
+   part = blk_get_device_part_str(CONFIG_ENV_EXT4_INTERFACE,
+   CONFIG_ENV_

[U-Boot] [PATCH v1 04/05] db820c: enable pmic gpios for pm8994

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

Signed-off-by: Jorge Ramirez-Ortiz 
---
 arch/arm/dts/dragonboard820c.dts  | 43 +++
 configs/dragonboard820c_defconfig |  7 +++
 drivers/gpio/pm8916_gpio.c|  7 +--
 3 files changed, 55 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts
index bad5a1e..3086d60 100644
--- a/arch/arm/dts/dragonboard820c.dts
+++ b/arch/arm/dts/dragonboard820c.dts
@@ -61,5 +61,48 @@
 clock = <&gcc 0>;
clock-frequency = <2>;
 };
+
+   spmi@400f000 {
+   compatible = "qcom,spmi-pmic-arb";
+   reg = <0x400f800 0x200>,
+ <0x440 0x40>,
+ <0x4c0 0x40>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+
+   pmic0: pm8994@0 {
+   compatible = "qcom,spmi-pmic";
+   reg = <0x0 0x1>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+
+   pm8994_pon: pm8994_pon@800 {
+   compatible = "qcom,pm8994-pwrkey";
+   reg = <0x800 0x96>;
+   #gpio-cells = <2>;
+   gpio-controller;
+   gpio-bank-name="pm8994_key.";
+   };
+
+   pm8994_gpios: pm8994_gpios@c000 {
+   compatible = "qcom,pm8994-gpio";
+   reg = <0xc000 0x400>;
+   gpio-controller;
+   gpio-count = <24>;
+   #gpio-cells = <2>;
+   gpio-bank-name="pm8994.";
+   };
+   };
+
+   pmic1: pm8994@1 {
+   compatible = "qcom,spmi-pmic";
+   reg = <0x1 0x1>;
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   };
+   };
};
+
 };
+
+#include "dragonboard820c-uboot.dtsi"
diff --git a/configs/dragonboard820c_defconfig 
b/configs/dragonboard820c_defconfig
index 788ff28..5e25e2e 100644
--- a/configs/dragonboard820c_defconfig
+++ b/configs/dragonboard820c_defconfig
@@ -23,11 +23,18 @@ CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PMIC=y
 CONFIG_OF_CONTROL=y
 CONFIG_MSM_SERIAL=y
+CONFIG_SPMI_MSM=y
 CONFIG_MMC_SDHCI_MSM=y
 CONFIG_MMC_SDHCI=y
 CONFIG_DM_MMC=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_PM8916=y
+CONFIG_PM8916_GPIO=y
 CONFIG_CLK=y
 CONFIG_PSCI_RESET=y
 CONFIG_ENV_IS_IN_EXT4=y
diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
index 9ec2a24..056b982 100644
--- a/drivers/gpio/pm8916_gpio.c
+++ b/drivers/gpio/pm8916_gpio.c
@@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define REG_STATUS_VAL_MASK0x1
 
 /* MODE_CTL */
-#define REG_CTL   0x40
+#define REG_CTL0x40
 #define REG_CTL_MODE_MASK   0x70
 #define REG_CTL_MODE_INPUT  0x00
 #define REG_CTL_MODE_INOUT  0x20
@@ -183,7 +183,7 @@ static int pm8916_gpio_probe(struct udevice *dev)
return -ENODEV;
 
reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE);
-   if (reg != 0x5)
+   if (reg != 0x5 && reg != 0x1)
return -ENODEV;
 
return 0;
@@ -203,6 +203,7 @@ static int pm8916_gpio_ofdata_to_platdata(struct udevice 
*dev)
 
 static const struct udevice_id pm8916_gpio_ids[] = {
{ .compatible = "qcom,pm8916-gpio" },
+   { .compatible = "qcom,pm8994-gpio" },   /* 22 GPIO's */
{ }
 };
 
@@ -278,6 +279,7 @@ static int pm8941_pwrkey_ofdata_to_platdata(struct udevice 
*dev)
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 
uc_priv->gpio_count = 2;
+   uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
if (uc_priv->bank_name == NULL)
uc_priv->bank_name = "pm8916_key";
 
@@ -286,6 +288,7 @@ static int pm8941_pwrkey_ofdata_to_platdata(struct udevice 
*dev)
 
 static const struct udevice_id pm8941_pwrkey_ids[] = {
{ .compatible = "qcom,pm8916-pwrkey" },
+   { .compatible = "qcom,pm8994-pwrkey" },
{ }
 };
 
-- 
2.7.4

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[U-Boot] [PATCH v1 02/05] arm: mach-snapdragon: refactor clock driver

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

In preparation to add support for the Dragonboard820c (APQ8096),
refactor the current Snapdragon clock driver.

No new functionality has been added.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 arch/arm/mach-snapdragon/Makefile  |   6 +-
 arch/arm/mach-snapdragon/clock-apq8016.c   | 181 ++---
 arch/arm/mach-snapdragon/clock-snapdragon.c| 134 +++
 arch/arm/mach-snapdragon/clock-snapdragon.h|  40 +
 .../mach-snapdragon/include/mach/sysmap-apq8016.h  |  29 +++-
 5 files changed, 217 insertions(+), 173 deletions(-)
 create mode 100644 arch/arm/mach-snapdragon/clock-snapdragon.c
 create mode 100644 arch/arm/mach-snapdragon/clock-snapdragon.h

diff --git a/arch/arm/mach-snapdragon/Makefile 
b/arch/arm/mach-snapdragon/Makefile
index d82a04d..74f90dc 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -4,5 +4,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += clock-apq8016.o
-obj-y += sysmap-apq8016.o
+obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o
+obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
+obj-y += clock-snapdragon.o
diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c 
b/arch/arm/mach-snapdragon/clock-apq8016.c
index da05015..a242417 100644
--- a/arch/arm/mach-snapdragon/clock-apq8016.c
+++ b/arch/arm/mach-snapdragon/clock-apq8016.c
@@ -14,146 +14,12 @@
 #include 
 #include 
 #include 
+#include "clock-snapdragon.h"
 
 /* GPLL0 clock control registers */
-#define GPLL0_STATUS0x2101C
 #define GPLL0_STATUS_ACTIVE BIT(17)
-
-#define APCS_GPLL_ENA_VOTE  0x45000
 #define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0)
 
-/* vote reg for blsp1 clock */
-#define APCS_CLOCK_BRANCH_ENA_VOTE  0x45004
-#define APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1 BIT(10)
-
-/* SDC(n) clock control registers; n=1,2 */
-
-/* block control register */
-#define SDCC_BCR(n) ((n * 0x1000) + 0x41000)
-/* cmd */
-#define SDCC_CMD_RCGR(n)((n * 0x1000) + 0x41004)
-/* cfg */
-#define SDCC_CFG_RCGR(n)((n * 0x1000) + 0x41008)
-/* m */
-#define SDCC_M(n)   ((n * 0x1000) + 0x4100C)
-/* n */
-#define SDCC_N(n)   ((n * 0x1000) + 0x41010)
-/* d */
-#define SDCC_D(n)   ((n * 0x1000) + 0x41014)
-/* branch control */
-#define SDCC_APPS_CBCR(n)   ((n * 0x1000) + 0x41018)
-#define SDCC_AHB_CBCR(n)((n * 0x1000) + 0x4101C)
-
-/* BLSP1 AHB clock (root clock for BLSP) */
-#define BLSP1_AHB_CBCR  0x1008
-
-/* Uart clock control registers */
-#define BLSP1_UART2_BCR 0x3028
-#define BLSP1_UART2_APPS_CBCR   0x302C
-#define BLSP1_UART2_APPS_CMD_RCGR   0x3034
-#define BLSP1_UART2_APPS_CFG_RCGR   0x3038
-#define BLSP1_UART2_APPS_M  0x303C
-#define BLSP1_UART2_APPS_N  0x3040
-#define BLSP1_UART2_APPS_D  0x3044
-
-/* CBCR register fields */
-#define CBCR_BRANCH_ENABLE_BIT  BIT(0)
-#define CBCR_BRANCH_OFF_BIT BIT(31)
-
-struct msm_clk_priv {
-   phys_addr_t base;
-};
-
-/* Enable clock controlled by CBC soft macro */
-static void clk_enable_cbc(phys_addr_t cbcr)
-{
-   setbits_le32(cbcr, CBCR_BRANCH_ENABLE_BIT);
-
-   while (readl(cbcr) & CBCR_BRANCH_OFF_BIT)
-   ;
-}
-
-/* clock has 800MHz */
-static void clk_enable_gpll0(phys_addr_t base)
-{
-   if (readl(base + GPLL0_STATUS) & GPLL0_STATUS_ACTIVE)
-   return; /* clock already enabled */
-
-   setbits_le32(base + APCS_GPLL_ENA_VOTE, APCS_GPLL_ENA_VOTE_GPLL0);
-
-   while ((readl(base + GPLL0_STATUS) & GPLL0_STATUS_ACTIVE) == 0)
-   ;
-}
-
-#define APPS_CMD_RGCR_UPDATE BIT(0)
-
-/* Update clock command via CMD_RGCR */
-static void clk_bcr_update(phys_addr_t apps_cmd_rgcr)
-{
-   setbits_le32(apps_cmd_rgcr, APPS_CMD_RGCR_UPDATE);
-
-   /* Wait for frequency to be updated. */
-   while (readl(apps_cmd_rgcr) & APPS_CMD_RGCR_UPDATE)
-   ;
-}
-
-struct bcr_regs {
-   uintptr_t cfg_rcgr;
-   uintptr_t cmd_rcgr;
-   uintptr_t M;
-   uintptr_t N;
-   uintptr_t D;
-};
-
-/* RCGR_CFG register fields */
-#define CFG_MODE_DUAL_EDGE (0x2 << 12) /* Counter mode */
-
-/* sources */
-#define CFG_CLK_SRC_CXO   (0 << 8)
-#define CFG_CLK_SRC_GPLL0 (1 << 8)
-#define CFG_CLK_SRC_MASK  (7 << 8)
-
-/* Mask for supported fields */
-#define CFG_MASK 0x3FFF
-
-#define CFG_DIVIDER_MASK 0x1F
-
-/* root set rate for clocks with half integer and MND divider */
-static void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
-int div, int m, int n, int source)
-{
-   uint32_t cfg;
-   /* M value for MND divider. */
-   uint32_t m_val = m;
-   /* NOT(N-M) value for MND divider. */
-   uint32_t n_val = ~((n)-(m)) * !!(n);
-   /* NOT 2D value for MND divider. */
-   uint32_t d_val = ~(n);
-
-   /* Program MND values */
-   writel(m_val, base + regs->M);
-  

[U-Boot] [PATCH v1 03/05] db820c: add qualcomm dragonboard 820C support

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

This commit adds support for 96Boards Dragonboard820C.

The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.

Features
 - 4x Kyro CPU (64 bit) up to 2.15GHz
 - USB2.0
 - USB3.0
 - ISP
 - Qualcomm Hexagon DSP
 - SD 3.0 (UHS-I)
 - UFS 2.0
 - Qualcomm Adreno 530 GPU
 - GPS
 - BT 4.2
 - Wi-Fi 2.4GHz, 5GHz (802.11ac)
 - PCIe 2.0
 - MIPI-CSI, MIPI-DSI
 - I2S

U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.

For detailed build instructions see readme.txt in the board directory.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/dragonboard820c.dts   |  65 +++
 arch/arm/mach-snapdragon/Kconfig   |  10 +
 arch/arm/mach-snapdragon/Makefile  |   2 +
 arch/arm/mach-snapdragon/clock-apq8096.c   |  62 +++
 .../mach-snapdragon/include/mach/sysmap-apq8096.h  |  29 ++
 arch/arm/mach-snapdragon/sysmap-apq8096.c  |  32 ++
 board/qualcomm/dragonboard820c/Kconfig |  15 +
 board/qualcomm/dragonboard820c/MAINTAINERS |   6 +
 board/qualcomm/dragonboard820c/Makefile|   8 +
 board/qualcomm/dragonboard820c/dragonboard820c.c   | 128 ++
 board/qualcomm/dragonboard820c/head.S  |  34 ++
 board/qualcomm/dragonboard820c/readme.txt  | 463 +
 board/qualcomm/dragonboard820c/u-boot.lds  | 106 +
 configs/dragonboard820c_defconfig  |  37 ++
 include/configs/dragonboard820c.h  |  72 
 16 files changed, 1071 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/dragonboard820c.dts
 create mode 100644 arch/arm/mach-snapdragon/clock-apq8096.c
 create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h
 create mode 100644 arch/arm/mach-snapdragon/sysmap-apq8096.c
 create mode 100644 board/qualcomm/dragonboard820c/Kconfig
 create mode 100644 board/qualcomm/dragonboard820c/MAINTAINERS
 create mode 100644 board/qualcomm/dragonboard820c/Makefile
 create mode 100644 board/qualcomm/dragonboard820c/dragonboard820c.c
 create mode 100644 board/qualcomm/dragonboard820c/head.S
 create mode 100644 board/qualcomm/dragonboard820c/readme.txt
 create mode 100644 board/qualcomm/dragonboard820c/u-boot.lds
 create mode 100644 configs/dragonboard820c_defconfig
 create mode 100644 include/configs/dragonboard820c.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a895c70..6d0587e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -211,7 +211,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1012a-rdb.dtb \
fsl-ls1012a-frdm.dtb

-dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
+dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
+dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb

 dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \
stm32f769-disco.dtb
diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts
new file mode 100644
index 000..bad5a1e
--- /dev/null
+++ b/arch/arm/dts/dragonboard820c.dts
@@ -0,0 +1,65 @@
+/*
+ * Qualcomm APQ8096 based Dragonboard 820C board device tree source
+ *
+ * (C) Copyright 2017 Jorge Ramirez-Ortiz 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton64.dtsi"
+
+/ {
+   model = "Qualcomm Technologies, Inc. DB820c";
+   compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = &blsp2_uart1;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0 0x8000 0 0xc000>;
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   };
+
+   soc: soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0 0 0x>;
+   compatible = "simple-bus";
+
+   gcc: clock-controller@30 {
+   compatible = "qcom,gcc-msm8996";
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   #power-domain-cells = <1>;
+   reg = <0x30 0x9>;
+   };
+
+   blsp2_uart1: serial@75b {
+   compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+   reg = <0x75b 0x1000>;
+   };
+
+   sdhc2: sdhci@74a4900 {
+compatible = "qcom,sdhci-msm-v4";
+reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
+index = <0x0>;
+bus-width = <4>;
+clock = <&gcc 0>;
+   clock-frequency = <20

[U-Boot] [PATCH v1 05/05] db820c: stop autoboot when vol- pressed

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

Signed-off-by: Jorge Ramirez-Ortiz 
---
 arch/arm/dts/dragonboard820c-uboot.dtsi  | 19 
 board/qualcomm/dragonboard820c/dragonboard820c.c | 37 +++-
 include/configs/dragonboard820c.h|  2 ++
 3 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/dragonboard820c-uboot.dtsi

diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi 
b/arch/arm/dts/dragonboard820c-uboot.dtsi
new file mode 100644
index 000..167e72c
--- /dev/null
+++ b/arch/arm/dts/dragonboard820c-uboot.dtsi
@@ -0,0 +1,19 @@
+/*
+ * U-Boot addition to handle Dragonboard 820c pins
+ *
+ * (C) Copyright 2017 Jorge Ramirez-Ortiz 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+&pm8994_pon {
+   key_vol_down {
+   gpios = <&pm8994_pon 1 0>;
+   label = "key_vol_down";
+   };
+
+   key_power {
+   gpios = <&pm8994_pon 0 0>;
+   label = "key_power";
+   };
+};
diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c 
b/board/qualcomm/dragonboard820c/dragonboard820c.c
index 8f40ba4..d4a20d2 100644
--- a/board/qualcomm/dragonboard820c/dragonboard820c.c
+++ b/board/qualcomm/dragonboard820c/dragonboard820c.c
@@ -1,7 +1,7 @@
 /*
  * Board init file for Dragonboard 820C
  *
- * (C) Copyright 2017 Jorge Ramirez-Ortiz   
+ * (C) Copyright 2017 Jorge Ramirez-Ortiz 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -126,3 +127,37 @@ void reset_cpu(ulong addr)
 {
psci_system_reset();
 }
+
+/* Check for vol- button - if pressed - stop autoboot */
+int misc_init_r(void)
+{
+   struct udevice *pon;
+   struct gpio_desc resin;
+   int node, ret;
+
+   ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon);
+   if (ret < 0) {
+   printf("Failed to find PMIC pon node. Check device tree\n");
+   return 0;
+   }
+
+   node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
+ "key_vol_down");
+   if (node < 0) {
+   printf("Failed to find key_vol_down node. Check device tree\n");
+   return 0;
+   }
+
+   if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
+  &resin, 0)) {
+   printf("Failed to request key_vol_down button.\n");
+   return 0;
+   }
+
+   if (dm_gpio_get_value(&resin)) {
+   env_set("bootdelay", "-1");
+   printf("Power button pressed - dropping to console.\n");
+   }
+
+   return 0;
+}
diff --git a/include/configs/dragonboard820c.h 
b/include/configs/dragonboard820c.h
index 76bcaf8..e0c3c0c 100644
--- a/include/configs/dragonboard820c.h
+++ b/include/configs/dragonboard820c.h
@@ -12,6 +12,8 @@
 #include 
 #include 
 
+#define CONFIG_MISC_INIT_R /* To stop autoboot */
+
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS   2
 
-- 
2.7.4

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[U-Boot] [PATCH v1 01/07] db410c: configs: increase gunzip buffer size for the kernel

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

the kernel fails to boot when it goes over the limit.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 include/configs/dragonboard410c.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/dragonboard410c.h 
b/include/configs/dragonboard410c.h
index d2447b2..3c5bb8a 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -23,7 +23,7 @@
 #define CONFIG_SYS_TEXT_BASE   0x8008
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 
0x7fff0)
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 0x8)
-#define CONFIG_SYS_BOOTM_LEN   0x100 /* 16MB max kernel size */
+#define CONFIG_SYS_BOOTM_LEN   SZ_64M
 
 /* UART */
 
-- 
2.7.4

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[U-Boot] [PATCH v1 03/07] db410c: replace reset driver with psci

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

this should be the norm for armv8 platforms.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 arch/arm/dts/dragonboard410c.dts |  5 ---
 board/qualcomm/dragonboard410c/dragonboard410c.c |  5 +++
 configs/dragonboard410c_defconfig|  2 +-
 drivers/sysreset/Makefile|  2 --
 drivers/sysreset/sysreset_snapdragon.c   | 40 
 5 files changed, 6 insertions(+), 48 deletions(-)
 delete mode 100644 drivers/sysreset/sysreset_snapdragon.c

diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
index 25aeac4..b67e588 100644
--- a/arch/arm/dts/dragonboard410c.dts
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -48,11 +48,6 @@
clock = <&clkc 4>;
};
 
-   restart@4ab000 {
-   compatible = "qcom,pshold";
-   reg = <0x4ab000 0x4>;
-   };
-
soc_gpios: pinctrl@100 {
compatible = "qcom,apq8016-pinctrl";
reg = <0x100 0x30>;
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c 
b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 99fc91b..8ef4338 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -171,3 +171,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 
return 0;
 }
+
+void reset_cpu(ulong addr)
+{
+   psci_system_reset();
+}
diff --git a/configs/dragonboard410c_defconfig 
b/configs/dragonboard410c_defconfig
index cfe9be9..de923ad 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -30,7 +30,6 @@ CONFIG_DM_PMIC=y
 CONFIG_PMIC_PM8916=y
 CONFIG_MSM_SERIAL=y
 CONFIG_SPMI_MSM=y
-CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
@@ -47,3 +46,4 @@ CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_PSCI_RESET=y
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 2e9598e..000c288 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -8,10 +8,8 @@ obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
-
 obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
-obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_snapdragon.c 
b/drivers/sysreset/sysreset_snapdragon.c
deleted file mode 100644
index 9869813..000
--- a/drivers/sysreset/sysreset_snapdragon.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Qualcomm APQ8016 reset controller driver
- *
- * (C) Copyright 2015 Mateusz Kulikowski 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int msm_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-   phys_addr_t addr = devfdt_get_addr(dev);
-   if (!addr)
-   return -EINVAL;
-   writel(0, addr);
-   return -EINPROGRESS;
-}
-
-static struct sysreset_ops msm_sysreset_ops = {
-   .request= msm_sysreset_request,
-};
-
-static const struct udevice_id msm_sysreset_ids[] = {
-   { .compatible = "qcom,pshold" },
-   { }
-};
-
-U_BOOT_DRIVER(msm_reset) = {
-   .name   = "msm_sysreset",
-   .id = UCLASS_SYSRESET,
-   .of_match   = msm_sysreset_ids,
-   .ops= &msm_sysreset_ops,
-};
-- 
2.7.4

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[U-Boot] [PATCH v1 06/07] db410c: add reserved-memory node to dts

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Rob Clark 

If lk lights up display and populates simple-framebuffer node, it will
also setup a reserved-memory node (needed by simplefb on linux).  But
it isn't clever enough to cope when the reserved-memory node is not
present.

Signed-off-by: Rob Clark 
---
 arch/arm/dts/dragonboard410c.dts | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
index b67e588..5ccfe7f 100644
--- a/arch/arm/dts/dragonboard410c.dts
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -23,11 +23,16 @@
reg = <0 0x8000 0 0x3da0>;
};
 
+   reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   };
+
chosen {
stdout-path = "/soc/serial@78b";
};
 
-
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
-- 
2.7.4

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[U-Boot] [PATCH v1 02/07] db410c: update wlan and bt mac addresses from firmware

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

The firmware that runs before u-boot modifies u-boot's device tree
adding the local-mac-address and local-bd-address properties for the
compatibles "qcom,wcnss-bt" and "qcom,wcnss-wlan".

This commit reads that firmware, retrieves the properties and fixups
the device tree that is passed to the kernel before booting.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 arch/arm/dts/dragonboard410c.dts | 10 +
 board/qualcomm/dragonboard410c/Makefile  |  1 +
 board/qualcomm/dragonboard410c/dragonboard410c.c | 49 +---
 board/qualcomm/dragonboard410c/lowlevel_init.S   | 28 ++
 configs/dragonboard410c_defconfig|  3 ++
 5 files changed, 85 insertions(+), 6 deletions(-)
 create mode 100644 board/qualcomm/dragonboard410c/lowlevel_init.S

diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
index 7746622..25aeac4 100644
--- a/arch/arm/dts/dragonboard410c.dts
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -86,6 +86,16 @@
clock-frequency = <2>;
};
 
+   wcnss {
+   bt {
+   compatible="qcom,wcnss-bt";
+   };
+
+   wifi {
+   compatible="qcom,wcnss-wlan";
+   };
+   };
+
spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x200f800 0x200 0x240 0x40 0x2c0 
0x40>;
diff --git a/board/qualcomm/dragonboard410c/Makefile 
b/board/qualcomm/dragonboard410c/Makefile
index cd67808..5082383 100644
--- a/board/qualcomm/dragonboard410c/Makefile
+++ b/board/qualcomm/dragonboard410c/Makefile
@@ -5,4 +5,5 @@
 #
 
 obj-y  := dragonboard410c.o
+obj-y  += lowlevel_init.o
 extra-y += head.o
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c 
b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 848e278..99fc91b 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -10,9 +10,16 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* pointer to the device tree ammended by the firmware */
+extern const void *fw_dtb;
+
+static char wlan_mac[ARP_HLEN];
+static char bt_mac[ARP_HLEN];
+
 int dram_init(void)
 {
gd->ram_size = PHYS_SDRAM_1_SIZE;
@@ -27,7 +34,6 @@ int dram_init_banksize(void)
return 0;
 }
 
-
 int board_prepare_usb(enum usb_init_type type)
 {
static struct udevice *pmic_gpio;
@@ -96,11 +102,6 @@ int board_prepare_usb(enum usb_init_type type)
return 0;
 }
 
-int board_init(void)
-{
-   return 0;
-}
-
 /* Check for vol- button - if pressed - stop autoboot */
 int misc_init_r(void)
 {
@@ -134,3 +135,39 @@ int misc_init_r(void)
 
return 0;
 }
+
+int board_init(void)
+{
+   int offset, len;
+   const char *mac;
+
+   /* take a copy of the firmware information (the user could unknownly
+  overwrite that DDR via tftp or other means)  */
+
+   offset = fdt_node_offset_by_compatible(fw_dtb, -1, "qcom,wcnss-wlan");
+   if (offset >= 0) {
+   mac = fdt_getprop(fw_dtb, offset, "local-mac-address", &len);
+   if (mac)
+   memcpy(wlan_mac, mac, ARP_HLEN);
+   }
+
+   offset = fdt_node_offset_by_compatible(fw_dtb, -1, "qcom,wcnss-bt");
+   if (offset >= 0) {
+   mac = fdt_getprop(fw_dtb, offset, "local-bd-address", &len);
+   if (mac)
+   memcpy(bt_mac, mac, ARP_HLEN);
+   }
+
+   return 0;
+}
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+   do_fixup_by_compat(blob, "qcom,wcnss-wlan", "local-mac-address",
+   wlan_mac, ARP_HLEN, 1);
+
+   do_fixup_by_compat(blob, "qcom,wcnss-bt", "local-bd-address",
+   bt_mac, ARP_HLEN, 1);
+
+   return 0;
+}
diff --git a/board/qualcomm/dragonboard410c/lowlevel_init.S 
b/board/qualcomm/dragonboard410c/lowlevel_init.S
new file mode 100644
index 000..15b2d0c
--- /dev/null
+++ b/board/qualcomm/dragonboard410c/lowlevel_init.S
@@ -0,0 +1,28 @@
+/*
+ * (C) Copyright 2016
+ * Cédric Schieli 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+.align 8
+.global fw_dtb
+fw_dtb:
+   .dword 0x0
+
+/*
+ * Routine: save_boot_params (called after reset from start.S)
+ * Description: save ATAG/FDT address provided by the firmware at boot time
+ */
+
+.global save_boot_params
+save_boot_params:
+
+   /* The firmware provided ATAG/FDT address can be found in r2/x0 */
+   adr x8, fw_dtb
+   str x0, [x8]
+
+   /* Returns */
+   b   save_boot_params_ret
diff --git a/configs/dragonboard410c_defconfig 
b/configs/dragonboard410c_defconfig
index b71bff7..cfe9be9 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -44,3 +44,6 @@ 

[U-Boot] [PATCH v1 05/07] db410c: use the device tree parsed by the lk loader.

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Jorge Ramirez-Ortiz 

We dont need to keep copies of the properties that we are going to
fixup since we will be using the dtb provided by the firmware.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 board/qualcomm/dragonboard410c/dragonboard410c.c | 71 ++--
 configs/dragonboard410c_defconfig|  1 +
 2 files changed, 44 insertions(+), 28 deletions(-)

diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c 
b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 8ef4338..236160a 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -15,14 +15,22 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* pointer to the device tree ammended by the firmware */
-extern const void *fw_dtb;
+extern void *fw_dtb;
 
-static char wlan_mac[ARP_HLEN];
-static char bt_mac[ARP_HLEN];
+void *board_fdt_blob_setup(void)
+{
+   if (fdt_magic(fw_dtb) != FDT_MAGIC) {
+   printf("Firmware provided invalid dtb!\n");
+   return NULL;
+   }
+
+   return fw_dtb;
+}
 
 int dram_init(void)
 {
gd->ram_size = PHYS_SDRAM_1_SIZE;
+
return 0;
 }
 
@@ -138,36 +146,43 @@ int misc_init_r(void)
 
 int board_init(void)
 {
-   int offset, len;
-   const char *mac;
-
-   /* take a copy of the firmware information (the user could unknownly
-  overwrite that DDR via tftp or other means)  */
-
-   offset = fdt_node_offset_by_compatible(fw_dtb, -1, "qcom,wcnss-wlan");
-   if (offset >= 0) {
-   mac = fdt_getprop(fw_dtb, offset, "local-mac-address", &len);
-   if (mac)
-   memcpy(wlan_mac, mac, ARP_HLEN);
-   }
-
-   offset = fdt_node_offset_by_compatible(fw_dtb, -1, "qcom,wcnss-bt");
-   if (offset >= 0) {
-   mac = fdt_getprop(fw_dtb, offset, "local-bd-address", &len);
-   if (mac)
-   memcpy(bt_mac, mac, ARP_HLEN);
-   }
-
return 0;
 }
 
 int ft_board_setup(void *blob, bd_t *bd)
 {
-   do_fixup_by_compat(blob, "qcom,wcnss-wlan", "local-mac-address",
-   wlan_mac, ARP_HLEN, 1);
-
-   do_fixup_by_compat(blob, "qcom,wcnss-bt", "local-bd-address",
-   bt_mac, ARP_HLEN, 1);
+   int offset, len, i;
+   const char *mac;
+   struct {
+   const char *compatible;
+   const char *property;
+   } fix[] = {
+   [0] = {
+   /* update the kernel's dtb with wlan mac */
+   .compatible = "qcom,wcnss-wlan",
+   .property = "local-mac-address",
+   },
+   [1] = {
+   /* update the kernel's dtb with bt mac */
+   .compatible = "qcom,wcnss-bt",
+   .property = "local-bd-address",
+   },
+   };
+
+   for ( i = 0; i < sizeof(fix)/sizeof(fix[0]); i++) {
+
+   offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
+   fix[i].compatible);
+   if (offset < 0)
+   continue;
+
+   mac = fdt_getprop(gd->fdt_blob, offset, fix[i].property, &len);
+   if (mac)
+   do_fixup_by_compat(blob,
+   fix[i].compatible,
+   fix[i].property,
+   mac, ARP_HLEN, 1);
+   }
 
return 0;
 }
diff --git a/configs/dragonboard410c_defconfig 
b/configs/dragonboard410c_defconfig
index de923ad..4389f52 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -47,3 +47,4 @@ CONFIG_OF_CONTROL=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_PSCI_RESET=y
+CONFIG_OF_SEPARATE=y
-- 
2.7.4

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[U-Boot] [PATCH v1 07/07] db410c: on aarch64 the fdtfile is in per-vendor subdirectory

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Rob Clark 

Signed-off-by: Rob Clark 
---
 include/configs/dragonboard410c.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/dragonboard410c.h 
b/include/configs/dragonboard410c.h
index 3c5bb8a..530d667 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -92,7 +92,7 @@ REFLASH(dragonboard/u-boot.img, 8)\
"initrd_high=0x\0" \
"linux_image=Image\0" \
"kernel_addr_r=0x8100\0"\
-   "fdtfile=apq8016-sbc.dtb\0" \
+   "fdtfile=qcom/apq8016-sbc.dtb\0" \
"fdt_addr_r=0x8300\0"\
"ramdisk_addr_r=0x8400\0"\
"scriptaddr=0x9000\0"\
-- 
2.7.4

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[U-Boot] [PATCH v1 04/07] fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE

2018-01-10 Thread Jorge Ramirez-Ortiz
From: Rob Clark 

Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by
u-boot build.  This allows the board to patch the fdt, etc.

In the specific case of dragonboard 410c, we pass the u-boot generated
fdt to the previous stage of bootloader (by embedding it in the
u-boot.img that is loaded by lk/aboot), which patches the fdt and passes
it back to u-boot.

Signed-off-by: Rob Clark 
---
 include/fdtdec.h |  3 ++-
 lib/fdtdec.c | 35 +++
 2 files changed, 25 insertions(+), 13 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 0fb3e07..4afb9ac 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -990,7 +990,8 @@ int fdtdec_setup(void);
 
 /**
  * Board-specific FDT initialization. Returns the address to a device tree 
blob.
- * Called when CONFIG_OF_BOARD is defined.
+ * Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined
+ * and the board implements it.
  */
 void *board_fdt_blob_setup(void);
 
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 30ec6b9..cc3dfd6 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1272,6 +1272,28 @@ static int uncompress_blob(const void *src, ulong 
sz_src, void **dstp)
 # endif
 #endif
 
+#if CONFIG_IS_ENABLED(OF_SEPARATE)
+/*
+ * For CONFIG_OF_SEPARATE, the board may optionally implement this to
+ * provide and/or fixup the fdt.
+ */
+__weak void *board_fdt_blob_setup(void)
+{
+   void *fdt_blob = NULL;
+#ifdef CONFIG_SPL_BUILD
+   /* FDT is at end of BSS unless it is in a different memory region */
+   if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
+   fdt_blob = (ulong *)&_image_binary_end;
+   else
+   fdt_blob = (ulong *)&__bss_end;
+#else
+   /* FDT is at end of image */
+   fdt_blob = (ulong *)&_end;
+#endif
+   return fdt_blob;
+}
+#endif
+
 int fdtdec_setup(void)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
@@ -1285,18 +1307,7 @@ int fdtdec_setup(void)
 #  else
gd->fdt_blob = __dtb_dt_begin;
 #  endif
-# elif defined CONFIG_OF_SEPARATE
-#  ifdef CONFIG_SPL_BUILD
-   /* FDT is at end of BSS unless it is in a different memory region */
-   if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
-   gd->fdt_blob = (ulong *)&_image_binary_end;
-   else
-   gd->fdt_blob = (ulong *)&__bss_end;
-#  else
-   /* FDT is at end of image */
-   gd->fdt_blob = (ulong *)&_end;
-#  endif
-# elif defined(CONFIG_OF_BOARD)
+# elif defined(CONFIG_OF_BOARD) || defined (CONFIG_OF_SEPARATE)
/* Allow the board to override the fdt address. */
gd->fdt_blob = board_fdt_blob_setup();
 # elif defined(CONFIG_OF_HOSTFILE)
-- 
2.7.4

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Re: [U-Boot] [PATCH] configs: am57xx_evm: fix ethernet phy configuration

2018-01-10 Thread Lokesh Vutla


On Wednesday 20 December 2017 08:39 PM, Sekhar Nori wrote:
> Configure AM57xx EVMs for the exact PHY part that is
> present on the various boards. This makes U-Boot apply
> configurations needed for this PHY like centering the
> FLP timing.
> 
> For configurations to take effect, DM_ETH needs to be
> enabled. Do that too.
> 
> Tested on BeagleBoard x15 and AM571x IDK.
> 
> Signed-off-by: Sekhar Nori 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

> ---
>  configs/am57xx_evm_defconfig| 3 +++
>  configs/am57xx_hs_evm_defconfig | 3 +++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
> index fc96401d3e55..04484e0ae213 100644
> --- a/configs/am57xx_evm_defconfig
> +++ b/configs/am57xx_evm_defconfig
> @@ -52,6 +52,9 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SPI_FLASH_BAR=y
>  CONFIG_SPI_FLASH_SPANSION=y
>  CONFIG_PHYLIB=y
> +CONFIG_PHY_MICREL=y
> +CONFIG_PHY_MICREL_KSZ90X1=y
> +CONFIG_DM_ETH=y
>  CONFIG_DM_PMIC=y
>  CONFIG_PMIC_PALMAS=y
>  CONFIG_DM_REGULATOR=y
> diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
> index 681e2a54c8ff..6c33cc9030e0 100644
> --- a/configs/am57xx_hs_evm_defconfig
> +++ b/configs/am57xx_hs_evm_defconfig
> @@ -55,6 +55,9 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SPI_FLASH_BAR=y
>  CONFIG_SPI_FLASH_SPANSION=y
>  CONFIG_PHYLIB=y
> +CONFIG_PHY_MICREL=y
> +CONFIG_PHY_MICREL_KSZ90X1=y
> +CONFIG_DM_ETH=y
>  CONFIG_DM_PMIC=y
>  CONFIG_PMIC_PALMAS=y
>  CONFIG_DM_REGULATOR=y
> 
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Re: [U-Boot] [PATCH] tools: Add Marvell recovery image download script

2018-01-10 Thread Stefan Roese

On 30.11.2017 15:10, kos...@marvell.com wrote:

From: Konstantin Porotchkin 

Introduce the recovery image download script for usage with
Marvell Armada SoC families (excepting 37xx family).
Since Marvell BootROM uses a sliding window in UART buffer
for detecting escape sequence during the boot, it's easier
to interrupt the normal boot flow by sending a long stream
of chained escape sequences to the serial port instead of
periodically sending a single escape sequence as it is done
by kwboot utility.
Additional benefit of using this script is the ability to
adjust the escape sequence stream length withoiut need for
compilation.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 


Applied to u-boot-marvell/master

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Re: [U-Boot] [PATCH 1/4] arm64: a37xx: use disto defaults

2018-01-10 Thread Stefan Roese

On 02.12.2017 10:46, Andre Heider wrote:

Signed-off-by: Andre Heider 
---
  include/configs/mvebu_armada-37xx.h | 5 ++---
  1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/configs/mvebu_armada-37xx.h 
b/include/configs/mvebu_armada-37xx.h
index 1b2e0d71b4..3e1ff02ed7 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -44,9 +44,6 @@
  /*
   * Other required minimal configurations
   */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
  #define CONFIG_ARCH_CPU_INIT  /* call arch_cpu_init() */
  #define CONFIG_SYS_LOAD_ADDR  0x0080  /* default load adr- 8M */
  #define CONFIG_SYS_MEMTEST_START 0x0080   /* 8M */
@@ -109,4 +106,6 @@
  
  #define CONFIG_SUPPORT_VFAT
  
+#include 

+
  #endif /* _CONFIG_MVEBU_ARMADA_37XX_H */



Applied to u-boot-marvell/master

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Re: [U-Boot] [PATCH 2/4] arm64: a37xx: add distro compatible env vars

2018-01-10 Thread Stefan Roese

On 02.12.2017 10:46, Andre Heider wrote:

the values of dt_addr_r/kernel_addr_r/ramdisk_addr_r are taken from
the downstream 'u-boot-2017.03-armada-17.10' release.

the chosen values of scriptaddr and pxefile_addr_r are below fdt_addr_r,
in 1MB steps.

Signed-off-by: Andre Heider 
---
  include/configs/mvebu_armada-37xx.h | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/include/configs/mvebu_armada-37xx.h 
b/include/configs/mvebu_armada-37xx.h
index 3e1ff02ed7..383e6dfaf4 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -108,4 +108,11 @@
  
  #include 
  
+#define CONFIG_EXTRA_ENV_SETTINGS	\

+   "scriptaddr=0x4d0\0"  \
+   "pxefile_addr_r=0x4e0\0"  \
+   "fdt_addr_r=0x4f0\0"  \
+   "kernel_addr_r=0x500\0"   \
+   "ramdisk_addr_r=0x800"
+
  #endif /* _CONFIG_MVEBU_ARMADA_37XX_H */



Applied to u-boot-marvell/master

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Re: [U-Boot] [PATCH 4/4] arm64: a37xx: use distro bootcmd

2018-01-10 Thread Stefan Roese

On 02.12.2017 10:46, Andre Heider wrote:

Signed-off-by: Andre Heider 
---
  include/configs/mvebu_armada-37xx.h | 13 -
  1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/include/configs/mvebu_armada-37xx.h 
b/include/configs/mvebu_armada-37xx.h
index 383e6dfaf4..f5b4f72118 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -108,11 +108,22 @@
  
  #include 
  
+#define BOOT_TARGET_DEVICES(func) \

+   func(MMC, mmc, 1) \
+   func(MMC, mmc, 0) \
+   func(USB, usb, 0) \
+   func(SCSI, scsi, 0) \
+   func(PXE, pxe, na) \
+   func(DHCP, dhcp, na)
+
+#include 
+
  #define CONFIG_EXTRA_ENV_SETTINGS \
"scriptaddr=0x4d0\0"  \
"pxefile_addr_r=0x4e0\0"  \
"fdt_addr_r=0x4f0\0"  \
"kernel_addr_r=0x500\0"   \
-   "ramdisk_addr_r=0x800"
+   "ramdisk_addr_r=0x800\0"  \
+   BOOTENV
  
  #endif /* _CONFIG_MVEBU_ARMADA_37XX_H */




Applied to u-boot-marvell/master

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Re: [U-Boot] [PATCH 3/4] arm64: a37xx: defconfigs: enable CONFIG_DISTRO_DEFAULTS

2018-01-10 Thread Stefan Roese

On 02.12.2017 10:46, Andre Heider wrote:

Signed-off-by: Andre Heider 
---
  configs/mvebu_db-88f3720_defconfig  | 1 +
  configs/mvebu_espressobin-88f3720_defconfig | 1 +
  2 files changed, 2 insertions(+)

diff --git a/configs/mvebu_db-88f3720_defconfig 
b/configs/mvebu_db-88f3720_defconfig
index 0fd4514c37..321151e41d 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
  CONFIG_SYS_MALLOC_F_LEN=0x2000
  CONFIG_TARGET_MVEBU_ARMADA_37XX=y
  CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db"
+CONFIG_DISTRO_DEFAULTS=y
  CONFIG_DEBUG_UART=y
  CONFIG_AHCI=y
  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
index 95db6c610e..5d9fb75b17 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
  CONFIG_SYS_MALLOC_F_LEN=0x2000
  CONFIG_TARGET_MVEBU_ARMADA_37XX=y
  CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin"
+CONFIG_DISTRO_DEFAULTS=y
  CONFIG_DEBUG_UART=y
  CONFIG_AHCI=y
  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set



Applied to u-boot-marvell/master

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Re: [U-Boot] [PATCH] arm: mvebu: ClearFog: document boot selection switches, update UART

2018-01-10 Thread Stefan Roese

On 23.12.2017 01:42, Florian Klink wrote:

Signed-off-by: Florian Klink 
---
  board/solidrun/clearfog/README | 21 +
  1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README
index ef1e3bf426..a7bc0d4e23 100644
--- a/board/solidrun/clearfog/README
+++ b/board/solidrun/clearfog/README
@@ -17,16 +17,29 @@ $ sudo dd if=u-boot-spl.kwb of=/dev/sdX bs=512 seek=1
  Please use the correct device node for your setup instead
  of "/dev/sdX" here!
  
+Boot selection:

+---
+
+Before powering up the board, boot selection should be done via the SW1 dip
+switch (0: OFF, 1: ON):
+
+ - SPI: 00010
+ - SD/eMMC: 00111
+ - M.2 SSD: 11100
+ - UART:01001 [1]
+
+[1]: According to SolidRun's manual, 0 should be used for UART booting on
+ the ClearFog 'Pro' variant.
+ However, this doesn't work (anymore) at least on Rev. 2.1 (but '01001' as
+ mentionend for the 'Base' variant does).
+
  Boot from UART:
  ---
  
  Connect the on-board micro-USB (CF Pro: CON11, CF Base: CON5)

  to your host.
  
-Set the SW1 DIP switches to UART boot (0: OFF, 1: ON):

-
-  ClearFog Base: 01001
-  ClearFog Pro:  0
+Set the SW1 DIP switches to UART boot (see above).
  
  Run the following command to initiate U-Boot download:
  



Applied to u-boot-marvell/master

Thanks,
Stefan
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Re: [U-Boot] [PATCH] ARM: mvebu: Allow MVNETA to be selected with Armada 3700 SoCs

2018-01-10 Thread Stefan Roese

On 28.12.2017 15:43, Miquel Raynal wrote:

Until now, Armada 3700 SoCs could not enable the mvneta driver, and thus
did not benefit from Ethernet support. Add ARMADA_3700 in the
"depends on" list of the MVNETA Kconfig entry.

Signed-off-by: Miquel Raynal 
---
  drivers/net/Kconfig | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index d67927cd3b..4bb0201989 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -160,12 +160,12 @@ config FTMAC100
  This MAC is present in Andestech SoCs.
  
  config MVNETA

-   bool "Marvell Armada 385 network interface support"
-   depends on ARMADA_XP || ARMADA_38X
+   bool "Marvell Armada XP/385/3700 network interface support"
+   depends on ARMADA_XP || ARMADA_38X || ARMADA_3700
select PHYLIB
help
  This driver supports the network interface units in the
- Marvell ARMADA XP and 38X SoCs
+ Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs
  
  config MVPP2

bool "Marvell Armada 375/7K/8K network interface support"



Applied to u-boot-marvell/master

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Stefan
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Re: [U-Boot] [PATCH] pinctrl: mvebu: Make drivers depend on the pinctrl framework

2018-01-10 Thread Stefan Roese

On 29.12.2017 15:31, Miquel Raynal wrote:

Armada pinctrl drivers shall not be compiled without the entire pinctrl
framework and thus lack a "depends on" condition, otherwise the driver
will simply not be probed.

Signed-off-by: Miquel Raynal 
---
  drivers/pinctrl/mvebu/Kconfig | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index a9388ff7e2..07d4f3e216 100644
--- a/drivers/pinctrl/mvebu/Kconfig
+++ b/drivers/pinctrl/mvebu/Kconfig
@@ -1,14 +1,14 @@
  if ARCH_MVEBU
  
  config PINCTRL_ARMADA_37XX

-   depends on ARMADA_3700
+   depends on ARMADA_3700 && PINCTRL_FULL
bool "Armada 37xx pin control driver"
help
   Support pin multiplexing and pin configuration control on
   Marvell's Armada-37xx SoC.
  
  config PINCTRL_ARMADA_8K

-   depends on ARMADA_8K
+   depends on ARMADA_8K && PINCTRL_FULL
bool "Armada 7k/8k pin control driver"
help
   Support pin multiplexing and pin configuration control on



Applied to u-boot-marvell/master

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Stefan
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Re: [U-Boot] [PATCH] ARM: mvebu: correct reference for "ethernet1" on DB-88F6820-AMC

2018-01-10 Thread Stefan Roese

On 08.01.2018 04:17, Chris Packham wrote:

The DB-88F6820-AMC connects ethernet@34000 and ethernet@7 which are
labeled as eth2 and eth0 in armada-38x.dts. The ethernet@3 (eth1) is
not used on the AMC board.

This eliminates the following bootup message

   Device 'ethernet@7': seq 0 is in use by 'ethernet@34000'

Signed-off-by: Chris Packham 
---

  arch/arm/dts/armada-385-amc.dts | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/armada-385-amc.dts b/arch/arm/dts/armada-385-amc.dts
index 5e1588d57438..d4d127fa024b 100644
--- a/arch/arm/dts/armada-385-amc.dts
+++ b/arch/arm/dts/armada-385-amc.dts
@@ -53,7 +53,7 @@
  
  	aliases {

ethernet0 = ð0;
-   ethernet1 = ð1;
+   ethernet1 = ð2;
i2c0 = &i2c0;
spi1 = &spi1;
};



Applied to u-boot-marvell/master

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Stefan
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[U-Boot] Please pull u-boot-marvell/master

2018-01-10 Thread Stefan Roese
Hi Tom,

please pull the following Marvell related patches.

Thanks,
Stefan


The following changes since commit f3dd87e0b98999a78e500e8c6d2b063ebadf535a:

  Prepare v2018.01 (2018-01-08 20:25:29 -0500)

are available in the Git repository at:

  git://www.denx.de/git/u-boot-marvell.git 

for you to fetch changes up to 0a05bf42b462c0fd0299c768560c5ad532cdf619:

  ARM: mvebu: correct reference for "ethernet1" on DB-88F6820-AMC (2018-01-10 
12:36:52 +0100)


Andre Heider (4):
  arm64: a37xx: use disto defaults
  arm64: a37xx: add distro compatible env vars
  arm64: a37xx: defconfigs: enable CONFIG_DISTRO_DEFAULTS
  arm64: a37xx: use distro bootcmd

Chris Packham (1):
  ARM: mvebu: correct reference for "ethernet1" on DB-88F6820-AMC

Florian Klink (1):
  arm: mvebu: ClearFog: document boot selection switches, update UART

Konstantin Porotchkin (1):
  tools: Add Marvell recovery image download script

Miquel Raynal (2):
  ARM: mvebu: Allow MVNETA to be selected with Armada 3700 SoCs
  pinctrl: mvebu: Make drivers depend on the pinctrl framework

 arch/arm/dts/armada-385-amc.dts |   2 +-
 board/solidrun/clearfog/README  |  21 -
 configs/mvebu_db-88f3720_defconfig  |   1 +
 configs/mvebu_espressobin-88f3720_defconfig |   1 +
 drivers/net/Kconfig |   6 +-
 drivers/pinctrl/mvebu/Kconfig   |   4 +-
 include/configs/mvebu_armada-37xx.h |  23 +-
 tools/mrvl_uart.sh  | 119 
 8 files changed, 164 insertions(+), 13 deletions(-)
 create mode 100755 tools/mrvl_uart.sh
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Re: [U-Boot] [PATCH v3 1/6] mach-omap2: add AM335x Display PLL register definition

2018-01-10 Thread Anatolij Gustschin
On Tue,  9 Jan 2018 19:01:31 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:

> Adds the register definition of the Display DPLL
> 
> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Anatolij Gustschin 
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Re: [U-Boot] [PATCH v3 2/6] am335x-fb: cosmetic: update-copyright

2018-01-10 Thread Anatolij Gustschin
On Tue,  9 Jan 2018 19:01:32 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:

> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Anatolij Gustschin 

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Re: [U-Boot] BugFix: PXE Boot fails on old arm kernel with initrd without FDT

2018-01-10 Thread Tom Rini
On Mon, Oct 30, 2017 at 02:37:17PM +0100, Sven Glodowski wrote:

> Hello,
> 
> PXE/Extlinux boot fails on old Kernel which requires initrd but doesn't have 
> FDT!
> 
> sysboot loads initrd loaded into RAM, but system boots without initrd and 
> hangs.
> 
> Kernel:
>   Linux odroid 3.8.13.30 #1 SMP PREEMPT Wed Feb 1 20:17:12 CET 2017 armv7l 
> armv7l armv7l GNU/Linux
> 
> Looking into [master]u-boot/cmd/pxe.c, 
>   function  label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
> 
> Number of boot parameter initializing with 2
>  622: int bootm_argc = 2;
> 
> Before calling boot_m / boot_z, 
> number of boot parameters updated only if FTD is used!
> 
>  783  if (!bootm_argv[3])
>  784  bootm_argv[3] = getenv("fdt_addr");
>  785
>  786 if (bootm_argv[3]) {
>  787 if (!bootm_argv[2])
>  788 bootm_argv[2] = "-";
>  789 bootm_argc = 4;
> 
> Applying this patch, Number of boot parameters set to 3 if initrd loaded 
> before.
> 

This looks like a reasonable bugfix, thanks.  But first, you forgot your
Signed-off-by line.  And second, can you please condense your commit
message a bit?  Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v3 3/6] am335x-fb: cosmetic: fix coding style

2018-01-10 Thread Anatolij Gustschin
On Tue,  9 Jan 2018 19:01:33 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:

> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Anatolij Gustschin 

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Re: [U-Boot] [PATCH v3 5/6] board/BuR: provide real clock-frequency instead a divider

2018-01-10 Thread Anatolij Gustschin
On Tue,  9 Jan 2018 19:01:35 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:

> Actual am335x-fb implementation takes now a real clock frequency instead
> a divider. So this component doesn't need to know anymore some base
> frequency of the LCDC, we simply provide the pixel-clock frequency.
> 
> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Anatolij Gustschin 

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Re: [U-Boot] [PATCH v3 4/6] am335x-fb: setup display PLL

2018-01-10 Thread Anatolij Gustschin
On Tue,  9 Jan 2018 19:01:34 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:

> The LCDC IP-core an be feed from several clock sources, one of those is
> a dedicated DPLL for generating a dividable base-clock for this IP-core.
> 
> The TRM specifies the maximum input frequency for the LCCD with 200 MHz,
> so we must not exceed this value with the PLL frequency (which can lock
> much higher).
> 
> This patch tries every combination of multipliers and divisors of the
> PLL and the IP-core itself for getting as near as possible the the
> requested panel->pxl_clk.
> 
> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Anatolij Gustschin 
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Re: [U-Boot] [PATCH V5 00/31] imx: add i.MX8M support and i.MX8MQ EVK

2018-01-10 Thread Diego Dorta
Hi Peng,

2018-01-10 3:20 GMT-02:00 Peng Fan :
> This patchset is to add i.MX8M and i.MX8MQ-EVK support
>
> V5:
>  Drop wait_mask_set/clr_timeout and switch to use readl_poll_timeout in
>  the patchset.
>
> V4:
>  Regenerate patchset based on Tom's master tree.
>  In this patchset, https://patchwork.ozlabs.org/patch/855027/
>  "arm: imx: Rework i.MX specific commands to be excluded from SPL" from
>  Tom is included to avoid merge conflicts because the i.mx8m change
>  also has some modification to bootaux and arch/arm/mach-imx/Makefile.
>  Because CONFIG_GPT_TIMER change, I did a small modification to apply
>  Tom's patch, no function change.
>
>  Include ATF link in README.
>
> V3:
>  This patchset based on https://patchwork.ozlabs.org/patch/855027/
>  "arm: imx: Rework i.MX specific commands to be excluded from SPL" from
>  Tom to avoid this patchset fail apply after Tom's patch merged.
>
>  Previously "power: pmic/regulator allow dm be omited by SPL" broke other
>  boards, in V3 patchset, only touch pfuze100 related options.
>
>  Sharing code about get mac from fuse between mx7/mx8m
>  Sharing code about bootaux between mx6/7/mx8m
>  Sharing code about cpu speed grade between mx7/mx8m
>  Sharing code about get boot device between mx7/mx8m
>  Sharding code about mmc env between mx7/mx8m
>
>  Introduce wait_mask_set/clr_timeout to avoid deadloop in clock pll 
> configuration
>
>  Correct authorship of fix building warning on fec arm64, patch 27/31.
>
>  Switch to use structure for DDR Controller. For DDR PHY registers,
>  there are about more than 10 thousands registers, I could not convert
>  them with detailed register name, and the script is generated from IC team,
>  So I use regs[0x] arrays here fo easily converting between IC team
>  released script and uboot ddr phy cod.
>
>  Improve REAMME file to include where to download firmware and imx-mkimage
>  and how to build
>
>  Add review tags on the V2 patchset.
>
>  Hope this patchset could catch up next release :)
>
> V2:
>
>  patch 02/23: convert to structure, drop is_boot_from_usb and
>   disconnect_from_usb
>  patch 04/23: conver to use structure for the clock driver, removed the
>   CCM_xxx macros. Add static for local functons.
>   Add init_usdhc_clk, init_uart_clk and etc to not enable
>   them all at default.
>  patch 05/23: Add more commit msg for the sip part.
>  patch 08/23: Merge the spl boot device with i.MX7
>  patch 12/23: Typo fix and return error fix from Heiko for the SoC related 
> part
>  patch 22/23: Use a weak function ddr_init. If patch 23/23 could not be
>   accepted at current stage, to make others still be could be
>   compiled.
>
> The patchset depends on
> https://patchwork.ozlabs.org/patch/841934/
> https://patchwork.ozlabs.org/patch/841958/
> to be tested on real hardware.
>
> V1:
>
> patch: "power: pmic.h: include dm/ofnode.h" and
> "power: pmic/regulator allow dm be omited by SPL" is previously reviewed
> in mailist to not merged. If no issue, you may pick it up.
>
> The board support is a large patch because of the ddr related code.
> If it is not good, please first review/pick-up other patches if they
> are ok.
>
>
>
> Peng Fan (29):
>   imx: add i.MX8M into Kconfig
>   imx: mx8m: add register definition header file
>   imx: mx8m: add pin header file
>   imx: mx8m: add clock driver
>   imx: add sip function
>   imx: boot_mode: add USB_BOOT entry
>   imx: cpu: update cpu file to support i.MX8M
>   imx: spl: implement spl_boot_device for i.MX8M
>   imx: add i.MX8MQ SoC Revision and is_mx8m helper
>   imx: add pad settings bit definition for i.MX8M
>   imx: cpu: move speed/temp to common cpu
>   imx: cpu: add cpu speed/grade for i.MX8M
>   imx: refactor imx_get_mac_from_fuse
>   imx: cleanup bootaux
>   imx: bootaux: support i.MX8M
>   imx: mx7: move get_boot_device to cpu.c
>   imx: cpu: support get_boot_device for i.MX8M
>   imx: mx7: move mmc env code to mmc_env.c
>   imx: mx8m: add soc related settings and files
>   imx: makefile: compile files for i.MX8M
>   misc: ocotp: add i.MX8M support
>   mmc: fsl_esdhc: support i.MX8M
>   imx: lcdif: include i.MX8M
>   gpio: mxc: add i.MX8M support
>   net: fec: do not access reserved register for i.MX8M
>   imx: imx8mq: add dtsi file
>   power: pmic/regulator allow dm be omitted by SPL
>   imx: mx8m: add ddr controller memory map
>   imx: add i.MX8MQ EVK support
>
> Tom Rini (1):
>   arm: imx: Rework i.MX specific commands to be excluded from SPL

Thanks for your V5 patches, this time I had no problem on compiling it.

But, even following your README step by step, the U-Boot hangs
completely on this point:

U-Boot SPL 2018.01-00038-gb464677cc7 (Jan 10 2018 - 09:50:45)
PMIC:  PFUZE100 ID=0x10
PMU message timeout
Normal Boot
Trying to boot from MMC2

Do you know how to solve it? If so, please add this information on the
README file.

Thanks,
Diego
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Re: [U-Boot] [PATCH v3 6/6] board/BuR: drop LCDC clock manipulation from board code

2018-01-10 Thread Anatolij Gustschin
On Tue,  9 Jan 2018 19:01:36 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:

> The clock selection is done now from the am335x-fb code, so there is no
> more need doing this in the board code.
> 
> Signed-off-by: Hannes Schmelzer 

Reviewed-by: Anatolij Gustschin 
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Re: [U-Boot] [GIT PULL] ZFS: lundman/master

2018-01-10 Thread Tom Rini
On Wed, Jan 10, 2018 at 12:21:32PM +0900, Jorgen Lundman wrote:

> 
> Hello,
> I didn't hear back about the changes, so I'll proceed to this stage. :)
> Please find additional ZFS boot features, and fixes. Please advise if
> outside git repositories are not allowed.
> 
> The following changes since commit ab61e175713a0400c6ece6348e8f655998cf574d:
> 
>   ARM: rmobile: Rework the ULCB CPLD driver (Sun Nov 26 20:32:44 2017 +0100)
> 
> are available in the git repository at:
> 
>   https://github.com/lundman/u-boot.git master
> 
> for you to fetch changes up to c2727e5004fe011d19156d728babdf968515b28d:
> 
>   Update ZFS support to latest (Thu Dec 7 16:09:26 2017 +0900)
> 
> Jorgen Lundman (1):
>   Update ZFS support to latest
> 
>  cmd/zfs.c|   22 +-
>  fs/zfs/Makefile  |4 +-
>  fs/zfs/dev.c |   20 +-
>  fs/zfs/zfs.c | 3223 
> +++---
>  fs/zfs/zfs_fletcher.c|6 +-
>  fs/zfs/zfs_lz4.c |  286 
>  fs/zfs/zfs_sha256.c  |   14 +-
>  include/zfs/dmu.h|   48 +-
>  include/zfs/sa_impl.h|5 +-
>  include/zfs/spa.h|   18 +
>  include/zfs/uberblock_impl.h |   15 +-
>  include/zfs/zap_leaf.h   |4 +-
>  include/zfs/zfs.h|   22 +-
>  include/zfs/zio.h|9 +-
>  include/zfs_common.h |   27 +-
>  15 files changed, 2819 insertions(+), 904 deletions(-)

I'm reluctant to just take this as-is.  That's a lot of code changes in
a single commit that was not posted (as far as I can see) to the mailing
list.  Can you break that down into a series of changes that can be
reviewed and post that?  Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v2] musb: sunxi: Use base address from device tree

2018-01-10 Thread Jun Nie
2017-12-30 20:44 GMT+08:00 Chen-Yu Tsai :
> Now that the musb sunxi glue driver is completely device model / device
> tree driven, we should use the base address from the device tree,
> instead of hard-coding it in the source code.
>
> Fixes: 3a61b080acee ("musb: sunxi: switch to the device model")
> Signed-off-by: Chen-Yu Tsai 
> ---
> Changes since v1:
>
>   - Check return value dev_read_addr_ptr()
>
> IMHO, having NULL represent an error for dev_read_addr_ptr() doesn't
> work so well as in the kernel, because U-boot doesn't acually map
> addresses. So NULL (or 0x0) is in fact a valid address. Something
> like ~0x0 might work better, but that's a whole other changeset.
>
> ---
>  drivers/usb/musb-new/sunxi.c | 9 ++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
> index 7ee44ea91900..aedc24b93711 100644
> --- a/drivers/usb/musb-new/sunxi.c
> +++ b/drivers/usb/musb-new/sunxi.c
> @@ -312,13 +312,16 @@ static int musb_usb_probe(struct udevice *dev)
>  {
> struct musb_host_data *host = dev_get_priv(dev);
> struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
> +   void *base = dev_read_addr_ptr(dev);
> int ret;

Chenyu,

I am not familiar with MUSB and not sure whether this driver support
both host and peripheral mode. I suppose it support both mode in
different build config according to macro CONFIG_USB_MUSB_HOST. H3
user manual says register address space is different for the two
modes,  0x1c19000 for device mode and 0x1c1a000 for host mode.
If my understanding is correct, we need different address in dts for
different mode. Or I misunderstand anything? Thank you for explaining
it!

Jun
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Re: [U-Boot] [PATCH v2] musb: sunxi: Use base address from device tree

2018-01-10 Thread Chen-Yu Tsai
On Wed, Jan 10, 2018 at 10:01 PM, Jun Nie  wrote:
> 2017-12-30 20:44 GMT+08:00 Chen-Yu Tsai :
>> Now that the musb sunxi glue driver is completely device model / device
>> tree driven, we should use the base address from the device tree,
>> instead of hard-coding it in the source code.
>>
>> Fixes: 3a61b080acee ("musb: sunxi: switch to the device model")
>> Signed-off-by: Chen-Yu Tsai 
>> ---
>> Changes since v1:
>>
>>   - Check return value dev_read_addr_ptr()
>>
>> IMHO, having NULL represent an error for dev_read_addr_ptr() doesn't
>> work so well as in the kernel, because U-boot doesn't acually map
>> addresses. So NULL (or 0x0) is in fact a valid address. Something
>> like ~0x0 might work better, but that's a whole other changeset.
>>
>> ---
>>  drivers/usb/musb-new/sunxi.c | 9 ++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
>> index 7ee44ea91900..aedc24b93711 100644
>> --- a/drivers/usb/musb-new/sunxi.c
>> +++ b/drivers/usb/musb-new/sunxi.c
>> @@ -312,13 +312,16 @@ static int musb_usb_probe(struct udevice *dev)
>>  {
>> struct musb_host_data *host = dev_get_priv(dev);
>> struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
>> +   void *base = dev_read_addr_ptr(dev);
>> int ret;
>
> Chenyu,
>
> I am not familiar with MUSB and not sure whether this driver support
> both host and peripheral mode. I suppose it support both mode in
> different build config according to macro CONFIG_USB_MUSB_HOST. H3
> user manual says register address space is different for the two
> modes,  0x1c19000 for device mode and 0x1c1a000 for host mode.
> If my understanding is correct, we need different address in dts for
> different mode. Or I misunderstand anything? Thank you for explaining
> it!

For host mode, the SoC provides a proper EHCI/OHCI host pair. Those
are found at 0x1c1a000. However the MUSB controller can do host mode.
It's just not as good as a proper host pair.

ChenYu
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Re: [U-Boot] [PATCH] spl: unbreak CONFIG_SPL_MULTI_DTB_FIT after fixing CONFIG_OF_EMBED

2018-01-10 Thread Goldschmidt Simon
On Wed, 10/01/18 09:48, Lokesh Vutla wrote:
> On Wednesday 10 January 2018 12:32 PM, Goldschmidt Simon wrote:
> > Commit 9bd76b80 "spl: make CONFIG_OF_EMBED pass dts through fdtgrep"
> > moved the fdtgrep code from scripts/Makefile.spl to dts/Makefile so
> > that the dtb is stripped in embedded mode, too.
> >
> > This broke CONFIG_SPL_MULTI_DTB_FIT where fdtgrep is still called from
> > scripts/Makefile.spl to strip all dtbs in CONFIG_SPL_OF_LIST.
> > To fix that, cmd_fdtgrep is brought back into scripts/Makefile.spl at
> > the downside of having it duplicated in two makefiles.
> 
> Missing Signed-off-by? Also a Reported-by credits would be nice :)

Right. I'll add that in a next version, sorry.

> 
> > ---
> >  scripts/Makefile.spl | 16 
> >  1 file changed, 16 insertions(+)
> >
> > diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index
> > 64390e5785..72e74f14c3 100644
> > --- a/scripts/Makefile.spl
> > +++ b/scripts/Makefile.spl
> > @@ -239,6 +239,22 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
> > @bss_size_str=$(shell $(NM) $< | awk 'BEGIN {size = 0} /__bss_size/ 
> > {size
> = $$1} END {print "ibase=16; " toupper(size)}' | bc); \
> > dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2>/dev/null;
> >
> > +# Pass the original device tree file through fdtgrep twice. The first
> > +pass # removes any unwanted nodes (i.e. those which don't have the #
> > +'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The
> > +second # pass removes various unused properties from the remaining nodes.
> > +# The output is typically a much smaller device tree file.
> > +ifeq ($(CONFIG_TPL_BUILD),y)
> > +fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl else
> > +fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl endif
> > +quiet_cmd_fdtgrep = FDTGREP $@
> > +  cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
> > +   -n /chosen -n /config -O dtb | \
> > +   $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
> > +   $(addprefix -P ,$(subst
> $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
> > +
> 
> hmm..we are duplicating code here. Why can't dtb build for
> CONFIG_OF_EMBED be moved to scripts/Makefile.spl?

I don't like the code duplication either. Back in November, I tried
to create the fdtgrep'ed ftd from Makefile.spl but failed. Seems I'm
not a pro in makefiles... Of course I'd appreciate it if you'd find
a solution for that!

Regards,
Simon
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Re: [U-Boot] [PATCH 09/13] board: ti: am574x-idk: Add ddr data support

2018-01-10 Thread Tom Rini
On Fri, Dec 29, 2017 at 11:47:27AM +0530, Lokesh Vutla wrote:
> Hi Lukas,
> 
> Sorry for the delayed response.
> 
> On Tuesday 19 December 2017 03:04 PM, Lukasz Majewski wrote:
> > Hi Lokesh,
> > 
> >> Hi Lukas,
> >>
> >> On Monday 18 December 2017 04:46 PM, Lukasz Majewski wrote:
> >>> Hi Lokesh,
> >>>   
>  AM574x-idk has the following DDR parts attached:
>  EMIF1: MT41K256M16HA (1GB with ECC)
>  EMIF2: MT41K256M16HA (1GB without ECC)
> 
>  Enabling 2GB DDR without interleaving between EMIFs. And
>  enabling ECC on EMIF1.
> 
>  Signed-off-by: Lokesh Vutla 
>  Signed-off-by: Krunal Bhargav 
>  ---
>   board/ti/am57xx/board.c | 47
>  --- 1 file changed, 44
>  insertions(+), 3 deletions(-)
> 
>  diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
>  index 2d14ae54fe..1377c7b1fe 100644
>  --- a/board/ti/am57xx/board.c
>  +++ b/board/ti/am57xx/board.c
>  @@ -89,10 +89,18 @@ static const struct dmm_lisa_map_regs
>  am571x_idk_lisa_regs = { .is_ma_present  = 0x1
>   };
>   
>  +static const struct dmm_lisa_map_regs am574x_idk_lisa_regs = {
>  +.dmm_lisa_map_2 = 0xc0600200,
>  +.dmm_lisa_map_3 = 0x80600100,
>  +.is_ma_present  = 0x1
>  +};
>  +
>   void emif_get_dmm_regs(const struct dmm_lisa_map_regs
>  **dmm_lisa_regs) {
>   if (board_is_am571x_idk())
>   *dmm_lisa_regs = &am571x_idk_lisa_regs;
>  +else if (board_is_am574x_idk())
>  +*dmm_lisa_regs = &am574x_idk_lisa_regs;
>   else
>   *dmm_lisa_regs = &beagle_x15_lisa_regs;
>   }
>  @@ -231,8 +239,8 @@ static const struct emif_regs
>  am571x_emif1_ddr3_666mhz_emif_regs =
>  { .ref_ctrl  =
>  0x514d, .ref_ctrl_final  =
>  0x144a, .sdram_tim1  = 0xd333887c,
>  -.sdram_tim2 = 0x40b37fe3,
>  -.sdram_tim3 = 0x409f8ada,
>  +.sdram_tim2 = 0x30b37fe3,
>  +.sdram_tim3 = 0x409f8ad8,
>   .read_idle_ctrl = 0x0005,
>   .zq_config  = 0x5007190b,
>   .temp_alert_config  = 0x,
>  @@ -249,17 +257,50 @@ static const struct emif_regs
>  am571x_emif1_ddr3_666mhz_emif_regs =
>  { .emif_rd_wr_exec_thresh= 0x0305 };
>   
>  +static const struct emif_regs
>  am574x_emif1_ddr3_666mhz_emif_ecc_regs = {
>  +.sdram_config_init  = 0x61863332,
>  +.sdram_config   = 0x61863332,
>  +.sdram_config2  = 0x0800,
>  +.ref_ctrl   = 0x514d,
>  +.ref_ctrl_final = 0x144a,
>  +.sdram_tim1 = 0xd333887c,
>  +.sdram_tim2 = 0x30b37fe3,
>  +.sdram_tim3 = 0x409f8ad8,
>  +.read_idle_ctrl = 0x0005,
>  +.zq_config  = 0x5007190b,
>  +.temp_alert_config  = 0x,
>  +.emif_ddr_phy_ctlr_1_init   = 0x0024400f,
>  +.emif_ddr_phy_ctlr_1= 0x0e24400f,
>  +.emif_ddr_ext_phy_ctrl_1= 0x10040100,
>  +.emif_ddr_ext_phy_ctrl_2= 0x00910091,
>  +.emif_ddr_ext_phy_ctrl_3= 0x00950095,
>  +.emif_ddr_ext_phy_ctrl_4= 0x009b009b,
>  +.emif_ddr_ext_phy_ctrl_5= 0x009e009e,
>  +.emif_rd_wr_lvl_rmp_win = 0x,
>  +.emif_rd_wr_lvl_rmp_ctl = 0x8000,
>  +.emif_rd_wr_lvl_ctl = 0x,
>  +.emif_rd_wr_exec_thresh = 0x0305,
>  +.emif_ecc_ctrl_reg  = 0xD001,
>  +.emif_ecc_address_range_1   = 0x3FFF,
>  +.emif_ecc_address_range_2   = 0x
>  +};  
> >>>
> >>> I'm wondering if it would be possible to:
> >>>
> >>> Embed this memory setup (even as binary blob) to SPL FIT -> Those
> >>> values are generated from TI supplied excel sheet (when memory
> >>> details are provided).
> >>>
> >>>
> >>> Pros:
> >>> 
> >>>
> >>> - Since the same EMIF controller is used, one could only adjust the
> >>>   binary blob, when new memory (faster, slower, from other
> >>> manufacturer) is used in the product.
> >>>
> >>> - There would be no need to add such code to the board file.  
> >>
> >> yeah, ddr is not the only thing that comes in this bucket, PMIC data
> >> as well can be also made in similar way. I mean all the board related
> >> information can be moved out.
> > 
> >

[U-Boot] [PATCH 2/8] arm: zynq: Enable debug console for zc770 xm011

2018-01-10 Thread Michal Simek
Wire debug console which is useful for early debugging.

Signed-off-by: Michal Simek 
---

 configs/zynq_zc770_xm011_defconfig | 5 +
 1 file changed, 5 insertions(+)

diff --git a/configs/zynq_zc770_xm011_defconfig 
b/configs/zynq_zc770_xm011_defconfig
index d46238202ed2..3043c82c9dbe 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -5,6 +5,7 @@ CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011"
 CONFIG_SPL_STACK_R_ADDR=0x20
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
@@ -35,4 +36,8 @@ CONFIG_FPGA_XILINX=y
 CONFIG_NAND=y
 CONFIG_NAND_ZYNQ=y
 CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=5000
+CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
-- 
1.9.1

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[U-Boot] [PATCH 1/8] arm: zynq: Add identification string to Xilinx boards

2018-01-10 Thread Michal Simek
It is good to see this string to make sure that u-boot which runs on the
board is the same which should run there.

Signed-off-by: Michal Simek 
---

 configs/zynq_zc702_defconfig   | 1 +
 configs/zynq_zc706_defconfig   | 1 +
 configs/zynq_zc770_xm010_defconfig | 1 +
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +
 configs/zynq_zc770_xm013_defconfig | 1 +
 6 files changed, 6 insertions(+)

diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 0d0efc223dd4..1d097014f0d3 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
 CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_DEBUG_UART=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 4b186c9fffc6..dbcb4de1d8af 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC706"
 CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
 CONFIG_DEBUG_UART=y
diff --git a/configs/zynq_zc770_xm010_defconfig 
b/configs/zynq_zc770_xm010_defconfig
index 2b8fb3c9214a..f38ce4f1ce10 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010"
 CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
 CONFIG_DEBUG_UART=y
diff --git a/configs/zynq_zc770_xm011_defconfig 
b/configs/zynq_zc770_xm011_defconfig
index 52ad66a38f61..d46238202ed2 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011"
 CONFIG_SPL_STACK_R_ADDR=0x20
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
diff --git a/configs/zynq_zc770_xm012_defconfig 
b/configs/zynq_zc770_xm012_defconfig
index a8338f5c2d82..38937800497f 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM012"
 CONFIG_SPL_STACK_R_ADDR=0x20
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012"
diff --git a/configs/zynq_zc770_xm013_defconfig 
b/configs/zynq_zc770_xm013_defconfig
index 01e2cfe04fb2..6e9c957dddb3 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
+CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM013"
 CONFIG_SPL_STACK_R_ADDR=0x20
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
-- 
1.9.1

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[U-Boot] [PATCH 4/8] arm: zynq: Enable BLK when needed

2018-01-10 Thread Michal Simek
There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.

Signed-off-by: Michal Simek 
---

 arch/arm/Kconfig   | 1 -
 configs/zynq_cse_qspi_defconfig| 1 -
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +
 configs/zynq_zc770_xm013_defconfig | 1 +
 5 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f2c35e32c649..fdeef4d05d9d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -755,7 +755,6 @@ config ARCH_ZYNQ
select DM_SPI_FLASH
select SPL_SEPARATE_BSS if SPL
select DM_USB if USB
-   select BLK
select CLK
select SPL_CLK
select CLK_ZYNQ
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index 9659faefbf33..f6241cdf8c73 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -48,7 +48,6 @@ CONFIG_OF_EMBED=y
 # CONFIG_DM_WARN is not set
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
-# CONFIG_SPL_BLK is not set
 # CONFIG_ZYNQ_GPIO is not set
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zc770_xm011_defconfig 
b/configs/zynq_zc770_xm011_defconfig
index 2f1205aef1ef..e350ae04c758 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BLK=y
 CONFIG_FPGA_XILINX=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
diff --git a/configs/zynq_zc770_xm012_defconfig 
b/configs/zynq_zc770_xm012_defconfig
index 38937800497f..2ec53c3ceab7 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BLK=y
 CONFIG_FPGA_XILINX=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/zynq_zc770_xm013_defconfig 
b/configs/zynq_zc770_xm013_defconfig
index 6e9c957dddb3..08f8adef845d 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_BLK=y
 CONFIG_FPGA_XILINX=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
-- 
1.9.1

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[U-Boot] [PATCH 6/8] arm: zynq: Enable DM_GPIO when needed

2018-01-10 Thread Michal Simek
There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).

Signed-off-by: Michal Simek 
---

 arch/arm/Kconfig   | 1 -
 configs/syzygy_hub_defconfig   | 1 +
 configs/topic_miami_defconfig  | 1 +
 configs/topic_miamilite_defconfig  | 1 +
 configs/topic_miamiplus_defconfig  | 1 +
 configs/zynq_cc108_defconfig   | 1 +
 configs/zynq_cse_qspi_defconfig| 1 -
 configs/zynq_microzed_defconfig| 1 +
 configs/zynq_picozed_defconfig | 1 +
 configs/zynq_z_turn_defconfig  | 1 +
 configs/zynq_zc702_defconfig   | 1 +
 configs/zynq_zc706_defconfig   | 1 +
 configs/zynq_zc770_xm010_defconfig | 1 +
 configs/zynq_zc770_xm011_defconfig | 1 +
 configs/zynq_zc770_xm012_defconfig | 1 +
 configs/zynq_zc770_xm013_defconfig | 1 +
 configs/zynq_zed_defconfig | 1 +
 configs/zynq_zybo_defconfig| 1 +
 18 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d5fb5fed5c70..fa050e22162c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -747,7 +747,6 @@ config ARCH_ZYNQ
select SPL_OF_CONTROL if SPL
select DM
select DM_ETH if NET
-   select DM_GPIO
select SPL_DM if SPL
select DM_MMC if MMC
select DM_SPI
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 8bdc4be67d70..17a671b44615 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_ZYNQ_GEM=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index aabd705da0fb..d2dd1373d8d9 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -32,6 +32,7 @@ CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/topic_miamilite_defconfig 
b/configs/topic_miamilite_defconfig
index 7228283b3c6b..fac6e9f54d1d 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -32,6 +32,7 @@ CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/topic_miamiplus_defconfig 
b/configs/topic_miamiplus_defconfig
index d511a942838b..e2d6c935f480 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -30,6 +30,7 @@ CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index bdba0d1cc9ba..1b2b34821b7f 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index f6241cdf8c73..d4baeaa0c548 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -48,7 +48,6 @@ CONFIG_OF_EMBED=y
 # CONFIG_DM_WARN is not set
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_SPL_DM_SEQ_ALIAS=y
-# CONFIG_ZYNQ_GPIO is not set
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index fc21eb8f67a3..2ea885e67e22 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -40,6 +40,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index f36e7bd849f4..c39b2cb7af3b 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -35,6 +35,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_ZYNQ_GEM=y
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index c727b2acbf28..b5a81d5e19f4 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -36,6 +36,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 1d097014f0d3..2c38f006fcd2 100644
--- a/configs/zynq_zc702_def

[U-Boot] [PATCH 8/8] arm: zynq: Enable distro defaults setting

2018-01-10 Thread Michal Simek
BOOTCOMMAND is composed with distro_bootcmd but this variable is not
present. Enabling distro defaults setting is fixing it.

Signed-off-by: Michal Simek 
---

 configs/syzygy_hub_defconfig   | 11 +--
 configs/topic_miami_defconfig  |  6 +-
 configs/topic_miamilite_defconfig  |  6 +-
 configs/topic_miamiplus_defconfig  |  6 +-
 configs/zynq_cc108_defconfig   | 11 +--
 configs/zynq_microzed_defconfig| 10 +-
 configs/zynq_picozed_defconfig | 10 +-
 configs/zynq_z_turn_defconfig  | 10 +-
 configs/zynq_zc702_defconfig   | 11 +--
 configs/zynq_zc706_defconfig   | 11 +--
 configs/zynq_zc770_xm010_defconfig | 11 +--
 configs/zynq_zed_defconfig | 11 +--
 configs/zynq_zybo_defconfig| 10 +-
 13 files changed, 13 insertions(+), 111 deletions(-)

diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 117476f64c72..f4ae8e0f25eb 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -6,18 +6,16 @@ CONFIG_SYS_TEXT_BASE=0x400
 CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub"
 CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
-CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_EEPROM=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
@@ -30,15 +28,8 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index cf2f513e94d1..1e1a3ddb4917 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -7,13 +7,12 @@ CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami"
 CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=0
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_DFU=y
@@ -27,9 +26,6 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
diff --git a/configs/topic_miamilite_defconfig 
b/configs/topic_miamilite_defconfig
index cfdaff1340d2..1e51bc5c873f 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -7,13 +7,12 @@ CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite"
 CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=0
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_DFU=y
@@ -27,9 +26,6 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
diff --git a/configs/topic_miamiplus_defconfig 
b/configs/topic_miamiplus_defconfig
index 223dc2efef5c..7dd07c7e48b0 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -7,13 +7,12 @@ CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus"
 CONFIG_DEBUG_UART=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=0
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_DFU=y
@@ -25,9 +24,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index 83560f2630b4..02445ac4ab7d 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -4,17 +4,15 @@ 

[U-Boot] [PATCH 3/8] arm: zynq: Disable networking for zc770 xm011

2018-01-10 Thread Michal Simek
Ethernet cable is not connected for xm011 that's why disable all
ethernet related configurations.

Signed-off-by: Michal Simek 
---

 configs/zynq_zc770_xm011_defconfig | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/configs/zynq_zc770_xm011_defconfig 
b/configs/zynq_zc770_xm011_defconfig
index 3043c82c9dbe..2f1205aef1ef 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -24,20 +24,18 @@ CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_NAND_LOCK_UNLOCK=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_NAND_ZYNQ=y
-CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
 CONFIG_DEBUG_UART_BASE=0xe0001000
 CONFIG_DEBUG_UART_CLOCK=5000
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
-- 
1.9.1

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[U-Boot] [PATCH 5/8] arm: zynq: Enable DM_ETH and DM_MMC only if subsystem is enabled

2018-01-10 Thread Michal Simek
Do not enable DM_ETH/MMC if subsystems are not enabled.
This saves memory for memory constrained boards like cse.

Signed-off-by: Michal Simek 
---

 arch/arm/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fdeef4d05d9d..d5fb5fed5c70 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -746,10 +746,10 @@ config ARCH_ZYNQ
select SPL_BOARD_INIT if SPL
select SPL_OF_CONTROL if SPL
select DM
-   select DM_ETH
+   select DM_ETH if NET
select DM_GPIO
select SPL_DM if SPL
-   select DM_MMC
+   select DM_MMC if MMC
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
-- 
1.9.1

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[U-Boot] [PATCH 7/8] arm: zynq: Move bootcommand to defconfig

2018-01-10 Thread Michal Simek
It will cleanup generic config and enable option to change it for every
board.

Signed-off-by: Michal Simek 
---

Alex: Feel free to remove that run $modeboot for z_turn.

---
 configs/syzygy_hub_defconfig   | 2 ++
 configs/topic_miami_defconfig  | 2 ++
 configs/topic_miamilite_defconfig  | 2 ++
 configs/topic_miamiplus_defconfig  | 2 ++
 configs/zynq_cc108_defconfig   | 2 ++
 configs/zynq_microzed_defconfig| 2 ++
 configs/zynq_picozed_defconfig | 2 ++
 configs/zynq_z_turn_defconfig  | 2 ++
 configs/zynq_zc702_defconfig   | 2 ++
 configs/zynq_zc706_defconfig   | 2 ++
 configs/zynq_zc770_xm010_defconfig | 2 ++
 configs/zynq_zc770_xm011_defconfig | 2 ++
 configs/zynq_zc770_xm012_defconfig | 2 ++
 configs/zynq_zc770_xm013_defconfig | 2 ++
 configs/zynq_zed_defconfig | 2 ++
 configs/zynq_zybo_defconfig| 2 ++
 include/configs/zynq-common.h  | 1 -
 include/configs/zynq_cse.h | 1 -
 18 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 17a671b44615..117476f64c72 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index d2dd1373d8d9..cf2f513e94d1 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -8,6 +8,8 @@ 
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/topic_miamilite_defconfig 
b/configs/topic_miamilite_defconfig
index fac6e9f54d1d..cfdaff1340d2 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -8,6 +8,8 @@ 
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/topic_miamiplus_defconfig 
b/configs/topic_miamiplus_defconfig
index e2d6c935f480..223dc2efef5c 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -8,6 +8,8 @@ 
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index 1b2b34821b7f..83560f2630b4 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -7,6 +7,8 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index 2ea885e67e22..232b285c10f6 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -6,6 +6,8 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed"
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index c39b2cb7af3b..7e4dfdf7cef8 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -3,6 +3,8 @@ CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x400
 CONFIG_SPL_STACK_R_ADDR=0x20
 CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index b5a81d5e19f4..7376d1febb32 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -7,6 +7,8 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 2c38f006fcd2..f92bba6f39c6 100644

[U-Boot] [PATCH] arm: zynq: Fix pmu register description coding style

2018-01-10 Thread Michal Simek
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.

Reported-by: Julia Cartwright 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-7000.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index d9774d85d10b..7ef102ad05cd 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -50,7 +50,8 @@
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;
interrupt-parent = <&intc>;
-   reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
+   reg = <0xf8891000 0x1000>,
+ <0xf8893000 0x1000>;
};
 
regulator_vccpint: fixedregulator {
-- 
1.9.1

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Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses

2018-01-10 Thread Goldschmidt Simon
On Tue 09/01/18 14:19, Vignesh R wrote:
> This series reverts use of bounce_buf.c for non-DMA related alignment 
> restriction
> and replaces it with local bounce buffer to handle problems with non 32 bit 
> aligned
> writes on TI platforms.
> Based on top of Jason's series:
> https://patchwork.ozlabs.org/cover/856431/
> 
> Tested on K2G EVM.

For this whole series:
Tested on a socfpga-cyclonev board (with a Micron N25QL256A):
Tested-by: Simon Goldschmidt 

After applying this series on top of Jason's v5, qspi on the socfpga is finally
working without local fixes!

Regards,
Simon
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[U-Boot] [PATCH 1/2] arm64: zynqmp: Remove whitespaces in psu_init() comment

2018-01-10 Thread Michal Simek
Remove additional spaces before comment.

Signed-off-by: Michal Simek 
---

 arch/arm/cpu/armv8/zynqmp/spl.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 41b0070a5e1a..e51e2b615679 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -131,10 +131,10 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void psu_init(void)
 {
-/*
- * This function is overridden by the one in
- * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
- */
+   /*
+* This function is overridden by the one in
+* board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
+*/
 }
 
 #ifdef CONFIG_SPL_OS_BOOT
-- 
1.9.1

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[U-Boot] [PATCH 2/2] arm64: zynqmp: Propagate error value from psu_init()

2018-01-10 Thread Michal Simek
psu_init() returns int which wasn't declared and checked.
The patch is fixing function declarations and code to handle return
values properly.

Signed-off-by: Michal Simek 
---

 arch/arm/cpu/armv8/zynqmp/spl.c  | 3 ++-
 arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 +-
 board/xilinx/zynqmp/zynqmp.c | 5 +++--
 3 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index e51e2b615679..41ca74a2be2b 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -129,12 +129,13 @@ u32 spl_boot_mode(const u32 boot_device)
}
 }
 
-__weak void psu_init(void)
+__weak int psu_init(void)
 {
/*
 * This function is overridden by the one in
 * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
 */
+   return -1;
 }
 
 #ifdef CONFIG_SPL_OS_BOOT
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h 
b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index ad2856863363..4dfabba80a5c 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -33,7 +33,7 @@ enum {
 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
 unsigned int zynqmp_get_silicon_version(void);
 
-void psu_init(void);
+int psu_init(void);
 
 void handoff_setup(void);
 
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 8b6c0ea46698..db557e880674 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -237,15 +237,16 @@ static char *zynqmp_get_silicon_idcode_name(void)
 
 int board_early_init_f(void)
 {
+   int ret = 0;
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP)
zynqmp_pmufw_version();
 #endif
 
 #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
-   psu_init();
+   ret = psu_init();
 #endif
 
-   return 0;
+   return ret;
 }
 
 #define ZYNQMP_VERSION_SIZE9
-- 
1.9.1

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[U-Boot] [PATCH 1/2] arm64: zynqmp: Prepare psu_init rework

2018-01-10 Thread Michal Simek
Move generic functions to common location spl.c. Function declarations
are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.

Signed-off-by: Michal Simek 
---

Depends on previous psu_init patches

---
 arch/arm/cpu/armv8/zynqmp/spl.c | 55 +
 arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h | 25 +++
 arch/arm/include/asm/arch-zynqmp/sys_proto.h|  2 -
 board/xilinx/zynqmp/zynqmp.c|  1 +
 4 files changed, 81 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 41ca74a2be2b..da983458a982 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 void board_init_f(ulong dummy)
 {
@@ -156,3 +157,57 @@ int board_fit_config_name_match(const char *name)
return 0;
 }
 #endif
+
+#define PSU_MASK_POLL_TIME 110
+
+int __maybe_unused mask_pollonvalue(unsigned long add, u32 mask, u32 value)
+{
+   int i = 0;
+
+   while ((__raw_readl(add) & mask) != value) {
+   if (i == PSU_MASK_POLL_TIME)
+   return 0;
+   i++;
+   }
+   return 1;
+}
+
+__weak int mask_poll(u32 add, u32 mask)
+{
+   int i = 0;
+   unsigned long addr = add;
+
+   while (!(__raw_readl(addr) & mask)) {
+   if (i == PSU_MASK_POLL_TIME)
+   return 0;
+   i++;
+   }
+   return 1;
+}
+
+__weak void mask_delay(u32 delay)
+{
+   udelay(delay);
+}
+
+__weak void psu_mask_write(unsigned long offset, unsigned long mask,
+  unsigned long val)
+{
+   unsigned long regval = 0;
+
+   regval = readl(offset);
+   regval &= ~(mask);
+   regval |= (val & mask);
+   writel(regval, offset);
+}
+
+__weak void prog_reg(unsigned long addr, unsigned long mask,
+unsigned long shift, unsigned long value)
+{
+   int rdata = 0;
+
+   rdata = readl(addr);
+   rdata = rdata & (~mask);
+   rdata = rdata | (value << shift);
+   writel(rdata, addr);
+}
diff --git a/arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h 
b/arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h
new file mode 100644
index ..29ea8ee1aa19
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynqmp/psu_init_gpl.h
@@ -0,0 +1,25 @@
+/*
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _PSU_INIT_GPL_H_ /* prevent circular inclusions */
+#define _PSU_INIT_GPL_H_
+
+#include 
+#include 
+
+int mask_pollonvalue(unsigned long add, u32 mask, u32 value);
+
+int mask_poll(u32 add, u32 mask);
+
+void mask_delay(u32 delay);
+
+void psu_mask_write(unsigned long offset, unsigned long mask,
+   unsigned long val);
+
+void prog_reg(unsigned long addr, unsigned long mask,
+ unsigned long shift, unsigned long value);
+
+int psu_init(void);
+
+#endif /* _PSU_INIT_GPL_H_ */
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h 
b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index 4dfabba80a5c..084d55a2b01f 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -33,8 +33,6 @@ enum {
 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
 unsigned int zynqmp_get_silicon_version(void);
 
-int psu_init(void);
-
 void handoff_setup(void);
 
 void zynqmp_pmufw_version(void);
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index db557e880674..824f4ae50fe5 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
1.9.1

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[U-Boot] [PATCH 2/2] arm64: zynqmp: Add psu_init for zcu102-rev1.0

2018-01-10 Thread Michal Simek
Add low level initialization for zcu102-rev1.0.

Signed-off-by: Michal Simek 
---

 .../zynqmp/zynqmp-zcu102-rev1.0/psu_init_gpl.c | 625 +
 1 file changed, 625 insertions(+)
 create mode 100644 board/xilinx/zynqmp/zynqmp-zcu102-rev1.0/psu_init_gpl.c

diff --git a/board/xilinx/zynqmp/zynqmp-zcu102-rev1.0/psu_init_gpl.c 
b/board/xilinx/zynqmp/zynqmp-zcu102-rev1.0/psu_init_gpl.c
new file mode 100644
index ..a351ffa0c2e9
--- /dev/null
+++ b/board/xilinx/zynqmp/zynqmp-zcu102-rev1.0/psu_init_gpl.c
@@ -0,0 +1,625 @@
+/*
+ * (c) Copyright 2015 Xilinx, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+
+static unsigned long psu_pll_init_data(void)
+{
+   psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C82U);
+   psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00015900U);
+   psu_mask_write(0xFF5E0030, 0x0008U, 0x0008U);
+   psu_mask_write(0xFF5E0030, 0x0001U, 0x0001U);
+   psu_mask_write(0xFF5E0030, 0x0001U, 0xU);
+   mask_poll(0xFF5E0040, 0x0002U);
+   psu_mask_write(0xFF5E0030, 0x0008U, 0xU);
+   psu_mask_write(0xFF5E0048, 0x3F00U, 0x0300U);
+   psu_mask_write(0xFF5E0038, 0x8000U, 0x80008E69U);
+   psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U);
+   psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U);
+   psu_mask_write(0xFF5E0020, 0x0008U, 0x0008U);
+   psu_mask_write(0xFF5E0020, 0x0001U, 0x0001U);
+   psu_mask_write(0xFF5E0020, 0x0001U, 0xU);
+   mask_poll(0xFF5E0040, 0x0001U);
+   psu_mask_write(0xFF5E0020, 0x0008U, 0xU);
+   psu_mask_write(0xFF5E0044, 0x3F00U, 0x0300U);
+   psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
+   psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
+   psu_mask_write(0xFD1A0020, 0x0008U, 0x0008U);
+   psu_mask_write(0xFD1A0020, 0x0001U, 0x0001U);
+   psu_mask_write(0xFD1A0020, 0x0001U, 0xU);
+   mask_poll(0xFD1A0044, 0x0001U);
+   psu_mask_write(0xFD1A0020, 0x0008U, 0xU);
+   psu_mask_write(0xFD1A0048, 0x3F00U, 0x0300U);
+   psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
+   psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
+   psu_mask_write(0xFD1A002C, 0x0008U, 0x0008U);
+   psu_mask_write(0xFD1A002C, 0x0001U, 0x0001U);
+   psu_mask_write(0xFD1A002C, 0x0001U, 0xU);
+   mask_poll(0xFD1A0044, 0x0002U);
+   psu_mask_write(0xFD1A002C, 0x0008U, 0xU);
+   psu_mask_write(0xFD1A004C, 0x3F00U, 0x0200U);
+   psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U);
+   psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015900U);
+   psu_mask_write(0xFD1A0038, 0x0008U, 0x0008U);
+   psu_mask_write(0xFD1A0038, 0x0001U, 0x0001U);
+   psu_mask_write(0xFD1A0038, 0x0001U, 0xU);
+   mask_poll(0xFD1A0044, 0x0004U);
+   psu_mask_write(0xFD1A0038, 0x0008U, 0xU);
+   psu_mask_write(0xFD1A0050, 0x3F00U, 0x0300U);
+   psu_mask_write(0xFD1A0040, 0x8000U, 0x80008E69U);
+
+   return 1;
+}
+
+static unsigned long psu_clock_init_data(void)
+{
+   psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
+   psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
+   psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U);
+   psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010500U);
+   psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
+   psu_mask_write(0xFF18030C, 0x0002U, 0xU);
+   psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
+   psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
+   psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000600U);
+   psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
+   psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
+   psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
+   psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
+   psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010F00U);
+   psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011E02U);
+   psu_mask_write(0xFF5E0104, 0x0007U, 0xU);
+   psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
+   psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
+   psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U);
+

Re: [U-Boot] [PATCH v2 0/3] cadence-quadspi: Fix issues with non 32bit aligned accesses

2018-01-10 Thread Marek Vasut
On 01/10/2018 04:33 PM, Goldschmidt Simon wrote:
> On Tue 09/01/18 14:19, Vignesh R wrote:
>> This series reverts use of bounce_buf.c for non-DMA related alignment 
>> restriction
>> and replaces it with local bounce buffer to handle problems with non 32 bit 
>> aligned
>> writes on TI platforms.
>> Based on top of Jason's series:
>> https://patchwork.ozlabs.org/cover/856431/
>>
>> Tested on K2G EVM.
> 
> For this whole series:
> Tested on a socfpga-cyclonev board (with a Micron N25QL256A):
> Tested-by: Simon Goldschmidt 
> 
> After applying this series on top of Jason's v5, qspi on the socfpga is 
> finally
> working without local fixes!

Super, thanks for testing.

Also, please fix your mailer so it doesn't break threading.

> Regards,
> Simon
> 


-- 
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[U-Boot] [PATCH v1] x86: tangier: Make _CRS for BTH0 Serialized to avoid warning

2018-01-10 Thread Andy Shevchenko
ASL compiler warns:

  ASL board/intel/edison/dsdt.asl
  board/intel/edison/dsdt.asl.tmp238: Method (_CRS, 0, 
NotSerialized)
  Remark   2120 -  Control Method should be made Serialized ^  (due to 
creation of named objects within)

Do as suggested by ASL compiler.

Fixes: 5d8c4ebd95e2 ("x86: tangier: Add Bluetooth to ACPI table")
Reported-by: Ferry Toth 
Signed-off-by: Andy Shevchenko 
---
 arch/x86/include/asm/arch-tangier/acpi/southcluster.asl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl 
b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
index 2b3b897c5b..5289b14957 100644
--- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
@@ -284,7 +284,7 @@ Device (PCI0)
 Return (STA_VISIBLE)
 }
 
-Method (_CRS, 0, NotSerialized)
+Method (_CRS, 0, Serialized)
 {
 Name (RBUF, ResourceTemplate ()
 {
-- 
2.15.1

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Re: [U-Boot] Please pull u-boot-marvell/master

2018-01-10 Thread Tom Rini
On Wed, Jan 10, 2018 at 12:40:37PM +0100, Stefan Roese wrote:

> Hi Tom,
> 
> please pull the following Marvell related patches.
> 
> Thanks,
> Stefan
> 
> 
> The following changes since commit f3dd87e0b98999a78e500e8c6d2b063ebadf535a:
> 
>   Prepare v2018.01 (2018-01-08 20:25:29 -0500)
> 
> are available in the Git repository at:
> 
>   git://www.denx.de/git/u-boot-marvell.git 
> 
> for you to fetch changes up to 0a05bf42b462c0fd0299c768560c5ad532cdf619:
> 
>   ARM: mvebu: correct reference for "ethernet1" on DB-88F6820-AMC (2018-01-10 
> 12:36:52 +0100)
> 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 2/2] arm: Exercise v7_arch_cp15_set_acr even without errata fixups

2018-01-10 Thread Tom Rini
On Sun, Aug 13, 2017 at 05:25:20AM +0300, Siarhei Siamashka wrote:

> By applying this patch, we are ensuring that the code paths
> responsible for applying errata workarounds are also exercised
> on CPU revisions, which actually don't need these workarounds.
> 
> Only CONFIG_ARM_ERRATA_621766, CONFIG_ARM_ERRATA_454179,
> CONFIG_ARM_ERRATA_725233 and CONFIG_ARM_ERRATA_430973 are
> covered by this patch (Cortex-A8).
> 
> This improves code coverage when testing U-Boot builds
> on newer hardware. In particular, the problematic commit
> 00bbe96ebabb ("arm: omap: Unify get_device_type() function")
> would break both BeageBoard and BeagleBoard XM rather than
> just older BeagleBoard.
> 
> As an additional bonus, we need fewer instructins and the SPL
> size is reduced.
> 
> Signed-off-by: Siarhei Siamashka 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 02/14] ARM: DTS: stm32: add stm32f429-disco-u-boot dts file

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:33AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> _ Add gpio compatible and aliases for stm32f429
> 
> _ Add FMC sdram node with associated new bindings value to
>   manage second bank (ie bank 1).
> 
> _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
>   pwrcfg and gpio nodes.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 01/14] ARM: DTS: stm32: add STM32F429 SoC and its Discovery board support

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:32AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> All these files comes from kernel v4.15-rc1.
> 
> Update some header with correct STMicroelectronics Copyright.
> 
> Remove the paragraph about writing to the Free Software
> Foundation's mailing address as requested by checkpatch.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 04/14] pinctrl: stm32: add stm32f4 pinctrl compatible strings

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:35AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> STM32F4 SoCs uses the same pinctrl block as found into
> STM32F7 and H7 SoCs.
> We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl"
> compatible string into pinctrl_stm32.c.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 08/14] board: stm32f429-disco: switch to DM STM32 clock driver

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:39AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> Use available DM clk_stm32f.c driver instead of dedicated
> mach-stm32/stm32f4/clock.c.
> 
> Migrate periph_clock defines from stm32_periph.h directly in
> CLK driver. These periph_clock defines will be removed when STMMAC,
> TIMER2 and SYSCFG drivers will support DM CLK.
> 
> Enable also CLK flag.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 14/14] ARM: DTS: stm32: add SDIO controller support for stm32f469-disco

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:45AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> STM32F469 SoC uses an arm_pl180_mmci SDIO controller.
> 
> Signed-off-by: Andrea Merello 
> Signed-off-by: Alexandre Torgue 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] fat write: Fixed a problem with the case of file names when writing files

2018-01-10 Thread Tom Rini
On Thu, Dec 21, 2017 at 12:49:47PM +0100, Jean-Jacques Hiblot wrote:

> commit 21a24c3bf35b ("fs/fat: fix case for FAT shortnames") made it
> possible that get_name() returns file names with some upper cases.
> find_directory_entry() must be updated to take this account, and use
> case-insensitive functions to compare file names.
> 
> Signed-off-by: Jean-Jacques Hiblot 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, RESEND, 12/14] ARM: DTS: stm32: add stm32f469-disco-u-boot dts file

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:43AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
>   _ Add gpio compatible and aliases for stm32f469
> 
>   _ Add FMC sdram node
> 
>   _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
> pwrcfg and gpio nodes.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 11/14] ARM: DTS: add STM32F469 Discovery board support

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:42AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> This DT file comes from kernel v4.15-rc1
> 
> stm32f469-pinctrl.dtsi header has been updated with correct
> STMicroelectronics Copyright.
> 
> Remove the paragraph about writing to the Free Software
> Foundation's mailing address as requested by checkpatch.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, RESEND, 1/2] ARM: DTS: stm32: add MMC nodes for stm32f746-disco and stm32f769-disco

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 10:14:59AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> Add DT nodes to enable ARM_PL180_MMCI IP support for STM32F746
> and STM32F769 discovery boards
> 
> There is a hardware issue on these boards, it misses a pullup on the GPIO line
> used as card detect to allow correct SD card detection.
> As workaround, cd-gpios property is not present in DT.
> So SD card is always considered present in the slot.
> 
> Signed-off-by: Christophe Priouzeau 
> Signed-off-by: Patrice Chotard 
> Reviewed-by: Simon Glass 

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Re: [U-Boot] [U-Boot, RESEND, 10/14] ram: stm32: add memory mapping selection support

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:41AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> This allows to controls the memory internal mapping at
> address 0x .
> We can either map at 0x  :
>   _ main flash memory
>   _ system flash memory
>   _ FMC bank1 (NOR/PSRAM 1 and 2)
>   _ embedded SRAM
>   _ FMC/SDRAM bank1
> 
> This is needed for future STM32F469-disco board
> 
> Signed-off-by: Patrice Chotard 

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Re: [U-Boot] [U-Boot, RESEND, 03/14] board: stm32f429-discovery: switch to DM STM32 sdram driver

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:34AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> Use available DM stm32_sdram.c driver instead of board
> SDRAM initialization.
> For that, enable OF_CONTROL, OF_EMBED and STM32_SDRAM flags.
> 
> Signed-off-by: Patrice Chotard 

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Re: [U-Boot] BCM283x ALT5 function for JTAG pins

2018-01-10 Thread Tom Rini
On Mon, Dec 18, 2017 at 12:13:30AM -0800, henryzhan...@yahoo.com wrote:

> From: Henry Zhang 
> 
> BCM2835 ARM Peripherals doc shows gpio pins 4, 5, 6, 12 and 13 carry altenate
> function, ALT5 for ARM JTAG
> 
> Signed-off-by: Henry Zhang 
> Reviewed-by: Simon Glass 

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Re: [U-Boot] Travis-CI: Split 't208xrdb t4qds t102*'-job into separate jobs

2018-01-10 Thread Tom Rini
On Wed, Dec 20, 2017 at 11:06:31AM +0100, Philipp Tomsich wrote:

> The 't208xrdb t4qds t102*' job is close to the time limit and
> sometimes fails, so this splits it into 3 separate jobs.
> 
> Signed-off-by: Philipp Tomsich 

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Re: [U-Boot] [U-Boot, RESEND, 07/14] mach-stm32: stmf32f4: timer: remove clock_get() call

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:38AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> In order to use common clock driver between STM32F4 and
> STM32F7, remove clock_get() call
> As APB_PSC is always set to 2, only case when
> clock_get(CLOCK_AHB) != clock_get(CLOCK_APB1) is kept
> 
> Signed-off-by: Patrice Chotard 

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Re: [U-Boot] [U-Boot, RESEND, 13/14] board: stm32: add stm32f469-discovery board support

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:44AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> This board offers :
> 
>  _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory
>and 324 Kbytes of RAM in BGA216 package
>  _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration 
> capability:
>  _ Mbed-enabled (mbed.org)
>  _ USB functions: USB virtual COM port, mass storage, debug port
>  _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive
>touch screen
>  _ SAI Audio DAC, with a stereo headphone output jack
>  _ 3 MEMS microphones
>  _ MicroSD card connector
>  _ I2C extension connector
>  _ 4Mx32bit SDRAM
>  _ 128-Mbit Quad-SPI NOR Flash
>  _ Reset and wake-up buttons
>  _ 4 color user LEDs
>  _ USB OTG FS with Micro-AB connector
>  _ Three power supply options:
>  _ Expansion connectors and Arduino™ UNO V3 connectors
> 
> Signed-off-by: Patrice Chotard 

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Re: [U-Boot] PCI: Drop CONFIG_TSI108_PCI

2018-01-10 Thread Tom Rini
On Tue, Dec 19, 2017 at 12:28:42AM +0200, Tuomas Tynkkynen wrote:

> Last user of this option went away in 2015 in commit:
> d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")
> 
> Signed-off-by: Tuomas Tynkkynen 

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Re: [U-Boot] [U-Boot, 2/3] build: Drop CONFIG_SPL_BUILD guards in some cases

2018-01-10 Thread Tom Rini
On Thu, Dec 21, 2017 at 10:13:22PM -0500, Tom Rini wrote:

> Given gcc-6.1 and later we can now safely have strings discarded when
> the functions are unused.  This lets us drop certain cases of not
> building something so that we don't have the strings brought in when the
> code was discarded.  Simplify the code now by dropping guards we don't
> need now.
> 
> Cc: Stefano Babic 
> Cc: Fabio Estevam 
> Cc: Chander Kashyap 
> Cc: Thomas Abraham 
> Cc: Vipin Kumar 
> Cc: Wenyou Yang 
> Signed-off-by: Tom Rini 

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Re: [U-Boot] [U-Boot, RESEND, 2/2] configs: stm32f746-disco: enable MMC related flags

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 10:15:00AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> STM32F469-disco embeds an arm_pl180 mmc IP, so
> enable CMD_MMC, DM_MMC and ARM_PL180_MMCI flags.
> 
> Also enables all filesystem command related flags :
>   _ CMD_EXT2
>   _ CMD_EXT4
>   _ CMD_FAT
>   _ CMD_FS_GENERIC
>   _ CMD_GPT
>   _ CMD_BOOTZ
> 
> Signed-off-by: Patrice Chotard 
> Reviewed-by: Simon Glass 

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Re: [U-Boot] [U-Boot, RESEND, 09/14] board: stm32f429-disco: switch to DM STM32 pinctrl and gpio driver

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:40AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> Use available DM stm32f7_gpio.c and pinctrl_stm32.c drivers
> instead of board GPIO initialization.
> 
> Remove stm32_gpio.c which is no more used and migrate
> structs stm32_gpio_regs and stm32_gpio_priv into
> arch-stm32f4/gpio.h to not break compilation.
> 
> Signed-off-by: Patrice Chotard 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 1/2] ARM: Drop unreferenced CONFIG_MACH_* defines

2018-01-10 Thread Tom Rini
On Thu, Dec 21, 2017 at 03:58:53AM +0200, Tuomas Tynkkynen wrote:

> These macros are all defined once and never checked or used anywhere:
> 
> CONFIG_MACH_ASPENITE
> CONFIG_MACH_DAVINCI_CALIMAIN
> CONFIG_MACH_DOCKSTAR
> CONFIG_MACH_EDMINIV2
> CONFIG_MACH_GOFLEXHOME
> CONFIG_MACH_GONI
> CONFIG_MACH_GURUPLUG
> CONFIG_MACH_KM_KIRKWOOD
> CONFIG_MACH_OPENRD_BASE
> CONFIG_MACH_SHEEVAPLUG
> 
> Almost all of them were only used for the mach_is_foo() logic in
> arch/arm/asm/mach-types.h that were dropped in
> commit f9dadaef8b75fa ("arm: Re-sync asm/mach-types.h with
> Linux Kernel v4.9")
> 
> Signed-off-by: Tuomas Tynkkynen 

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Re: [U-Boot] [U-Boot, RESEND, 06/14] board: stm32f429-disco: switch to DM STM32 serial driver

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:37AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> Remove serial_stm32.c driver and uart init from board file,
> use available DM serial_stm32x7.c driver compatible for
> STM32F4/F7 and H7 SoCs.
> 
> The serial_stm32x7.c driver will be renamed later with a more
> generic name as it's shared with all STM32 Socs.
> 
> Signed-off-by: Patrice Chotard 

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Re: [U-Boot] [U-Boot, RESEND, 05/14] configs: stm32f429-disco: enable MISC, STM32_RCC, DM_RESET and STM32_RESET

2018-01-10 Thread Tom Rini
On Tue, Dec 12, 2017 at 09:49:36AM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> This allows to support rcc MFD driver.
> By enabling all these flags, we need to increase malloc area to avoid
> crash during early stage.
> 
> Signed-off-by: Patrice Chotard 

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Re: [U-Boot] linux/kernel.h: Add ALIGN_DOWN macro

2018-01-10 Thread Tom Rini
On Thu, Dec 21, 2017 at 01:51:46PM +0900, Masahiro Yamada wrote:

> Follow Linux commit ed067d4a859f ("linux/kernel.h: Add ALIGN_DOWN
> macro").
> 
> Signed-off-by: Masahiro Yamada 

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Re: [U-Boot] configs: am57xx_evm: fix ethernet phy configuration

2018-01-10 Thread Tom Rini
On Wed, Dec 20, 2017 at 08:39:14PM +0530, Sekhar Nori wrote:

> Configure AM57xx EVMs for the exact PHY part that is
> present on the various boards. This makes U-Boot apply
> configurations needed for this PHY like centering the
> FLP timing.
> 
> For configurations to take effect, DM_ETH needs to be
> enabled. Do that too.
> 
> Tested on BeagleBoard x15 and AM571x IDK.
> 
> Reviewed-by: Lokesh Vutla 
> Signed-off-by: Sekhar Nori 

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Re: [U-Boot] [U-Boot,2/2] sh: Drop unreferenced CONFIG_* defines

2018-01-10 Thread Tom Rini
On Thu, Dec 21, 2017 at 03:58:54AM +0200, Tuomas Tynkkynen wrote:

> The following config symbols are only defined once and never referenced
> anywhere else:
> 
> CONFIG_AP325RXA
> CONFIG_AP_SH4A_4A
> CONFIG_CPU_SH_TYPE_R
> CONFIG_ECOVEC
> CONFIG_ESPT
> CONFIG_MIGO_R
> CONFIG_MPR2
> CONFIG_MS7720SE
> CONFIG_MS7722SE
> CONFIG_MS7750SE
> CONFIG_R0P7734
> CONFIG_R2DPLUS
> CONFIG_RSK7203
> CONFIG_RSK7264
> CONFIG_RSK7269
> CONFIG_SH7752EVB
> CONFIG_SH7753EVB
> CONFIG_SH7757LCR
> CONFIG_SH7763RDP
> CONFIG_SH7785LCR
> 
> Most of them are config symbols named after the respective boards which
> seems to have been a standard practice at some point.
> 
> Signed-off-by: Tuomas Tynkkynen 

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[U-Boot] [PATCH v4 1/1] vsprintf.c: add EFI device path printing

2018-01-10 Thread Heinrich Schuchardt
For debugging efi_loader we need the capability to print EFI
device paths. With this patch we can write:

debug("device path: %pD", dp);

A possible output would be

device path: /MemoryMapped(0x0,0x3ff93a82,0x3ff93a82)

This enhancement is not available when building without EFI support
and neither in the SPL nor in the API example.

A test is provided. It can be executed in the sandbox with command
ut_print.

The development for EFI support in the sandbox is currently in
branch u-boot-dm/efi-working. The branch currently lacks
commit 6ea8b580f06b ("efi_loader: correct DeviceNodeToText
for media types"). Ater rebasing the aforementioned branch on
U-Boot v2018.01 the test is executed successfully.

Without EFI support in the sandbox the test is simply skipped.

Cc: Wolfgang Denk 
Cc: Simon Glass 
Suggested-by: Rob Clark 
Signed-off-by: Heinrich Schuchardt 
---
I propose Alex picks up this patch for the EFI tree.

v4:
Add unit test.
v3:
Return -ENOMEM if out of memory.
Avoid missing dependency error when building the SPL of the
API example.
v2:
Panic if out of memory.
Wolfgang suggested not to silently ignore an out of memory
situation.
---
 examples/api/Makefile |  3 +++
 lib/vsprintf.c| 47 +--
 test/print_ut.c   | 37 +
 3 files changed, 81 insertions(+), 6 deletions(-)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index 899527267d..9068727b98 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -4,6 +4,9 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+# Provide symbol API_BUILD to signal that the API example is being built.
+KBUILD_CPPFLAGS += -DAPI_BUILD
+
 ifeq ($(ARCH),powerpc)
 LOAD_ADDR = 0x4
 endif
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index dd572d2868..226f4eb3e5 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -11,16 +11,17 @@
  * from hush: simple_itoa() was lifted from boa-0.93.15
  */
 
-#include 
-#include 
-#include 
-#include 
-
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
-#include 
 #define noinline __attribute__((noinline))
 
 /* we use this so that we can do without the ctype library */
@@ -292,6 +293,26 @@ static char *string16(char *buf, char *end, u16 *s, int 
field_width,
return buf;
 }
 
+#if defined(CONFIG_EFI_LOADER) && \
+   !defined(CONFIG_SPL_BUILD) && !defined(API_BUILD)
+static char *device_path_string(char *buf, char *end, void *dp, int 
field_width,
+   int precision, int flags)
+{
+   u16 *str;
+
+   if (!dp)
+   return "";
+
+   str = efi_dp_str((struct efi_device_path *)dp);
+   if (!str)
+   return ERR_PTR(-ENOMEM);
+
+   buf = string16(buf, end, str, field_width, precision, flags);
+   efi_free_pool(str);
+   return buf;
+}
+#endif
+
 #ifdef CONFIG_CMD_NET
 static const char hex_asc[] = "0123456789abcdef";
 #define hex_asc_lo(x)  hex_asc[((x) & 0x0f)]
@@ -435,6 +456,12 @@ static char *pointer(const char *fmt, char *buf, char 
*end, void *ptr,
 #endif
 
switch (*fmt) {
+#if defined(CONFIG_EFI_LOADER) && \
+   !defined(CONFIG_SPL_BUILD) && !defined(API_BUILD)
+   case 'D':
+   return device_path_string(buf, end, ptr, field_width,
+ precision, flags);
+#endif
 #ifdef CONFIG_CMD_NET
case 'a':
flags |= SPECIAL | ZEROPAD;
@@ -604,6 +631,8 @@ repeat:
str = pointer(fmt + 1, str, end,
va_arg(args, void *),
field_width, precision, flags);
+   if (IS_ERR(str))
+   return PTR_ERR(str);
/* Skip all alphanumeric pointer suffixes */
while (isalnum(fmt[1]))
fmt++;
@@ -768,6 +797,9 @@ int printf(const char *fmt, ...)
i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args);
va_end(args);
 
+   /* Handle error */
+   if (i <= 0)
+   return i;
/* Print the string */
puts(printbuffer);
return i;
@@ -784,6 +816,9 @@ int vprintf(const char *fmt, va_list args)
 */
i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args);
 
+   /* Handle error */
+   if (i <= 0)
+   return i;
/* Print the string */
puts(printbuffer);
return i;
diff --git a/test/print_ut.c b/test/print_ut.c
index a42c554bef..d10ed8695b 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -7,12 +7,46 @@
 #define DEBUG
 
 #include 
+#if defined(CONFIG_EFI_LOADER) && \
+   !defined(CONFIG_SPL_BUILD) && !defined(API_BUILD)
+#include 
+#endif
 #include 
 #include 
 
 #define FAKE_BUILD_TAG "jenkins-u-boot-denx_uboot_dm-master-build-aa

[U-Boot] [PATCH v1] x86: Fix reference to QEMU variant of write_acpi_tables()

2018-01-10 Thread Andy Shevchenko
The commit

  eece493a7ac1 ("cmd: qfw: bring ACPI generation code into qfw core")

moves ACPI related code to another file and missed an update of
references in acpi_table.c.

Do it now.

Fixes: eece493a7ac1 ("cmd: qfw: bring ACPI generation code into qfw core")
Cc: Miao Yan 
Signed-off-by: Andy Shevchenko 
---
 arch/x86/lib/acpi_table.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 3eb101105b..7b33cd371e 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -357,8 +357,7 @@ void enter_acpi_mode(int pm1_cnt)
 }
 
 /*
- * QEMU's version of write_acpi_tables is defined in
- * arch/x86/cpu/qemu/acpi_table.c
+ * QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
  */
 ulong write_acpi_tables(ulong start)
 {
-- 
2.15.1

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[U-Boot] [PATCH v1 2/2] x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters

2018-01-10 Thread Andy Shevchenko
New field acpi_rsdp_addr, which has been introduced in boot protocol
v2.14 [1], in boot parameters tells kernel the exact address of RDSP
ACPI table. Knowing it increases robustness of the kernel by avoiding
in some cases traversal through a part of physical memory.
It will slightly reduce boot time by the same reason.

[1] See Linux kernel commit

  2f74cbf947f4 ("x86/boot: Add the ACPI RSDP address to struct 
setup_header::acpi_rdsp_addr")

for the details.

Signed-off-by: Andy Shevchenko 
---
 arch/x86/include/asm/bootparam.h |  1 +
 arch/x86/lib/acpi_table.c|  7 +++
 arch/x86/lib/acpi_table.h| 10 ++
 arch/x86/lib/zimage.c|  6 ++
 4 files changed, 24 insertions(+)
 create mode 100644 arch/x86/lib/acpi_table.h

diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index 48b138c6b0..90768a99ce 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -66,6 +66,7 @@ struct setup_header {
__u64   pref_address;
__u32   init_size;
__u32   handover_offset;
+   __u64   acpi_rsdp_addr;
 } __attribute__((packed));
 
 struct sys_desc_table {
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 7b33cd371e..45bfc111ef 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include "acpi_table.h"
 
 /*
  * IASL compiles the dsdt entries and writes the hex values
@@ -27,6 +28,11 @@
  */
 extern const unsigned char AmlCode[];
 
+/*
+ * ACPI RSDP address to be used in boot parameters.
+ */
+unsigned long acpi_rsdp_addr;
+
 static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
struct acpi_xsdt *xsdt)
 {
@@ -460,6 +466,7 @@ ulong write_acpi_tables(ulong start)
 
debug("current = %x\n", current);
 
+   acpi_rsdp_addr = (unsigned long)rsdp;
debug("ACPI: done\n");
 
/* Don't touch ACPI hardware on HW reduced platforms */
diff --git a/arch/x86/lib/acpi_table.h b/arch/x86/lib/acpi_table.h
new file mode 100644
index 00..cece5d1420
--- /dev/null
+++ b/arch/x86/lib/acpi_table.h
@@ -0,0 +1,10 @@
+/*
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef _X86_LIB_ACPI_TABLES_H
+#define _X86_LIB_ACPI_TABLES_H
+
+extern unsigned long acpi_rsdp_addr;
+
+#endif
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index d224db4e07..eae26635b1 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -24,6 +24,7 @@
 #include 
 #endif
 #include 
+#include "acpi_table.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -255,6 +256,11 @@ int setup_zimage(struct boot_params *setup_base, char 
*cmd_line, int auto_boot,
hdr->hardware_subarch = X86_SUBARCH_INTEL_MID;
 #endif
 
+#ifdef CONFIG_GENERATE_ACPI_TABLE
+   if (bootproto >= 0x020e)
+   hdr->acpi_rsdp_addr = acpi_rsdp_addr;
+#endif
+
setup_video(&setup_base->screen_info);
 
return 0;
-- 
2.15.1

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[U-Boot] [PATCH v1 1/2] x86: zImage: Move subarch assignment out of cmd_line check

2018-01-10 Thread Andy Shevchenko
The commit

  20bfac0599bd ("x86: zImage: add Intel MID platforms support")

introduced an assignment of subarch field in boot parameters, though
missed the right place of doing that. It doesn't matter if we have or
not a kernel command line supplied, we just set that field. Although
guard it by protocol version which supports it.

Fixes: 20bfac0599bd ("x86: zImage: add Intel MID platforms support")
Cc: Vincent Tinelli 
Signed-off-by: Andy Shevchenko 
---
 arch/x86/lib/zimage.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 00172dc7c1..d224db4e07 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -246,14 +246,15 @@ int setup_zimage(struct boot_params *setup_base, char 
*cmd_line, int auto_boot,
hdr->setup_move_size = 0x9100;
}
 
-#if defined(CONFIG_INTEL_MID)
-   hdr->hardware_subarch = X86_SUBARCH_INTEL_MID;
-#endif
-
/* build command line at COMMAND_LINE_OFFSET */
build_command_line(cmd_line, auto_boot);
}
 
+#ifdef CONFIG_INTEL_MID
+   if (bootproto >= 0x0207)
+   hdr->hardware_subarch = X86_SUBARCH_INTEL_MID;
+#endif
+
setup_video(&setup_base->screen_info);
 
return 0;
-- 
2.15.1

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Re: [U-Boot] [PATCH v2 3/3] ls1088ardb: Add SD Secure boot target support

2018-01-10 Thread York Sun
On 01/05/2018 08:00 AM, Sumit Garg wrote:
> Signed-off-by: Udit Agarwal 
> Signed-off-by: Sumit Garg 
> ---
> 
> Changes in v2:
> Rebased to top of master
> 
>  arch/arm/include/asm/fsl_secure_boot.h | 16 
>  board/freescale/ls1088a/MAINTAINERS|  5 +++
>  .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig   | 45 
> ++
>  include/configs/ls1088a_common.h   | 15 +++-
>  4 files changed, 72 insertions(+), 9 deletions(-)
>  create mode 100644 configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> 
> diff --git a/arch/arm/include/asm/fsl_secure_boot.h 
> b/arch/arm/include/asm/fsl_secure_boot.h
> index ec6463d..3f30470 100644
> --- a/arch/arm/include/asm/fsl_secure_boot.h
> +++ b/arch/arm/include/asm/fsl_secure_boot.h
> @@ -26,6 +26,14 @@
>  
>  #define CONFIG_KEY_REVOCATION
>  
> +#if defined(CONFIG_FSL_LAYERSCAPE)
> +/*
> + * For fsl layerscape based platforms, ESBC image Address in Header
> + * is 64 bit.
> + */
> +#define CONFIG_ESBC_ADDR_64BIT
> +#endif
> +
>  #ifndef CONFIG_SPL_BUILD
>  #ifndef CONFIG_SYS_RAMBOOT
>  /* The key used for verification of next level images
> @@ -42,14 +50,6 @@
>  
>  #endif
>  
> -#if defined(CONFIG_FSL_LAYERSCAPE)
> -/*
> - * For fsl layerscape based platforms, ESBC image Address in Header
> - * is 64 bit.
> - */
> -#define CONFIG_ESBC_ADDR_64BIT
> -#endif
> -
>  #ifdef CONFIG_ARCH_LS2080A
>  #define CONFIG_EXTRA_ENV \
>   "setenv fdt_high 0xa000;"   \
> diff --git a/board/freescale/ls1088a/MAINTAINERS 
> b/board/freescale/ls1088a/MAINTAINERS
> index de3961d..371e5db 100644
> --- a/board/freescale/ls1088a/MAINTAINERS
> +++ b/board/freescale/ls1088a/MAINTAINERS
> @@ -27,3 +27,8 @@ M:  Udit Agarwal 
>  M:   Vinitha Pillai-B57223 
>  S:   Maintained
>  F:   configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
> +
> +LS1088ARDB_SD_SECURE_BOOT BOARD
> +M:   Sumit Garg 
> +S:   Maintained
> +F:   configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig 
> b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> new file mode 100644
> index 000..ba90e64
> --- /dev/null
> +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
> @@ -0,0 +1,45 @@
> +CONFIG_ARM=y
> +CONFIG_TARGET_LS1088ARDB=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_FSL_LS_PPA=y
> +CONFIG_SPL_MMC_SUPPORT=y
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
> +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
> +CONFIG_DISTRO_DEFAULTS=y
> +# CONFIG_SYS_MALLOC_F is not set
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_OF_BOARD_SETUP=y
> +CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
> +CONFIG_SECURE_BOOT=y
> +CONFIG_SD_BOOT=y
> +# CONFIG_USE_BOOTCOMMAND is not set
> +# CONFIG_DISPLAY_BOARDINFO is not set
> +CONFIG_SPL=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
> +CONFIG_SPL_ENV_SUPPORT=y
> +CONFIG_SPL_I2C_SUPPORT=y
> +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_OF_CONTROL=y
> +CONFIG_ENV_IS_IN_MMC=y

This looks wrong. For secure boot you don't use env, do you? If you
agree I can drop this line when applying this patch.

York
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[U-Boot] compilation issue pine64

2018-01-10 Thread Akash Gajjar
Hi All,

Facing compilation issue building pine64 mainline u-boot.
Please see below build log.

user]$ export CROSS_COMPILE=aarch64-linux-gnu-

user]$ make pine64_plus_defconfig
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/kconfig/conf.o
  HOSTCC  scripts/kconfig/zconf.tab.o
  HOSTLD  scripts/kconfig/conf
#
# configuration written to .config
#

user]$ make
  .
  .
  .
  LDS spl/u-boot-spl.lds
  LD  spl/u-boot-spl
aarch64-linux-gnu-ld.bfd: u-boot-spl section `.rodata' will not fit in
region `.sram'
aarch64-linux-gnu-ld.bfd: region `.sram' overflowed by 6032 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

​*​*
-
*Akash Gajjar*
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[U-Boot] [PATCHv2 00/15] Updates / improvements to bx50v3 support

2018-01-10 Thread Sebastian Reichel
This series improves the support on the bx50v3 devices (b540v3, b650v3
and b850v3). Changes outside of the bx50v3 specific areas:

- Added driver for RX8010SJ RTC.
- Added functionality to e1000 driver to enable wrting of EEPROM/MAC
  address.

Changes since PATCHv1:
 * Rebased to v2018.01
 * Fixed compiler warning for qemu amd64 target

-- Sebastian

Hannu Lounento (5):
  net: e1000: add support for writing to EEPROM
  net: e1000: split e1000_read_mac_addr
  net: e1000: implement eth_write_hwaddr
  board: ge: bx50v3: program MAC address to I210
  board: ge: bx50v3: mount rootfs read-only

Ian Ray (5):
  configs: Add network device support for bx50v3 products
  board: ge: bx50v3: Support FIT and select configuration based on VPD
  config: ge_bx50v3: read boot script
  configs: ge_bx50v3: enable bootcount
  configs: ge_bx50v3: automatic partition selection and video output
failure message

Martyn Welch (3):
  board: ge: Enable access to i2c bus 1 and 2
  board: ge: bx50v3: move FEC MAC address programming to driver
  board: ge: bx50v3: Enable hardware watchdog

Nandor Han (2):
  rtc: adding RX8010SJ rtc driver
  board,ge,bx50v3 - rtc time validation

 board/ge/bx50v3/bx50v3.c| 130 ++-
 configs/ge_b450v3_defconfig |   7 +-
 configs/ge_b650v3_defconfig |   7 +-
 configs/ge_b850v3_defconfig |   8 +-
 drivers/net/e1000.c | 294 +++---
 drivers/net/e1000.h |   3 +
 drivers/rtc/Kconfig |   6 +
 drivers/rtc/Makefile|   1 +
 drivers/rtc/rx8010sj.c  | 378 
 include/configs/ge_bx50v3.h | 190 +-
 10 files changed, 849 insertions(+), 175 deletions(-)
 create mode 100644 drivers/rtc/rx8010sj.c

-- 
2.15.1

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[U-Boot] [PATCHv2 01/15] net: e1000: add support for writing to EEPROM

2018-01-10 Thread Sebastian Reichel
From: Hannu Lounento 

Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.

Functions were ported from Linux 4.8-rc2 (694d0d0bb20).

Signed-off-by: Hannu Lounento 
CC: Joe Hershberger 
Signed-off-by: Martyn Welch 
Reviewed-by: Stefano Babic 
Acked-by: Joe Hershberger 
Signed-off-by: Sebastian Reichel 
---
 drivers/net/e1000.c | 173 +++-
 drivers/net/e1000.h |   3 +
 2 files changed, 174 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 875682b1b89e..1d9f8f3ae2e4 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -150,6 +150,7 @@ static int32_t e1000_check_phy_reset_block(struct e1000_hw 
*hw);
 
 #ifndef CONFIG_E1000_NO_NVM
 static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
+static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
 static int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
uint16_t words,
uint16_t *data);
@@ -861,6 +862,174 @@ e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
return E1000_SUCCESS;
 }
 
+#ifndef CONFIG_DM_ETH
+/**
+ *  e1000_write_eeprom_srwr - Write to Shadow Ram using EEWR
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the Shadow Ram to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the Shadow Ram
+ *
+ *  Writes data to Shadow Ram at offset using EEWR register.
+ *
+ *  If e1000_update_eeprom_checksum_i210 is not called after this function, the
+ *  Shadow Ram will most likely contain an invalid checksum.
+ */
+static int32_t e1000_write_eeprom_srwr(struct e1000_hw *hw, uint16_t offset,
+  uint16_t words, uint16_t *data)
+{
+   struct e1000_eeprom_info *eeprom = &hw->eeprom;
+   uint32_t i, k, eewr = 0;
+   uint32_t attempts = 10;
+   int32_t ret_val = 0;
+
+   /* A check for invalid values:  offset too large, too many words,
+* too many words for the offset, and not enough words.
+*/
+   if ((offset >= eeprom->word_size) ||
+   (words > (eeprom->word_size - offset)) || (words == 0)) {
+   DEBUGOUT("nvm parameter(s) out of bounds\n");
+   ret_val = -E1000_ERR_EEPROM;
+   goto out;
+   }
+
+   for (i = 0; i < words; i++) {
+   eewr = ((offset + i) << E1000_EEPROM_RW_ADDR_SHIFT)
+   | (data[i] << E1000_EEPROM_RW_REG_DATA) |
+   E1000_EEPROM_RW_REG_START;
+
+   E1000_WRITE_REG(hw, I210_EEWR, eewr);
+
+   for (k = 0; k < attempts; k++) {
+   if (E1000_EEPROM_RW_REG_DONE &
+   E1000_READ_REG(hw, I210_EEWR)) {
+   ret_val = 0;
+   break;
+   }
+   udelay(5);
+   }
+
+   if (ret_val) {
+   DEBUGOUT("Shadow RAM write EEWR timed out\n");
+   break;
+   }
+   }
+
+out:
+   return ret_val;
+}
+
+/**
+ *  e1000_pool_flash_update_done_i210 - Pool FLUDONE status.
+ *  @hw: pointer to the HW structure
+ *
+ */
+static int32_t e1000_pool_flash_update_done_i210(struct e1000_hw *hw)
+{
+   int32_t ret_val = -E1000_ERR_EEPROM;
+   uint32_t i, reg;
+
+   for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
+   reg = E1000_READ_REG(hw, EECD);
+   if (reg & E1000_EECD_FLUDONE_I210) {
+   ret_val = 0;
+   break;
+   }
+   udelay(5);
+   }
+
+   return ret_val;
+}
+
+/**
+ *  e1000_update_flash_i210 - Commit EEPROM to the flash
+ *  @hw: pointer to the HW structure
+ *
+ */
+static int32_t e1000_update_flash_i210(struct e1000_hw *hw)
+{
+   int32_t ret_val = 0;
+   uint32_t flup;
+
+   ret_val = e1000_pool_flash_update_done_i210(hw);
+   if (ret_val == -E1000_ERR_EEPROM) {
+   DEBUGOUT("Flash update time out\n");
+   goto out;
+   }
+
+   flup = E1000_READ_REG(hw, EECD) | E1000_EECD_FLUPD_I210;
+   E1000_WRITE_REG(hw, EECD, flup);
+
+   ret_val = e1000_pool_flash_update_done_i210(hw);
+   if (ret_val)
+   DEBUGOUT("Flash update time out\n");
+   else
+   DEBUGOUT("Flash update complete\n");
+
+out:
+  

[U-Boot] [PATCHv2 02/15] net: e1000: split e1000_read_mac_addr

2018-01-10 Thread Sebastian Reichel
From: Hannu Lounento 

Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.

This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.

Signed-off-by: Hannu Lounento 
CC: Joe Hershberger 
Signed-off-by: Martyn Welch 
Signed-off-by: Sebastian Reichel 
---
 drivers/net/e1000.c | 81 +
 1 file changed, 63 insertions(+), 18 deletions(-)

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 1d9f8f3ae2e4..868616b488a7 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -1313,33 +1313,21 @@ static bool e1000_is_second_port(struct e1000_hw *hw)
 
 #ifndef CONFIG_E1000_NO_NVM
 /**
- * Reads the adapter's MAC address from the EEPROM and inverts the LSB for the
- * second function of dual function devices
+ * Reads the adapter's MAC address from the EEPROM
  *
- * nic - Struct containing variables accessed by shared code
+ * hw - Struct containing variables accessed by shared code
+ * enetaddr - buffering where the MAC address will be stored
  */
-static int
-e1000_read_mac_addr(struct e1000_hw *hw, unsigned char enetaddr[6])
+static int e1000_read_mac_addr_from_eeprom(struct e1000_hw *hw,
+  unsigned char enetaddr[6])
 {
uint16_t offset;
uint16_t eeprom_data;
-   uint32_t reg_data = 0;
int i;
 
-   DEBUGFUNC();
-
for (i = 0; i < NODE_ADDRESS_SIZE; i += 2) {
offset = i >> 1;
-   if (hw->mac_type == e1000_igb) {
-   /* i210 preloads MAC address into RAL/RAH registers */
-   if (offset == 0)
-   reg_data = E1000_READ_REG_ARRAY(hw, RA, 0);
-   else if (offset == 1)
-   reg_data >>= 16;
-   else if (offset == 2)
-   reg_data = E1000_READ_REG_ARRAY(hw, RA, 1);
-   eeprom_data = reg_data & 0x;
-   } else if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {
+   if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {
DEBUGOUT("EEPROM Read Error\n");
return -E1000_ERR_EEPROM;
}
@@ -1347,6 +1335,63 @@ e1000_read_mac_addr(struct e1000_hw *hw, unsigned char 
enetaddr[6])
enetaddr[i + 1] = (eeprom_data >> 8) & 0xff;
}
 
+   return 0;
+}
+
+/**
+ * Reads the adapter's MAC address from the RAL/RAH registers
+ *
+ * hw - Struct containing variables accessed by shared code
+ * enetaddr - buffering where the MAC address will be stored
+ */
+static int e1000_read_mac_addr_from_regs(struct e1000_hw *hw,
+unsigned char enetaddr[6])
+{
+   uint16_t offset, tmp;
+   uint32_t reg_data = 0;
+   int i;
+
+   if (hw->mac_type != e1000_igb)
+   return -E1000_ERR_MAC_TYPE;
+
+   for (i = 0; i < NODE_ADDRESS_SIZE; i += 2) {
+   offset = i >> 1;
+
+   if (offset == 0)
+   reg_data = E1000_READ_REG_ARRAY(hw, RA, 0);
+   else if (offset == 1)
+   reg_data >>= 16;
+   else if (offset == 2)
+   reg_data = E1000_READ_REG_ARRAY(hw, RA, 1);
+   tmp = reg_data & 0x;
+
+   enetaddr[i] = tmp & 0xff;
+   enetaddr[i + 1] = (tmp >> 8) & 0xff;
+   }
+
+   return 0;
+}
+
+/**
+ * Reads the adapter's MAC address from the EEPROM and inverts the LSB for the
+ * second function of dual function devices
+ *
+ * hw - Struct containing variables accessed by shared code
+ * enetaddr - buffering where the MAC address will be stored
+ */
+static int e1000_read_mac_addr(struct e1000_hw *hw, unsigned char enetaddr[6])
+{
+   int ret_val;
+
+   if (hw->mac_type == e1000_igb) {
+   /* i210 preloads MAC address into RAL/RAH registers */
+   ret_val = e1000_read_mac_addr_from_regs(hw, enetaddr);
+   } else {
+   ret_val = e1000_read_mac_addr_from_eeprom(hw, enetaddr);
+   }
+   if (ret_val)
+   return ret_val;
+
/* Invert the last bit if this is the second device */
if (e1000_is_second_port(hw))
 

[U-Boot] [PATCHv2 03/15] net: e1000: implement eth_write_hwaddr

2018-01-10 Thread Sebastian Reichel
From: Hannu Lounento 

Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.

MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.

Signed-off-by: Hannu Lounento 
CC: Joe Hershberger 
Signed-off-by: Martyn Welch 
Signed-off-by: Sebastian Reichel 
---
 drivers/net/e1000.c | 40 
 1 file changed, 40 insertions(+)

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 868616b488a7..8316854bc177 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -5649,6 +5649,45 @@ e1000_poll(struct eth_device *nic)
return len ? 1 : 0;
 }
 
+static int e1000_write_hwaddr(struct eth_device *dev)
+{
+#ifndef CONFIG_E1000_NO_NVM
+   unsigned char *mac = dev->enetaddr;
+   unsigned char current_mac[6];
+   struct e1000_hw *hw = dev->priv;
+   uint16_t data[3];
+   int ret_val, i;
+
+   DEBUGOUT("%s: mac=%pM\n", __func__, mac);
+
+   memset(current_mac, 0, 6);
+
+   /* Read from EEPROM, not from registers, to make sure
+* the address is persistently configured
+*/
+   ret_val = e1000_read_mac_addr_from_eeprom(hw, current_mac);
+   DEBUGOUT("%s: current mac=%pM\n", __func__, current_mac);
+
+   /* Only write to EEPROM if the given address is different or
+* reading the current address failed
+*/
+   if (!ret_val && memcmp(current_mac, mac, 6) == 0)
+   return 0;
+
+   for (i = 0; i < 3; ++i)
+   data[i] = mac[i * 2 + 1] << 8 | mac[i * 2];
+
+   ret_val = e1000_write_eeprom_srwr(hw, 0x0, 3, data);
+
+   if (!ret_val)
+   ret_val = e1000_update_eeprom_checksum_i210(hw);
+
+   return ret_val;
+#else
+   return 0;
+#endif
+}
+
 /**
 PROBE - Look for an adapter, this routine's visible to the outside
 You should omit the last argument struct pci_device * for a non-PCI NIC
@@ -5698,6 +5737,7 @@ e1000_initialize(bd_t * bis)
nic->recv = e1000_poll;
nic->send = e1000_transmit;
nic->halt = e1000_disable;
+   nic->write_hwaddr = e1000_write_hwaddr;
eth_register(nic);
}
 
-- 
2.15.1

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[U-Boot] [PATCHv2 04/15] rtc: adding RX8010SJ rtc driver

2018-01-10 Thread Sebastian Reichel
From: Nandor Han 

Add a new driver for RX8010SJ rtc chip. The driver implements both
formats of U-Boot driver model.

Signed-off-by: Nandor Han 
Signed-off-by: Martyn Welch 
Signed-off-by: Sebastian Reichel 
---
 drivers/rtc/Kconfig|   6 +
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rx8010sj.c | 378 +
 3 files changed, 385 insertions(+)
 create mode 100644 drivers/rtc/rx8010sj.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 2964bb221106..95ac0312439d 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -30,6 +30,12 @@ config RTC_DS1307
  Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and
  compatible Real Time Clock devices.
 
+config RTC_RX8010SJ
+   bool "Enable RX8010SJ driver"
+   depends on DM_RTC
+   help
+ Support for Epson RX8010SJ Real Time Clock devices.
+
 config RTC_S35392A
bool "Enable S35392A driver"
select BITREVERSE
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 7a8f97a05fe1..9723fb774c57 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
 obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
 obj-$(CONFIG_RTC_RV3029) += rv3029.o
 obj-$(CONFIG_RTC_RX8025) += rx8025.o
+obj-$(CONFIG_RTC_RX8010SJ) += rx8010sj.o
 obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
 obj-$(CONFIG_RTC_S35392A) += s35392a.o
 obj-$(CONFIG_SANDBOX) += sandbox_rtc.o
diff --git a/drivers/rtc/rx8010sj.c b/drivers/rtc/rx8010sj.c
new file mode 100644
index ..81560e16cef1
--- /dev/null
+++ b/drivers/rtc/rx8010sj.c
@@ -0,0 +1,378 @@
+/*
+ * Epson RX8010 RTC driver.
+ *
+ * Copyright (c) 2017, General Electric Company
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*-*/
+/* #undef DEBUG_RTC */
+
+#ifdef DEBUG_RTC
+#define DEBUGR(fmt, args...) printf(fmt, ##args)
+#else
+#define DEBUGR(fmt, args...)
+#endif
+/*-*/
+
+#ifndef CONFIG_SYS_I2C_RTC_ADDR
+# define CONFIG_SYS_I2C_RTC_ADDR   0x32
+#endif
+
+/*
+ * RTC register addresses
+ */
+#define RX8010_SEC 0x10
+#define RX8010_MIN 0x11
+#define RX8010_HOUR0x12
+#define RX8010_WDAY0x13
+#define RX8010_MDAY0x14
+#define RX8010_MONTH   0x15
+#define RX8010_YEAR0x16
+#define RX8010_YEAR0x16
+#define RX8010_RESV17  0x17
+#define RX8010_ALMIN   0x18
+#define RX8010_ALHOUR  0x19
+#define RX8010_ALWDAY  0x1A
+#define RX8010_TCOUNT0 0x1B
+#define RX8010_TCOUNT1 0x1C
+#define RX8010_EXT 0x1D
+#define RX8010_FLAG0x1E
+#define RX8010_CTRL0x1F
+/* 0x20 to 0x2F are user registers */
+#define RX8010_RESV30  0x30
+#define RX8010_RESV31  0x32
+#define RX8010_IRQ 0x32
+
+#define RX8010_EXT_WADA  BIT(3)
+
+#define RX8010_FLAG_VLF  BIT(1)
+#define RX8010_FLAG_AF   BIT(3)
+#define RX8010_FLAG_TF   BIT(4)
+#define RX8010_FLAG_UF   BIT(5)
+
+#define RX8010_CTRL_AIE  BIT(3)
+#define RX8010_CTRL_UIE  BIT(5)
+#define RX8010_CTRL_STOP BIT(6)
+#define RX8010_CTRL_TEST BIT(7)
+
+#define RX8010_ALARM_AE  BIT(7)
+
+#ifdef CONFIG_DM_RTC
+
+#define DEV_TYPE struct udevice
+
+#else
+
+/* Local udevice */
+struct ludevice {
+   u8 chip;
+};
+
+#define DEV_TYPE struct ludevice
+
+#endif
+
+static int rx8010sj_rtc_read8(DEV_TYPE *dev, unsigned int reg)
+{
+   u8 val;
+   int ret;
+
+#ifdef CONFIG_DM_RTC
+   ret = dm_i2c_read(dev, reg, &val, sizeof(val));
+#else
+   ret = i2c_read(dev->chip, reg, 1, &val, 1);
+#endif
+
+   return ret < 0 ? ret : val;
+}
+
+static int rx8010sj_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val)
+{
+   int ret;
+   u8 lval = val;
+
+#ifdef CONFIG_DM_RTC
+   ret = dm_i2c_write(dev, reg, &lval, 1);
+#else
+   ret = i2c_write(dev->chip, reg, 1, &lval, 1);
+#endif
+
+   return ret < 0 ? ret : 0;
+}
+
+static int validate_time(const struct rtc_time *tm)
+{
+   if ((tm->tm_year < 2000) || (tm->tm_year > 2099))
+   return -EINVAL;
+
+   if ((tm->tm_mon < 1) || (tm->tm_mon > 12))
+   return -EINVAL;
+
+   if ((tm->tm_mday < 1) || (tm->tm_mday > 31))
+   return -EINVAL;
+
+   if ((tm->tm_wday < 0) || (tm->tm_wday > 6))
+   return -EINVAL;
+
+   if ((tm->tm_hour < 0) || 

[U-Boot] [PATCHv2 10/15] board: ge: bx50v3: Support FIT and select configuration based on VPD

2018-01-10 Thread Sebastian Reichel
From: Ian Ray 

Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.

Signed-off-by: Ian Ray 
Signed-off-by: Martyn Welch 
Signed-off-by: Sebastian Reichel 
---
 board/ge/bx50v3/bx50v3.c| 12 +++
 configs/ge_b450v3_defconfig |  1 +
 configs/ge_b650v3_defconfig |  1 +
 configs/ge_b850v3_defconfig |  1 +
 include/configs/ge_bx50v3.h | 88 +++--
 5 files changed, 20 insertions(+), 83 deletions(-)

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 48c26e0f9fa5..e35afa0317a8 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -590,6 +590,18 @@ static void process_vpd(struct vpd_cache *vpd)
int fec_index = -1;
int i210_index = -1;
 
+   switch (vpd->product_id) {
+   case VPD_PRODUCT_B450:
+   env_set("confidx", "1");
+   break;
+   case VPD_PRODUCT_B650:
+   env_set("confidx", "2");
+   break;
+   case VPD_PRODUCT_B850:
+   env_set("confidx", "3");
+   break;
+   }
+
switch (vpd->product_id) {
case VPD_PRODUCT_B450:
/* fall thru */
diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig
index f95c3cdc7957..76cc4070e04d 100644
--- a/configs/ge_b450v3_defconfig
+++ b/configs/ge_b450v3_defconfig
@@ -32,3 +32,4 @@ CONFIG_CMD_NET=y
 CONFIG_CMD_PCI=y
 CONFIG_E1000=y
 CONFIG_CMD_E1000=y
+CONFIG_FIT=y
diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig
index 3af063023430..e82abe21eb14 100644
--- a/configs/ge_b650v3_defconfig
+++ b/configs/ge_b650v3_defconfig
@@ -32,3 +32,4 @@ CONFIG_CMD_NET=y
 CONFIG_CMD_PCI=y
 CONFIG_E1000=y
 CONFIG_CMD_E1000=y
+CONFIG_FIT=y
diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig
index 5f008eac750c..4f9d77cc4fe4 100644
--- a/configs/ge_b850v3_defconfig
+++ b/configs/ge_b850v3_defconfig
@@ -32,3 +32,4 @@ CONFIG_CMD_NET=y
 CONFIG_CMD_PCI=y
 CONFIG_E1000=y
 CONFIG_CMD_E1000=y
+CONFIG_FIT=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index cc067ccee657..1c1b82a77734 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -110,95 +110,24 @@
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
-   "image=/boot/uImage\0" \
-   "uboot=u-boot.imx\0" \
-   "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
-   "fdt_addr=0x1800\0" \
-   "boot_fdt=yes\0" \
-   "ip_dyn=yes\0" \
+   "image=/boot/fitImage\0" \
"console=" CONSOLE_DEV "\0" \
"fdt_high=0x\0"   \
-   "initrd_high=0x\0" \
"sddev=0\0" \
"emmcdev=1\0" \
"partnum=1\0" \
-   "update_sd_firmware=" \
-   "if test ${ip_dyn} = yes; then " \
-   "setenv get_cmd dhcp; " \
-   "else " \
-   "setenv get_cmd tftp; " \
-   "fi; " \
-   "if mmc dev ${mmcdev}; then "   \
-   "if ${get_cmd} ${update_sd_firmware_filename}; then " \
-   "setexpr fw_sz ${filesize} / 0x200; " \
-   "setexpr fw_sz ${fw_sz} + 1; "  \
-   "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
-   "fi; "  \
-   "fi\0" \
-   "update_sf_uboot=" \
-   "if tftp $loadaddr $uboot; then " \
-   "sf probe; " \
-   "sf erase 0 0xC; " \
-   "sf write $loadaddr 0x400 $filesize; " \
-   "echo 'U-Boot upgraded. Please reset'; " \
-   "fi\0" \
"setargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/${rootdev} rw rootwait cma=128M " \
BX50V3_BOOTARGS_EXTRA "\0" \
-   "loadbootscript=" \
-   "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" 
\
-   "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
-   " source\0" \
"loadimage=" \
"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
-   "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} 
${fdt_file}\0" \
"tryboot=" \
-   "if run loadbootscript; then " \
-   "run bootscript; " \
-   "else " \
-   "if run loadimage; then " \
-   "run doboot; " \
-   "fi; " \
+   "if run loadimage; then " \
+   "run doboot; " \
"fi;\0" \
"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
"run setargs; " \
-   "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
-   "if run loadfdt; then " \
-

[U-Boot] [PATCHv2 06/15] configs: Add network device support for bx50v3 products

2018-01-10 Thread Sebastian Reichel
From: Ian Ray 

Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.

Signed-off-by: Ian Ray 
Signed-off-by: Martyn Welch 
Signed-off-by: Sebastian Reichel 
---
 configs/ge_b450v3_defconfig | 6 +-
 configs/ge_b650v3_defconfig | 6 +-
 configs/ge_b850v3_defconfig | 6 +-
 include/configs/ge_bx50v3.h | 4 ++--
 4 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig
index 43a6c12708f0..f95c3cdc7957 100644
--- a/configs/ge_b450v3_defconfig
+++ b/configs/ge_b450v3_defconfig
@@ -15,7 +15,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
@@ -28,3 +27,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_NETDEVICES=y
+CONFIG_CMD_NET=y
+CONFIG_CMD_PCI=y
+CONFIG_E1000=y
+CONFIG_CMD_E1000=y
diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig
index 4e22e9579a1a..3af063023430 100644
--- a/configs/ge_b650v3_defconfig
+++ b/configs/ge_b650v3_defconfig
@@ -15,7 +15,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
@@ -28,3 +27,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_NETDEVICES=y
+CONFIG_CMD_NET=y
+CONFIG_CMD_PCI=y
+CONFIG_E1000=y
+CONFIG_CMD_E1000=y
diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig
index cb5899dc3a75..5f008eac750c 100644
--- a/configs/ge_b850v3_defconfig
+++ b/configs/ge_b850v3_defconfig
@@ -15,7 +15,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
@@ -28,3 +27,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_NETDEVICES=y
+CONFIG_CMD_NET=y
+CONFIG_CMD_PCI=y
+CONFIG_E1000=y
+CONFIG_CMD_E1000=y
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index a1c624fd2151..6498c6c74de3 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -282,12 +282,12 @@
 #define CONFIG_PWM_IMX
 #define CONFIG_IMX6_PWM_PER_CLK6600
 
-#ifdef CONFIG_CMD_PCI
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_PCIE_IMX
 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
-#endif
 
 /* I2C Configs */
 #define CONFIG_SYS_I2C
-- 
2.15.1

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[U-Boot] [PATCHv2 11/15] config: ge_bx50v3: read boot script

2018-01-10 Thread Sebastian Reichel
From: Ian Ray 

Read boot script from shared partition, if available.

Signed-off-by: Ian Ray 
Signed-off-by: Martyn Welch 
Signed-off-by: Sebastian Reichel 
---
 include/configs/ge_bx50v3.h | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 1c1b82a77734..b9c73eb8 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -131,15 +131,15 @@
 
 #define CONFIG_MMCBOOTCOMMAND \
"setenv dev mmc; " \
-   "setenv rootdev mmcblk0p${partnum}; " \
+   "setenv devnum ${emmcdev}; " \
\
-   "setenv devnum ${sddev}; " \
-   "if mmc dev ${devnum}; then " \
-   "run tryboot; " \
-   "setenv rootdev mmcblk1p${partnum}; " \
+   "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/active/boot.img ; " \
+   "then " \
+   "source 0x7000A000; " \
"fi; " \
\
-   "setenv devnum ${emmcdev}; " \
+   "setenv rootdev mmcblk0p${partnum}; " \
+   \
"if mmc dev ${devnum}; then " \
"run tryboot; " \
"fi; " \
-- 
2.15.1

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