Re: [U-Boot] [PATCH 3/9 v3] mmc: Add Marvell Xenon SDHCI controller driver
Hi Stefan. On 01/24/2017 04:43 PM, Stefan Roese wrote: > Hi Jaehoon, > > On 24.01.2017 07:19, Jaehoon Chung wrote: >> On 01/23/2017 07:52 PM, Stefan Roese wrote: >>> This driver implementes platform specific code for the Xenon SDHCI >>> controller which is integrated in the Marvell MVEBU Armada 37xx and >>> Armada 7k / 8K SoCs. >>> >>> History: >>> This driver is ported from the Marvell U-Boot version 2015.01 which is >>> written by Victor Gu with minor changes ported from >>> the Linux driver which is written by Ziji Hu . >>> >>> Signed-off-by: Stefan Roese >>> Cc: Jaehoon Chung >>> Cc: Masahiro Yamada >> >> Reviewed-by: Jaehoon Chung > > Thanks. Will you pull the 3 patches (1/9 ... 3/9) via your mmc > repository? Or are you okay with me pushing them via the > Marvell repository? I'm ok about pushing on Marvell repository. :) Thanks! Best Regards, Jaehoon Chung > > Thanks, > Stefan > > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Falcon boot breaks on DRA7 because of commit b9c8ccab "env_mmc.c: Allow environment to be used within SPL"
Hi Tom, I'm using a TI DRA7 platform and the falcon boot from MMC is broken with v2017. The reason is that the standard "boot_os" is used to tell whether the falcon mode should be used or not, but we can't access it. The root cause is that the environment is stored in a eMMC which is dev 1 not dev 0 on those platforms. What is the purpose of commit b9c8ccab. Is it because we want to initialize only one MMC device in the SPL to reduce the boot time ? Jean-Jacques ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Please pull u-boot-mmc master
Dear Tom, Could you pull these patches on your master branch? The following changes since commit 0c9e85f67cd86d2d7a3424ea3ebff0e6db7a3915: Merge branch 'master' of git://git.denx.de/u-boot-uniphier (2017-01-22 17:07:48 -0500) are available in the git repository at: http://git.denx.de/u-boot-mmc.git master for you to fetch changes up to 919b485834a746cf839ccded41e456d17d57a31f: mmc: Print error code for mmc_complete_init failure (2017-01-23 15:37:42 +0900) Jagan Teki (1): mmc: Print error code for mmc_complete_init failure Stefan Herbrechtsmeier (1): mmc: sdhci: Distinguish between base clock and maximum peripheral frequency drivers/mmc/atmel_sdhci.c| 7 +-- drivers/mmc/bcm2835_sdhci.c | 3 ++- drivers/mmc/ftsdc021_sdhci.c | 3 ++- drivers/mmc/kona_sdhci.c | 3 ++- drivers/mmc/mmc.c| 4 +++- drivers/mmc/msm_sdhci.c | 2 ++ drivers/mmc/mv_sdhci.c | 3 ++- drivers/mmc/pci_mmc.c| 1 + drivers/mmc/pic32_sdhci.c| 4 +++- drivers/mmc/rockchip_sdhci.c | 4 ++-- drivers/mmc/s5p_sdhci.c | 5 +++-- drivers/mmc/sdhci.c | 34 ++ drivers/mmc/zynq_sdhci.c | 4 +++- include/sdhci.h | 13 +++-- 14 files changed, 55 insertions(+), 35 deletions(-) Best Regards, Jaehoon Chung ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5][v5] arch: powerpc: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. So update IFC IP clock to be defined as per predefined clock divisor of platform clock. Signed-off-by: Prabhakar Kushwaha --- Changes for v2: Split the patch in 2 patch set Changes for v3: Rebased on top of u-boot commit Changes for v4: fix compilation error Changes for v5: Adding FSL_IFC as dependency README | 3 +++ arch/powerpc/cpu/mpc85xx/Kconfig | 16 arch/powerpc/cpu/mpc85xx/speed.c | 10 ++ 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/README b/README index a95348a..9fda381 100644 --- a/README +++ b/README @@ -504,6 +504,9 @@ The following options need to be configured: CONFIG_SYS_FSL_IFC_LE Defines the IFC controller register space as Little Endian + CONFIG_SYS_FSL_IFC_CLK_DIV + Defines divider of platform clock(clock input to IFC controller). + CONFIG_SYS_FSL_PBL_PBI It enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c67b6b0..8c6503d 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1265,6 +1265,22 @@ config SYS_PPC_E500_DEBUG_TLB symbol should be set to the TLB1 entry to be used for this purpose. If unsure, do not change. +config SYS_FSL_IFC_CLK_DIV + int "Divider of platform clock" + depends on FSL_IFC + default 2 ifARCH_B4420 || \ + ARCH_B4860 || \ + ARCH_T1024 || \ + ARCH_T1023 || \ + ARCH_T1040 || \ + ARCH_T1042 || \ + ARCH_T4160 || \ + ARCH_T4240 + default 1 + help + Defines divider of platform clock(clock input to + IFC controller). + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index fcf5d92..adba092 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -27,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(sys_info_t *sys_info) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif #ifdef CONFIG_FSL_CORENET volatile ccsr_clk_t *clk = (void *)(CONFIG_SYS_FSL_CORENET_CLK_ADDR); unsigned int cpu; @@ -640,10 +636,8 @@ void get_sys_info(sys_info_t *sys_info) #endif #if defined(CONFIG_FSL_IFC) - ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_IFC_CLK_DIV; #endif } -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/5][v5] arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Enable ELBC from Kconfig. Signed-off-by: Prabhakar Kushwaha --- arch/powerpc/cpu/mpc85xx/Kconfig| 26 ++ include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8569MDS.h| 2 -- include/configs/MPC8572DS.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P1023RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/UCP1020.h | 1 - include/configs/controlcenterd.h| 1 - include/configs/corenet_ds.h| 1 - include/configs/cyrus.h | 1 - include/configs/ids8313.h | 2 -- include/configs/km/kmp204x-common.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h| 1 - include/configs/ve8313.h| 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - 22 files changed, 26 insertions(+), 23 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 8c6503d..765d328 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -429,11 +429,13 @@ config ARCH_MPC8536 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8540 bool select FSL_LAW select SYS_FSL_HAS_DDR1 + select FSL_ELBC config ARCH_MPC8541 bool @@ -442,6 +444,7 @@ config ARCH_MPC8541 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8544 bool @@ -452,6 +455,7 @@ config ARCH_MPC8544 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8548 bool @@ -467,6 +471,7 @@ config ARCH_MPC8548 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8555 bool @@ -475,11 +480,13 @@ config ARCH_MPC8555 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8560 bool select FSL_LAW select SYS_FSL_HAS_DDR1 + select FSL_ELBC config ARCH_MPC8568 bool @@ -488,6 +495,7 @@ config ARCH_MPC8568 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8569 bool @@ -498,6 +506,7 @@ config ARCH_MPC8569 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8572 bool @@ -512,6 +521,7 @@ config ARCH_MPC8572 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1010 bool @@ -546,6 +556,7 @@ config ARCH_P1011 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1020 bool @@ -559,6 +570,7 @@ config ARCH_P1020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1021 bool @@ -572,6 +584,7 @@ config ARCH_P1021 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1022 bool @@ -587,6 +600,7 @@ config ARCH_P1022 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1023 bool @@ -598,6 +612,7 @@ config ARCH_P1023 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P1024 bool @@ -611,6 +626,7 @@ config ARCH_P1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1025 bool @@ -624,6 +640,7 @@ config ARCH_P1025 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2020 bool @@ -638,6 +655,7 @@ config ARCH_P2020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2041 bool @@ -659,6 +677,7 @@ config ARCH_P2041 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P3041 bool @@ -682,6 +701,7 @@ co
[U-Boot] [PATCH 5/5][v5] arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock ratio register (LCRR) used in current implementation governs eLBC IP output clock. So update eLBC IP clock to be defined as per predefined clock divisor of platform clock. Signed-off-by: Prabhakar Kushwaha --- README | 3 +++ arch/powerpc/cpu/mpc85xx/Kconfig | 14 ++ arch/powerpc/cpu/mpc85xx/speed.c | 28 ++-- arch/powerpc/cpu/mpc86xx/speed.c | 14 +- 4 files changed, 20 insertions(+), 39 deletions(-) diff --git a/README b/README index 9fda381..b27e757 100644 --- a/README +++ b/README @@ -507,6 +507,9 @@ The following options need to be configured: CONFIG_SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). + CONFIG_SYS_FSL_LBC_CLK_DIV + Defines divider of platform clock(clock input to eLBC controller). + CONFIG_SYS_FSL_PBL_PBI It enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 765d328..7442495 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1307,6 +1307,20 @@ config SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). +config SYS_FSL_LBC_CLK_DIV + int "Divider of platform clock" + depends on FSL_ELBC + default 2 ifARCH_P2041 || \ + ARCH_P3041 || \ + ARCH_P4080 || \ + ARCH_P5020 || \ + ARCH_P5040 + default 1 + + help + Defines divider of platform clock(clock input to + eLBC controller). + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index adba092..cb8281e 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -607,32 +607,8 @@ void get_sys_info(sys_info_t *sys_info) #endif /* CONFIG_FSL_CORENET */ #if defined(CONFIG_FSL_LBC) - uint lcrr_div; -#if defined(CONFIG_SYS_LBC_LCRR) - /* We will program LCRR to this value later */ - lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; -#else - lcrr_div = in_be32(&(LBC_BASE_ADDR)->lcrr) & LCRR_CLKDIV; -#endif - if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { -#if defined(CONFIG_FSL_CORENET) - /* If this is corenet based SoC, bit-representation -* for four times the clock divider values. -*/ - lcrr_div *= 4; -#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \ - !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560) - /* -* Yes, the entire PQ38 family use the same -* bit-representation for twice the clock divider values. -*/ - lcrr_div *= 2; -#endif - sys_info->freq_localbus = sys_info->freq_systembus / lcrr_div; - } else { - /* In case anyone cares what the unknown value is */ - sys_info->freq_localbus = lcrr_div; - } + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_LBC_CLK_DIV; #endif #if defined(CONFIG_FSL_IFC) diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c index 05f23db..b9e2100 100644 --- a/arch/powerpc/cpu/mpc86xx/speed.c +++ b/arch/powerpc/cpu/mpc86xx/speed.c @@ -78,19 +78,7 @@ void get_sys_info(sys_info_t *sys_info) break; } -#if defined(CONFIG_SYS_LBC_LCRR) - /* We will program LCRR to this value later */ - lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; -#else - lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV; -#endif - if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { - sys_info->freq_localbus = sys_info->freq_systembus - / (lcrr_div * 2); - } else { - /* In case anyone cares what the unknown value is */ - sys_info->freq_localbus = lcrr_div; - } + sys_info->freq_localbus = sys_info->freq_systembus; } -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/5] IFC/ELBC: Update IP input clock
IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register used in current implementation governs IP output clock. So update IP clock to be defined as per predefined clock divisor of platform clock Prabhakar Kushwaha (5): arch: powerpc: Move CONFIG_FSL_IFC to Kconfig arch: powerpc: update the IFC IP input clock arch: arm: update the IFC IP input clock arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig arch: powerpc: update the eLBC IP input clock README | 6 ++ arch/arm/cpu/armv7/ls102xa/clock.c | 9 +-- .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 +-- .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 10 +-- arch/powerpc/cpu/mpc85xx/Kconfig | 73 ++ arch/powerpc/cpu/mpc85xx/speed.c | 38 ++- arch/powerpc/cpu/mpc86xx/speed.c | 14 + include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 1 - include/configs/MPC837XEMDS.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8536DS.h| 1 - include/configs/MPC8569MDS.h | 2 - include/configs/MPC8572DS.h| 1 - include/configs/P1010RDB.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P1023RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/UCP1020.h | 1 - include/configs/controlcenterd.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/cyrus.h| 1 - include/configs/ids8313.h | 2 - include/configs/km/kmp204x-common.h| 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h | 1 - include/configs/t4qds.h| 1 - include/configs/ve8313.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - 41 files changed, 89 insertions(+), 107 deletions(-) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/5] arch: arm: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. So update IFC IP clock to be defined as per predefined clock divisor of platform clock. Signed-off-by: Prabhakar Kushwaha --- Changes for v2: Split the patch in 2 patch set Changes for v3: Rebased on top of u-boot commit Changes for v4: Sending as it is Changes for v5: Sending as it is arch/arm/cpu/armv7/ls102xa/clock.c | 9 + arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 ++ arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 10 ++ 3 files changed, 5 insertions(+), 24 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index 7a337e1..b7d61ad 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -19,10 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR); unsigned int cpu; const u8 core_cplx_pll[6] = { @@ -74,10 +70,7 @@ void get_sys_info(struct sys_info *sys_info) } #if defined(CONFIG_FSL_IFC) - ccr = in_be32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus; #endif } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 3da7037..2d7775e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -22,10 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif #if (defined(CONFIG_FSL_ESDHC) &&\ defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)) ||\ defined(CONFIG_SYS_DPAA_FMAN) @@ -156,10 +152,8 @@ void get_sys_info(struct sys_info *sys_info) #endif #if defined(CONFIG_FSL_IFC) - ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_IFC_CLK_DIV; #endif } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index f8fefc7..ab46431 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -26,10 +26,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif struct ccsr_clk_cluster_group __iomem *clk_grp[2] = { (void *)(CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR), (void *)(CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR) @@ -128,10 +124,8 @@ void get_sys_info(struct sys_info *sys_info) } #if defined(CONFIG_FSL_IFC) - ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_IFC_CLK_DIV; #endif } -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5][v5] arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig. Signed-off-by: Prabhakar Kushwaha --- Changes for v5: Added first time arch/powerpc/cpu/mpc85xx/Kconfig | 17 + include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/t4qds.h | 1 - 14 files changed, 17 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 704f65b..c67b6b0 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -349,6 +349,7 @@ config ARCH_B4420 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_B4860 bool @@ -372,6 +373,7 @@ config ARCH_B4860 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_BSC9131 bool @@ -384,6 +386,7 @@ config ARCH_BSC9131 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_IFC config ARCH_BSC9132 bool @@ -400,6 +403,7 @@ config ARCH_BSC9132 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_C29X bool @@ -412,6 +416,7 @@ config ARCH_C29X select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_MPC8536 bool @@ -527,6 +532,7 @@ config ARCH_P1010 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_P1011 bool @@ -769,6 +775,7 @@ config ARCH_T1023 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1024 bool @@ -785,6 +792,7 @@ config ARCH_T1024 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1040 bool @@ -802,6 +810,7 @@ config ARCH_T1040 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1042 bool @@ -819,6 +828,7 @@ config ARCH_T1042 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T2080 bool @@ -838,6 +848,7 @@ config ARCH_T2080 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T2081 bool @@ -857,6 +868,7 @@ config ARCH_T2081 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T4160 bool @@ -877,6 +889,7 @@ config ARCH_T4160 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T4240 bool @@ -898,6 +911,7 @@ config ARCH_T4240 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config BOOKE bool @@ -1224,6 +1238,9 @@ config SYS_PPC64 config SYS_PPC_E500_USE_DEBUG_TLB bool +config FSL_IFC + bool + config SYS_PPC_E500_DEBUG_TLB int "Temporary TLB entry for external debugger" depends on SYS_PPC_E500_USE_DEBUG_TLB diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 3ad9f80..4267d81 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -63,7 +63,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM/* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT/* Use common FSL init code */ diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index a6f73f2..1fe22b6 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -46,7 +46,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM/* Enable SEC/CAAM */ #define CONFIG_TSEC_ENET diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 8aec315..ef84ee7 100644 --
Re: [U-Boot] [PATCH] mpc5200: Correct return value of memcpy function
On Tue, 24 Jan 2017 13:47:31 +0100 thomas.grazia...@omicronenergy.com thomas.grazia...@omicronenergy.com wrote: > From: Mark Marshall > > The memcpy() function returns a pointer to trg. > > Signed-off-by: Mark Marshall > Reviewed-by: Thomas Graziadei Reviewed-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mpc5200: Correct return value of memcpy function
From: Mark Marshall The memcpy() function returns a pointer to trg. Signed-off-by: Mark Marshall Reviewed-by: Thomas Graziadei --- arch/powerpc/lib/memcpy_mpc5200.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/lib/memcpy_mpc5200.c b/arch/powerpc/lib/memcpy_mpc5200.c index 75a3ef9..7e5a005 100644 --- a/arch/powerpc/lib/memcpy_mpc5200.c +++ b/arch/powerpc/lib/memcpy_mpc5200.c @@ -31,7 +31,7 @@ void *memcpy(void *trg, const void *src, size_t len) extern void* __memcpy(void *, const void *, size_t); char *s = (char *)src; char *t = (char *)trg; - void *dest = (void *)src; + void *dest = (void *)trg; /* * Check is source address is in flash: -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mpc5200: Correct return value of memcpy function
From: Mark Marshall The memcpy() function returns a pointer to trg. Signed-off-by: Mark Marshall Reviewed-by: Thomas Graziadei --- arch/powerpc/lib/memcpy_mpc5200.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/lib/memcpy_mpc5200.c b/arch/powerpc/lib/memcpy_mpc5200.c index 75a3ef9..7e5a005 100644 --- a/arch/powerpc/lib/memcpy_mpc5200.c +++ b/arch/powerpc/lib/memcpy_mpc5200.c @@ -31,7 +31,7 @@ void *memcpy(void *trg, const void *src, size_t len) extern void* __memcpy(void *, const void *, size_t); char *s = (char *)src; char *t = (char *)trg; - void *dest = (void *)src; + void *dest = (void *)trg; /* * Check is source address is in flash: -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] rk3399: enable SPL driver
Hi Kever, On 18 January 2017 at 05:16, Kever Yang wrote: > This series patch enable basic driver for rk3399 SPL, the ATF support > has been split as a separate patch. > > SPL_OF_PLATDATA is consider to be must because the dram driver has much > configuration parameter from dts, but we don't want to do the copy. > > Other driver like clock, pinctrl, sdhci has update to support > OF-PLATDATA. > > > > Kever Yang (6): > arm64: rk3399: add ddr controller driver > arm64: rk3399: move grf register definitions to grf_rk3399.h > clk: rk3399: update driver for spl > sdhci: rk3399: update driver to support of-platdata > pinctrl: rk3399: add the of-platdata support > arm64: rk3399: add SPL support What is the limit in SPL size on rk3399? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
Hi Marek, (adding Marek as USB custodian to Cc) On 08.01.2017 15:52, kos...@marvell.com wrote: From: Konstantin Porotchkin Add support for "marvell,vbus-gpio" property to mvebu XHCI host adapter driver. This option is valid when CONFIG_DM_GPIO=y Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 Signed-off-by: Konstantin Porotchkin Cc: Stefan Roese Cc: Nadav Haklai Cc: Neta Zur Hershkovits Cc: Omri Itach Cc: Igal Liberman Cc: Haim Boot Cc: Hanna Hawa --- Changes for v2: - Move VBUS GPIO support from board-specific function to mvebu XHCI driver - Increase delay after VBUS GPIO activation doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++ drivers/usb/host/xhci-mvebu.c | 14 +++ 2 files changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt new file mode 100644 index 000..b0a53ad --- /dev/null +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt @@ -0,0 +1,29 @@ +Marvell SOC USB controllers + +This controller is integrated in Armada 3700/8K. +It uses the same properties as a generic XHCI host controller + +Required properties : + - compatible: should be one or more of: + - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs + - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs + - reg: should contain address and length of the standard XHCI +register set for the device. + - interrupts: one XHCI interrupt should be described here. + +Optional properties: + - clocks: reference to a clock + - marvell,vbus-gpio : If present, specifies a gpio that needs to be + activated for the bus to be powered. + +Example: + cpm_usb3_0: usb3@50 { + compatible = "marvell,armada-8k-xhci", +"generic-xhci"; + reg = <0x50 0x4000>; + interrupts = ; + clocks = <&cpm_syscon0 1 22>; + marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 46eb937..64801e7 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) struct mvebu_xhci *ctx = dev_get_priv(dev); struct xhci_hcor *hcor; int len; +#ifdef CONFIG_DM_GPIO + struct gpio_desc vbus_gpio; + + gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio, +GPIOD_IS_OUT); + + if (dm_gpio_is_valid(&vbus_gpio)) { + dm_gpio_set_value(&vbus_gpio, 1); + /* Wait for the GPIO VBUS output set */ + mdelay(500); + } +#else + debug("USB VBUS on GPIO support is missing\n"); +#endif /* CONFIG_DM_GPIO */ ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)); Marek, do you have some comments on this USB related patch? If not, are you okay with me pushing it via the Marvell repository? Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
On 01/24/2017 02:53 PM, Stefan Roese wrote: > Hi Marek, > > (adding Marek as USB custodian to Cc) > > On 08.01.2017 15:52, kos...@marvell.com wrote: >> From: Konstantin Porotchkin >> >> Add support for "marvell,vbus-gpio" property to mvebu XHCI >> host adapter driver. >> This option is valid when CONFIG_DM_GPIO=y >> >> Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 >> Signed-off-by: Konstantin Porotchkin >> Cc: Stefan Roese >> Cc: Nadav Haklai >> Cc: Neta Zur Hershkovits >> Cc: Omri Itach >> Cc: Igal Liberman >> Cc: Haim Boot >> Cc: Hanna Hawa >> --- >> Changes for v2: >> - Move VBUS GPIO support from board-specific function to mvebu XHCI >> driver >> - Increase delay after VBUS GPIO activation >> >> doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 >> +++ >> drivers/usb/host/xhci-mvebu.c | 14 +++ >> 2 files changed, 43 insertions(+) >> create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> >> diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> new file mode 100644 >> index 000..b0a53ad >> --- /dev/null >> +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> @@ -0,0 +1,29 @@ >> +Marvell SOC USB controllers >> + >> +This controller is integrated in Armada 3700/8K. >> +It uses the same properties as a generic XHCI host controller >> + >> +Required properties : >> + - compatible: should be one or more of: >> + - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs >> + - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs >> + - reg: should contain address and length of the standard XHCI >> +register set for the device. >> + - interrupts: one XHCI interrupt should be described here. >> + >> +Optional properties: >> + - clocks: reference to a clock Reference clock are optional ? >> + - marvell,vbus-gpio : If present, specifies a gpio that needs to be >> + activated for the bus to be powered. Shouldn't this be a regulator instead ? >> +Example: >> +cpm_usb3_0: usb3@50 { >> +compatible = "marvell,armada-8k-xhci", >> + "generic-xhci"; >> +reg = <0x50 0x4000>; >> +interrupts = ; >> +clocks = <&cpm_syscon0 1 22>; >> +marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; >> +status = "disabled"; >> +}; >> + >> diff --git a/drivers/usb/host/xhci-mvebu.c >> b/drivers/usb/host/xhci-mvebu.c >> index 46eb937..64801e7 100644 >> --- a/drivers/usb/host/xhci-mvebu.c >> +++ b/drivers/usb/host/xhci-mvebu.c >> @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) >> struct mvebu_xhci *ctx = dev_get_priv(dev); >> struct xhci_hcor *hcor; >> int len; >> +#ifdef CONFIG_DM_GPIO >> +struct gpio_desc vbus_gpio; >> + >> +gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio, >> + GPIOD_IS_OUT); >> + >> +if (dm_gpio_is_valid(&vbus_gpio)) { >> +dm_gpio_set_value(&vbus_gpio, 1); >> +/* Wait for the GPIO VBUS output set */ >> +mdelay(500); I think if the GPIO was instead a regulator-fixed, the regulator could handle the delay with something like "ramp-up" delay. But I don't think we do support the ramp-up delay yet ... maybe this can be easily added? >> +} >> +#else >> +debug("USB VBUS on GPIO support is missing\n"); >> +#endif /* CONFIG_DM_GPIO */ >> >> ctx->hcd = (struct xhci_hccr *)plat->hcd_base; >> len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)); >> > > Marek, do you have some comments on this USB related patch? If not, > are you okay with me pushing it via the Marvell repository? I have one . -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 14/17] dm: video: Refactor lcd_simplefb to prepare for driver model
On Fri, 20 Jan 2017 07:07:49 -0700 Simon Glass s...@chromium.org wrote: > Adjust this function so that we can convert it to support CONFIG_DM_VIDEO > without a lot of code duplication. > > Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 15/17] dm: video: Add driver-model support to lcd_simplefb
On Fri, 20 Jan 2017 07:07:50 -0700 Simon Glass s...@chromium.org wrote: > Allow this to work with CONFIG_DM_VIDEO enabled. > > Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 16/17] dm: video: arm: rpi: Convert to use driver model for video
On Fri, 20 Jan 2017 07:07:51 -0700 Simon Glass s...@chromium.org wrote: > Adjust the video driver to work with driver model and move over existing > baords. There is no need to keep the old code. > > We can also drop setting of CONFIG_FB_ADDR since driver model doesn't have > this problem. > > Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] x86: make LOAD_FROM_32_BIT visible for platforms
This option useful not only for development, but for the platforms where U-Boot is run from custom ROM bootloader. For example, Intel Edison is that board. Make this option visible that platforms can select it if needed. Signed-off-by: Andy Shevchenko --- - fix logic bug for non-Edison platforms - move comment to Kconfig as option description arch/x86/Kconfig | 9 + arch/x86/cpu/start.S | 12 ++-- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 0884af22a7..1da1a2199c 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -109,6 +109,15 @@ config SYS_X86_START16 depends on X86_RESET_VECTOR default 0xf800 +config X86_LOAD_FROM_32_BIT + bool "Boot from a 32-bit program" + default n + help + Define this to boot U-Boot from a 32-bit program which sets + the GDT differently. This can be used to boot directly from + any stage of coreboot, for example, bypassing the normal + payload-loading feature. + config BOARD_ROMSIZE_KB_512 bool config BOARD_ROMSIZE_KB_1024 diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index a5cba1cf2a..8de55a0af1 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -18,14 +18,6 @@ #include #include -/* - * Define this to boot U-Boot from a 32-bit program which sets the GDT - * differently. This can be used to boot directly from any stage of coreboot, - * for example, bypassing the normal payload-loading feature. - * This is only useful for development. - */ -#undef LOAD_FROM_32_BIT - .section .text .code32 .globl _start @@ -76,7 +68,7 @@ _start: /* Save table pointer */ movl%ecx, %esi -#ifdef LOAD_FROM_32_BIT +#ifdef CONFIG_X86_LOAD_FROM_32_BIT lgdtgdt_ptr2 #endif @@ -233,7 +225,7 @@ multiboot_header: /* entry addr */ .long CONFIG_SYS_TEXT_BASE -#ifdef LOAD_FROM_32_BIT +#ifdef CONFIG_X86_LOAD_FROM_32_BIT /* * The following Global Descriptor Table is just enough to get us into * 'Flat Protected Mode' - It will be discarded as soon as the final -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mpc85xx: Use symbolic names for cache control bits
From: Mark Marshall We should use the symbolic names for the cache control bits. Signed-off-by: Mark Marshall Reviewed-by: Thomas Graziadei --- arch/powerpc/cpu/mpc85xx/start.S | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 932216c..eb817f1 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1373,8 +1373,8 @@ icache_enable: mtlrr8 isync mfspr r4,L1CSR1 - ori r4,r4,0x0001 - orisr4,r4,0x0001 + ori r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@l + orisr4,r4,(L1CSR1_CPE | L1CSR1_ICE)@h mtspr L1CSR1,r4 isync blr @@ -1402,8 +1402,8 @@ dcache_enable: mtlrr8 isync mfspr r0,L1CSR0 - ori r0,r0,0x0001 - orisr0,r0,0x0001 + ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l + orisr0,r0,(L1CSR0_CPE | L1CSR0_DCE)@h msync isync mtspr L1CSR0,r0 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 12/17] video: arm: rpi: Move the video query out of the driver
On Fri, 20 Jan 2017 07:07:47 -0700 Simon Glass s...@chromium.org wrote: > Add a function to get the video size to the msg handler and remove it from > the video driver. > > Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 13/17] video: arm: rpi: Move the video settings out of the driver
On Fri, 20 Jan 2017 07:07:48 -0700 Simon Glass s...@chromium.org wrote: > Add a function to set the video parameters to the msg handler and remove > it from the video driver. > > Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 02/17] dm: video: Correct line clearing code
On Fri, 20 Jan 2017 07:07:37 -0700 Simon Glass s...@chromium.org wrote: > At present we clear many more bytes than we should on 16bpp and 32bpp > displays. The number of pixels to clear is currently calculated as the > line length (in bytes) multiplied by the number of lines to clear. This > is only correct for 8bpp displays. > > Correct the calculation to use the number of text columns multiplied by > the width of each character multiplied by the number of lines to clear. > > Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [EXT] Re: [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
Hi, Marek, From: Marek Vasut Sent: Tuesday, January 24, 2017 16:11 To: Stefan Roese; Kostya Porotchkin; u-boot@lists.denx.de Cc: Haim Boot; Hanna Hawa; Omri Itach; Nadav Haklai; Neta Zur Hershkovits; Igal Liberman Subject: [EXT] Re: [U-Boot] [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO -- On 01/24/2017 02:53 PM, Stefan Roese wrote: > Hi Marek, > > (adding Marek as USB custodian to Cc) > > On 08.01.2017 15:52, kos...@marvell.com wrote: >> From: Konstantin Porotchkin >> >> Add support for "marvell,vbus-gpio" property to mvebu XHCI >> host adapter driver. >> This option is valid when CONFIG_DM_GPIO=y >> >> Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 >> Signed-off-by: Konstantin Porotchkin >> Cc: Stefan Roese >> Cc: Nadav Haklai >> Cc: Neta Zur Hershkovits >> Cc: Omri Itach >> Cc: Igal Liberman >> Cc: Haim Boot >> Cc: Hanna Hawa >> --- >> Changes for v2: >> - Move VBUS GPIO support from board-specific function to mvebu XHCI >> driver >> - Increase delay after VBUS GPIO activation >> >> doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 >> +++ >> drivers/usb/host/xhci-mvebu.c | 14 +++ >> 2 files changed, 43 insertions(+) >> create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> >> diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> new file mode 100644 >> index 000..b0a53ad >> --- /dev/null >> +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt >> @@ -0,0 +1,29 @@ >> +Marvell SOC USB controllers >> + >> +This controller is integrated in Armada 3700/8K. >> +It uses the same properties as a generic XHCI host controller >> + >> +Required properties : >> + - compatible: should be one or more of: >> + - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs >> + - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs >> + - reg: should contain address and length of the standard XHCI >> +register set for the device. >> + - interrupts: one XHCI interrupt should be described here. >> + >> +Optional properties: >> + - clocks: reference to a clock >Reference clock are optional ? Actually the basis for this file was taken from kernel documentation and clocks are listed as "optional" here. >> + - marvell,vbus-gpio : If present, specifies a gpio that needs to be >> + activated for the bus to be powered. >Shouldn't this be a regulator instead ? If it is required, I can implement the regulator method. However as you mentioned the regulator core has to be extended for the ramp-up time support. This is kind of a shortcut, that enables immediate community board support. The same GPIO VBUS implementation exists in Marvell SDK. >> +Example: >> +cpm_usb3_0: usb3@50 { >> +compatible = "marvell,armada-8k-xhci", >> + "generic-xhci"; >> +reg = <0x50 0x4000>; >> +interrupts = ; >> +clocks = <&cpm_syscon0 1 22>; >> +marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; >> +status = "disabled"; >> +}; >> + >> diff --git a/drivers/usb/host/xhci-mvebu.c >> b/drivers/usb/host/xhci-mvebu.c >> index 46eb937..64801e7 100644 >> --- a/drivers/usb/host/xhci-mvebu.c >> +++ b/drivers/usb/host/xhci-mvebu.c >> @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) >> struct mvebu_xhci *ctx = dev_get_priv(dev); >> struct xhci_hcor *hcor; >> int len; >> +#ifdef CONFIG_DM_GPIO >> +struct gpio_desc vbus_gpio; >> + >> +gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio, >> + GPIOD_IS_OUT); >> + >> +if (dm_gpio_is_valid(&vbus_gpio)) { >> +dm_gpio_set_value(&vbus_gpio, 1); >> +/* Wait for the GPIO VBUS output set */ >> +mdelay(500); >I think if the GPIO was instead a regulator-fixed, the regulator could >handle the delay with something like "ramp-up" delay. But I don't think >we do support the ramp-up delay yet ... maybe this can be easily added? So I assume you suggest to drop this one and implement the VBUS through regulator GPIO? >> +} >> +#else >> +debug("USB VBUS on GPIO support is missing\n"); >> +#endif /* CONFIG_DM_GPIO */ >> >> ctx->hcd = (struct xhci_hccr *)plat->hcd_base; >> len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)); >> > > Marek, do you have some comments on this USB related patch? If not, > are you okay with me pushing it via the Marvell repository? >I have one . Thank you for your review! Best Regards Konstantin Porotchkin -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [EXT] Re: [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
On 01/24/2017 03:57 PM, Kostya Porotchkin wrote: > Hi, Marek, Hi! [...] >>> +Required properties : >>> + - compatible: should be one or more of: >>> + - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs >>> + - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs >>> + - reg: should contain address and length of the standard XHCI >>> +register set for the device. >>> + - interrupts: one XHCI interrupt should be described here. >>> + >>> +Optional properties: >>> + - clocks: reference to a clock > >> Reference clock are optional ? > Actually the basis for this file was taken from kernel documentation and > clocks are listed as "optional" here. Oh ok, interesting. >>> + - marvell,vbus-gpio : If present, specifies a gpio that needs to be >>> + activated for the bus to be powered. > >> Shouldn't this be a regulator instead ? > > If it is required, I can implement the regulator method. > However as you mentioned the regulator core has to be extended for the > ramp-up time support. > This is kind of a shortcut, that enables immediate community board support. > The same GPIO VBUS implementation exists in Marvell SDK. Switching to regulator should be pretty painless and much better than new ad-hoc property, yes. [...] >>> +#ifdef CONFIG_DM_GPIO >>> +struct gpio_desc vbus_gpio; >>> + >>> +gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio, >>> + GPIOD_IS_OUT); >>> + >>> +if (dm_gpio_is_valid(&vbus_gpio)) { >>> +dm_gpio_set_value(&vbus_gpio, 1); >>> +/* Wait for the GPIO VBUS output set */ >>> +mdelay(500); > >> I think if the GPIO was instead a regulator-fixed, the regulator could >> handle the delay with something like "ramp-up" delay. But I don't think >> we do support the ramp-up delay yet ... maybe this can be easily added? > > So I assume you suggest to drop this one and implement the VBUS through > regulator GPIO? Yeah, that'd be neat and if you retain the mdelay() here, it should also be very straightforward without the need for additional patches. If you want to extend the regulator-fixed driver to support the ramp-up delay the same way Linux does, that'd be awesome and you'd be able to drop even the mdelay() here, which'd be much more systematic solution. >>> +} >>> +#else >>> +debug("USB VBUS on GPIO support is missing\n"); >>> +#endif /* CONFIG_DM_GPIO */ >>> >>> ctx->hcd = (struct xhci_hccr *)plat->hcd_base; >>> len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)); >>> >> >> Marek, do you have some comments on this USB related patch? If not, >> are you okay with me pushing it via the Marvell repository? > >> I have one . > > Thank you for your review! > > Best Regards > Konstantin Porotchkin > > > -- > Best regards, > Marek Vasut > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Falcon boot breaks on DRA7 because of commit b9c8ccab "env_mmc.c: Allow environment to be used within SPL"
On Tue, Jan 24, 2017 at 10:26:38AM +0100, Jean-Jacques Hiblot wrote: > Hi Tom, > > I'm using a TI DRA7 platform and the falcon boot from MMC is broken > with v2017. The reason is that the standard "boot_os" is used to > tell whether the falcon mode should be used or not, but we can't > access it. The root cause is that the environment is stored in a > eMMC which is dev 1 not dev 0 on those platforms. > > What is the purpose of commit b9c8ccab. Is it because we want to > initialize only one MMC device in the SPL to reduce the boot time ? Please note that b9c8ccaba77b has been in since April 2014, so this is not some new behavior. That said, we have CONFIG_SYS_MMC_ENV_DEV set which is what the commit in question uses to know where the env is. I think you need to run a git bisect between v2016.11 (which I assume is when you last tested this) and v2017.01 to see what commit changed things. It's possible something has changed and broken this case requiring another tweak somewhere or another, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/9] imx6ul: Add Engicam Is.IoT MX6UL support
On Fri, Jan 20, 2017 at 12:02 AM, Jagan Teki wrote: > From: Jagan Teki > > This patch set support Engicam Is.IoT MX6UL board support. > > Changes for v2: > - Skiped eMMC node patch > - Rebase to master > > Changes for v1: > - Rebase to master > > Jagan Teki (9): > configs: imx6: Don't define USDHC2_BASE_ADDR > arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support > arm: dts: imx6ul-isiot: Add I2C nodes > imx6: isiotmx6ul: Add I2C support > arm: dts: imx6ul-isiot: Add FEC node > imx6: isiotmx6ul: Add FEC support > imx6: isiotmx6ul: Add NAND support > imx6: isiotmx6ul: Add nandboot env support > imx6ul: isiotmx6ul: Enable I2C support > > arch/arm/cpu/armv7/mx6/Kconfig| 13 ++ > arch/arm/dts/Makefile | 4 +- > arch/arm/dts/imx6ul-isiot-mmc.dts | 50 ++ > arch/arm/dts/imx6ul-isiot-nand.dts| 50 ++ > arch/arm/dts/imx6ul-isiot.dtsi| 142 +++ > board/engicam/isiotmx6ul/Kconfig | 12 ++ > board/engicam/isiotmx6ul/MAINTAINERS | 7 + > board/engicam/isiotmx6ul/Makefile | 6 + > board/engicam/isiotmx6ul/README | 28 +++ > board/engicam/isiotmx6ul/isiotmx6ul.c | 316 > ++ > configs/imx6ul_isiot_mmc_defconfig| 41 + > configs/imx6ul_isiot_nand_defconfig | 49 ++ > include/configs/imx6qdl_icore.h | 2 +- > include/configs/imx6ul_geam.h | 2 +- > include/configs/imx6ul_isiot.h| 205 ++ > 15 files changed, 924 insertions(+), 3 deletions(-) > create mode 100644 arch/arm/dts/imx6ul-isiot-mmc.dts > create mode 100644 arch/arm/dts/imx6ul-isiot-nand.dts > create mode 100644 arch/arm/dts/imx6ul-isiot.dtsi > create mode 100644 board/engicam/isiotmx6ul/Kconfig > create mode 100644 board/engicam/isiotmx6ul/MAINTAINERS > create mode 100644 board/engicam/isiotmx6ul/Makefile > create mode 100644 board/engicam/isiotmx6ul/README > create mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c > create mode 100644 configs/imx6ul_isiot_mmc_defconfig > create mode 100644 configs/imx6ul_isiot_nand_defconfig > create mode 100644 include/configs/imx6ul_isiot.h > > -- > 1.9.1 > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/9] imx6ul: Add Engicam Is.IoT MX6UL support
Hi Stefano, On Tue, Jan 24, 2017 at 4:27 PM, Jagan Teki wrote: > On Fri, Jan 20, 2017 at 12:02 AM, Jagan Teki wrote: >> From: Jagan Teki >> >> This patch set support Engicam Is.IoT MX6UL board support. >> >> Changes for v2: >> - Skiped eMMC node patch >> - Rebase to master >> >> Changes for v1: >> - Rebase to master >> >> Jagan Teki (9): >> configs: imx6: Don't define USDHC2_BASE_ADDR >> arm: imx6ul: Add Engicam Is.IoT MX6UL Starter Kit initial support >> arm: dts: imx6ul-isiot: Add I2C nodes >> imx6: isiotmx6ul: Add I2C support >> arm: dts: imx6ul-isiot: Add FEC node >> imx6: isiotmx6ul: Add FEC support >> imx6: isiotmx6ul: Add NAND support >> imx6: isiotmx6ul: Add nandboot env support >> imx6ul: isiotmx6ul: Enable I2C support Please pick this? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Falcon boot breaks on DRA7 because of commit b9c8ccab "env_mmc.c: Allow environment to be used within SPL"
On 24/01/2017 16:17, Tom Rini wrote: On Tue, Jan 24, 2017 at 10:26:38AM +0100, Jean-Jacques Hiblot wrote: Hi Tom, I'm using a TI DRA7 platform and the falcon boot from MMC is broken with v2017. The reason is that the standard "boot_os" is used to tell whether the falcon mode should be used or not, but we can't access it. The root cause is that the environment is stored in a eMMC which is dev 1 not dev 0 on those platforms. What is the purpose of commit b9c8ccab. Is it because we want to initialize only one MMC device in the SPL to reduce the boot time ? Please note that b9c8ccaba77b has been in since April 2014, so this is not some new behavior. I had noticed that it's quite old indeed. I didn't mean that it's a regression. I'm just puzzled by the commit. what is its purpose ? why is SPL not using CONFIG_SYS_MMC_ENV_DEV ? I can trace this as the reason why I can't access the environment in eMMC (MMC2) when booting from SD (MMC1) and the fix is simply use dev = CONFIG_SYS_MMC_ENV_DEV instead of dev = 0. But I guess that there is a reason for enforcing dev = 0. If the reason is still valid, I'll have to find another way of dealing with this. Otherwise we could revert to dev = CONFIG_SYS_MMC_ENV_DEV or define a CONFIG_SYS_MMC_ENV_SPL_EV with a default value of 0. That said, we have CONFIG_SYS_MMC_ENV_DEV set which is what the commit in question uses to know where the env is. I think you need to run a git bisect between v2016.11 (which I assume is when you last tested this) Honestly I don't know when it broke. I still have to figure this. It may be that the test case I'm using hasn't work in a long time. From what I understand falcon boot on DRA7 is primarily used from QSPI or eMMC in raw mode. And those modes are not impacted by this problem with the environment. and v2017.01 to see what commit changed things. It's possible something has changed and broken this case requiring another tweak somewhere or another, thanks! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Falcon boot breaks on DRA7 because of commit b9c8ccab "env_mmc.c: Allow environment to be used within SPL"
On Tue, Jan 24, 2017 at 04:35:58PM +0100, Jean-Jacques Hiblot wrote: > > > On 24/01/2017 16:17, Tom Rini wrote: > >On Tue, Jan 24, 2017 at 10:26:38AM +0100, Jean-Jacques Hiblot wrote: > > > >>Hi Tom, > >> > >>I'm using a TI DRA7 platform and the falcon boot from MMC is broken > >>with v2017. The reason is that the standard "boot_os" is used to > >>tell whether the falcon mode should be used or not, but we can't > >>access it. The root cause is that the environment is stored in a > >>eMMC which is dev 1 not dev 0 on those platforms. > >> > >>What is the purpose of commit b9c8ccab. Is it because we want to > >>initialize only one MMC device in the SPL to reduce the boot time ? > >Please note that b9c8ccaba77b has been in since April 2014, so this is > >not some new behavior. > I had noticed that it's quite old indeed. I didn't mean that it's a > regression. I'm just puzzled by the commit. what is its purpose ? > why is SPL not using CONFIG_SYS_MMC_ENV_DEV ? Because in SPL we do not have both MMC devices initialized. We register the one we booted from and thus it is device 0 to U-Boot in this case. I suspect the rest of the issues stem from this quirk, or something having broken around this quirk. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] ARM: am335x: Add support for chiliSOM
On 23.01.2017 18:07, Tom Rini wrote: On Mon, Jan 23, 2017 at 05:27:09PM +0100, Marcin Niestroj wrote: Hi, Thanks for review! See my comment below. On 23.01.2017 16:56, Tom Rini wrote: On Mon, Jan 23, 2017 at 02:39:15PM +0100, Marcin Niestroj wrote: chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/). It can't exists on its own, but will be used as part of other boards. Hardware specification: * TI AM335x processor * 128M, 256M or 512M DDR3 memory * up to 256M NAND Here we treat SOM similar to SOC, so we place it inside arch/arm/mach-* directory and make it possible to reuse initialization code (i.e. DDR, NAND init) for all boards that use it. This approach is similar as for liteSOM module. Signed-off-by: Marcin Niestroj --- arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/mach-chilisom/Kconfig | 4 + arch/arm/mach-chilisom/Makefile| 6 + arch/arm/mach-chilisom/chilisom.c | 185 + arch/arm/mach-chilisom/include/mach/chilisom.h | 15 ++ 6 files changed, 213 insertions(+) These don't belong in a new mach directory, this should end up in board/grinn/common/ instead, thanks! This will work for all grinn boards. But the idea is that some other vendor can make a board that will use chilisom as it's base. And in that case sources from board/grinn/common/ directory won't compile. Do you have any idea how to bypass this restriction? Good question. I think the full answer here is that oops, arch/arm/mach-litesom shouldn't have been ACK'd as other SoMs (say board/solidrun/mx6cuboxi/) just keep everything central to the board directory and expect that derivations will just copy the directory and edit in-place. That said, that is indeed not optimal, especially since you've already done the leg-work to split things for SoM and carrier. Perhaps arch/arm/mach-omap2/am33xx/chilisom.c (depends on CONFIG_AM33XX_CHILISOM, which gets select'd by the boards in question). And then a similar change for mach-litesom into arch/arm/cpu/armv7/mx6/ (which will get moved to arch/arm/mach-imx at some point I believe). Thanks! Ok, so I will move source to arch/arm/mach-omap2/am33xx/chilisom.c as you suggested. What about chilisom.h? Should it go to arch/arm/mach-omap2/include/mach/ (which is not existing right now) or should it be in arch/arm/include/asm/arch-am33xx/ as other headers? -- Marcin Niestroj ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] ARM: am335x: Add support for chiliSOM
On Tue, Jan 24, 2017 at 05:27:50PM +0100, Marcin Niestroj wrote: > > > On 23.01.2017 18:07, Tom Rini wrote: > >On Mon, Jan 23, 2017 at 05:27:09PM +0100, Marcin Niestroj wrote: > >>Hi, > >>Thanks for review! See my comment below. > >> > >>On 23.01.2017 16:56, Tom Rini wrote: > >>>On Mon, Jan 23, 2017 at 02:39:15PM +0100, Marcin Niestroj wrote: > >>> > chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/). > It can't exists on its own, but will be used as part of other boards. > > Hardware specification: > * TI AM335x processor > * 128M, 256M or 512M DDR3 memory > * up to 256M NAND > > Here we treat SOM similar to SOC, so we place it inside arch/arm/mach-* > directory and make it possible to reuse initialization code (i.e. DDR, > NAND init) for all boards that use it. This approach is similar as for > liteSOM module. > > Signed-off-by: Marcin Niestroj > --- > arch/arm/Kconfig | 2 + > arch/arm/Makefile | 1 + > arch/arm/mach-chilisom/Kconfig | 4 + > arch/arm/mach-chilisom/Makefile| 6 + > arch/arm/mach-chilisom/chilisom.c | 185 > + > arch/arm/mach-chilisom/include/mach/chilisom.h | 15 ++ > 6 files changed, 213 insertions(+) > >>> > >>>These don't belong in a new mach directory, this should end up in > >>>board/grinn/common/ instead, thanks! > >>> > >> > >>This will work for all grinn boards. But the idea is that some other > >>vendor can make a board that will use chilisom as it's base. And in > >>that case sources from board/grinn/common/ directory won't compile. > >>Do you have any idea how to bypass this restriction? > > > >Good question. I think the full answer here is that oops, > >arch/arm/mach-litesom shouldn't have been ACK'd as other SoMs (say > >board/solidrun/mx6cuboxi/) just keep everything central to the board > >directory and expect that derivations will just copy the directory and > >edit in-place. That said, that is indeed not optimal, especially since > >you've already done the leg-work to split things for SoM and carrier. > >Perhaps arch/arm/mach-omap2/am33xx/chilisom.c (depends on > >CONFIG_AM33XX_CHILISOM, which gets select'd by the boards in question). > >And then a similar change for mach-litesom into arch/arm/cpu/armv7/mx6/ > >(which will get moved to arch/arm/mach-imx at some point I believe). > >Thanks! > > > > Ok, so I will move source to arch/arm/mach-omap2/am33xx/chilisom.c as > you suggested. What about chilisom.h? Should it go to > arch/arm/mach-omap2/include/mach/ (which is not existing right now) or > should it be in arch/arm/include/asm/arch-am33xx/ as other headers? It should go in arch/arm/include/asm/arch-am33xx/ and then please also do a follow-up series to change litesom, thanks again! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot.git or u-boot-x86.git for x86_64 u-boots?
On Sat, 2017-01-14 at 10:06 -0700, Simon Glass wrote: > Hi Joakim, > > On 14 January 2017 at 04:51, Bin Meng wrote: > > +Simon, > > > > On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund > > wrote: > > > I found two repos w.r.t x86_64 for u-boot, which one should I use? > > > > > > > U-Boot x86_64 support is not in mainstream yet. > > I'll be sending v3 fairly soon. But even then it is not complete. > Various things need fixing up and polishing - e.g. SDRAM sizing, > graphics ROMs, actually booting Linux! > > > > > > I am ATM only looking at USING the qemu-x86 target for now. > > > > > > BTW, I found tools/binman/binman.py only worked with python 2.7, maybe > > > you can change > > > the shebang to python2.7 as my default python is 3.4 > > We should probably patch it to work on 3.4 also. I did a quick test using: 2to3 -w binman.py This makes binman.py "build" on both 2.7 and 3.4 but running it on 3.4 hangs forever until Ctrl-C: BINMAN u-boot.rom Traceback (most recent call last): File "./tools/binman/binman", line 113, in ret_code = RunBinman(options, args) File "./tools/binman/binman", line 101, in RunBinman ret_code = control.Binman(options, args) File "/usr/local/src/u-boot-x86/tools/binman/control.py", line 95, in Binman fdt = fdt_select.FdtScan(dtb_fname) File "/usr/local/src/u-boot-x86/tools/binman/../dtoc/fdt_select.py", line 28, in FdtScan dtb.Scan() File "/usr/local/src/u-boot-x86/tools/binman/../dtoc/fdt.py", line 229, in Scan self._root.Scan() File "/usr/local/src/u-boot-x86/tools/binman/../dtoc/fdt_fallback.py", line 61, in Scan for name, byte_list_str in self._fdt.GetProps(self.path).items(): File "/usr/local/src/u-boot-x86/tools/binman/../dtoc/fdt_fallback.py", line 128, in GetProps out = command.Output('fdtget', self._fname, node, '-p') File "/usr/local/src/u-boot-x86/tools/binman/../patman/command.py", line 109, in Output return RunPipe([cmd], capture=True, raise_on_error=raise_on_error).stdout File "/usr/local/src/u-boot-x86/tools/binman/../patman/command.py", line 97, in RunPipe last_pipe.CommunicateFilter(None)) File "/usr/local/src/u-boot-x86/tools/binman/../patman/cros_subprocess.py", line 168, in CommunicateFilter rlist, wlist, _ = select.select(read_set, write_set, [], 0.2) KeyboardInterrupt Makefile:1070: recipe for target 'u-boot.rom' failed make: *** [u-boot.rom] Error 1 Please just change shebang to python2.7 for now. This is the only fix needed to build the x86 qemu target. Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Falcon boot breaks on DRA7 because of commit b9c8ccab "env_mmc.c: Allow environment to be used within SPL"
On 24/01/2017 16:46, Tom Rini wrote: I had noticed that it's quite old indeed. I didn't mean that it's a regression. I'm just puzzled by the commit. what is its purpose ? why is SPL not using CONFIG_SYS_MMC_ENV_DEV ? Because in SPL we do not have both MMC devices initialized. That is not always the case. Actually in spl_mmc.c the code requires us to register more than one MMC device to work properly when multiple MMC boot devices can be used (see spl_mmc_get_device_index()) I did the test of registering only MMC2 when booting from eMMC, the SPL fails because it can't find device 1: Trying to boot from MMC2_2 MMC Device 1 not found spl: could not find mmc device. error: -19 We register the one we booted from and thus it is device 0 to U-Boot in this case. I suspect the rest of the issues stem from this quirk, or something having broken around this quirk. Thanks! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen --- configs/socfpga_de0_nano_soc_defconfig | 3 +-- include/configs/socfpga_de0_nano_soc.h | 19 +-- 2 files changed, 2 insertions(+), 20 deletions(-) diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index af41e1e..4837809 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y @@ -20,7 +21,6 @@ CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y @@ -35,7 +35,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y -CONFIG_CMD_UBI=y CONFIG_SPL_DM=y CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 6b9546e..97216ea 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -18,7 +18,7 @@ #define PHYS_SDRAM_1_SIZE 0x4000 /* 1GiB */ /* Booting Linux */ -#define CONFIG_BOOTFILE"fitImage" +#define CONFIG_BOOTFILE"zImage" #define CONFIG_BOOTARGS"console=ttyS0," __stringify(CONFIG_BAUDRATE) #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" #define CONFIG_LOADADDR0x0100 @@ -32,23 +32,6 @@ #define CONFIG_ENV_IS_IN_MMC -/* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "bootimage=zImage\0" \ - "fdt_addr=100\0" \ - "fdtimage=socfpga.dtb\0" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "mmcroot=/dev/mmcblk0p2\0" \ - "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${mmcroot} rw rootwait;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "mmcload=mmc rescan;" \ - "load mmc 0:1 ${loadaddr} ${bootimage};" \ - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ - /* The rest of the configuration is shared */ #include -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 0/7]
From: Dalon Westergreen These patches update the boot and os partition numbers in the default uboot environment for a number of socfpga boards. Per request, common environment configurations have been moved to a shared header. Changes in v4: - Removed extraneous define in socfpga_common.h and only use CONFIG_EXTRA_ENV_SETTINGS for common uboot environment Changes in v3: - Corrected error in common default environment Dalon Westergreen (7): arm: socfpga: add env settings to common header arm: socfpga: update de0 nano default environment arm: socfpga: update cyclone5 socdk default environment arm: socfpga: update arria5 socdk default environment arm: socfpga: Update DE1 environment arm: socfpga: Update SoCKit environment arm: socfpga: Update sr1500 environment configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 3 +-- configs/socfpga_de1_soc_defconfig| 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + include/configs/socfpga_arria5_socdk.h | 25 - include/configs/socfpga_common.h | 27 +++ include/configs/socfpga_cyclone5_socdk.h | 25 - include/configs/socfpga_de0_nano_soc.h | 19 +-- include/configs/socfpga_de1_soc.h| 19 +-- include/configs/socfpga_sockit.h | 27 +-- include/configs/socfpga_sr1500.h | 25 - 13 files changed, 36 insertions(+), 139 deletions(-) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/7] arm: socfpga: add env settings to common header
From: Dalon Westergreen Move repeated environment settings for socfpga boards to a common header. The default values for the boot partition and the OS filesystem partition have changed and as as result the default uboot environment for socfpga boards needs updating. Move to using CONFIG_DEFAULT_DEVICE_TREE for setting the default linux devicetree used during linux boot. Signed-off-by: Dalon Westergreen --- include/configs/socfpga_common.h | 27 +++ 1 file changed, 27 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 6285266..bdd6e2f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -336,5 +336,32 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * Stack setup */ #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR + +/* Extra Environment */ +#ifndef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=n\0" \ + "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "bootimage=" CONFIG_BOOTFILE "\0" \ + "fdt_addr=100\0" \ + "fdtimage=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ + "bootm ${loadaddr} - ${fdt_addr}\0" \ + "mmcroot=/dev/mmcblk0p3\0" \ + "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ + " root=${mmcroot} rw rootwait;" \ + "bootz ${loadaddr} - ${fdt_addr}\0" \ + "mmcload=mmc rescan;" \ + "load mmc 0:2 ${loadaddr} ${bootimage};" \ + "load mmc 0:2 ${fdt_addr} ${fdtimage}\0" \ + "qspiload=sf probe && mtdparts default && run ubiload\0" \ + "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ + " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\ + "bootz ${loadaddr} - ${fdt_addr}\0" \ + "ubiload=ubi part UBI && ubifsmount ubi0 && " \ + "ubifsload ${loadaddr} /boot/${bootimage} && " \ + "ubifsload ${fdt_addr} /boot/${fdtimage}\0" + +#endif #endif /* __CONFIG_SOCFPGA_COMMON_H__ */ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 3/7] arm: socfpga: update cyclone5 socdk default environment
From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen --- configs/socfpga_cyclone5_defconfig | 1 + include/configs/socfpga_cyclone5_socdk.h | 25 - 2 files changed, 1 insertion(+), 25 deletions(-) diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 8b050b9..cba1e9c 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socdk.dtb" CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 7ced6a6..96b2b87 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -36,31 +36,6 @@ #define CONFIG_ENV_IS_IN_MMC -/* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "bootimage=zImage\0" \ - "fdt_addr=100\0" \ - "fdtimage=socfpga.dtb\0" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "mmcroot=/dev/mmcblk0p2\0" \ - "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${mmcroot} rw rootwait;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "mmcload=mmc rescan;" \ - "load mmc 0:1 ${loadaddr} ${bootimage};" \ - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ - "qspiload=sf probe && mtdparts default && run ubiload\0" \ - "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ - " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "ubiload=ubi part UBI && ubifsmount ubi0 && " \ - "ubifsload ${loadaddr} /boot/${bootimage} && " \ - "ubifsload ${fdt_addr} /boot/${fdtimage}\0" - /* The rest of the configuration is shared */ #include -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 4/7] arm: socfpga: update arria5 socdk default environment
From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen --- configs/socfpga_arria5_defconfig | 1 + include/configs/socfpga_arria5_socdk.h | 25 - 2 files changed, 1 insertion(+), 25 deletions(-) diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 43c51fe..6a473a9 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" +CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_socdk.dtb" CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 3b0b416..481a032 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -36,31 +36,6 @@ #define CONFIG_ENV_IS_IN_MMC -/* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "bootimage=zImage\0" \ - "fdt_addr=100\0" \ - "fdtimage=socfpga.dtb\0" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "mmcroot=/dev/mmcblk0p2\0" \ - "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${mmcroot} rw rootwait;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "mmcload=mmc rescan;" \ - "load mmc 0:1 ${loadaddr} ${bootimage};" \ - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ - "qspiload=sf probe && mtdparts default && run ubiload\0" \ - "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ - " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "ubiload=ubi part UBI && ubifsmount ubi0 && " \ - "ubifsload ${loadaddr} /boot/${bootimage} && " \ - "ubifsload ${fdt_addr} /boot/${fdtimage}\0" - /* The rest of the configuration is shared */ #include -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 6/7] arm: socfpga: Update SoCKit environment
From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen --- configs/socfpga_sockit_defconfig | 1 + include/configs/socfpga_sockit.h | 27 +-- 2 files changed, 2 insertions(+), 26 deletions(-) diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index d0c2bda..130c4e2 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" +CONFIG_DEFAULT_FDT_FILE="socfpga.dtb" CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 3fceb31..c51cc72 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -18,7 +18,7 @@ #define PHYS_SDRAM_1_SIZE 0x4000 /* 1GiB on SoCDK */ /* Booting Linux */ -#define CONFIG_BOOTFILE"fitImage" +#define CONFIG_BOOTFILE"zImage" #define CONFIG_BOOTARGS"console=ttyS0," __stringify(CONFIG_BAUDRATE) #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" #define CONFIG_LOADADDR0x0100 @@ -32,31 +32,6 @@ #define CONFIG_ENV_IS_IN_MMC -/* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "bootimage=zImage\0" \ - "fdt_addr=100\0" \ - "fdtimage=socfpga.dtb\0" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "mmcroot=/dev/mmcblk0p2\0" \ - "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${mmcroot} rw rootwait;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "mmcload=mmc rescan;" \ - "load mmc 0:1 ${loadaddr} ${bootimage};" \ - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ - "qspiload=sf probe && mtdparts default && run ubiload\0" \ - "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ - " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "ubiload=ubi part UBI && ubifsmount ubi0 && " \ - "ubifsload ${loadaddr} /boot/${bootimage} && " \ - "ubifsload ${fdt_addr} /boot/${fdtimage}\0" - /* The rest of the configuration is shared */ #include -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 5/7] arm: socfpga: Update DE1 environment
From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen --- configs/socfpga_de1_soc_defconfig | 1 + include/configs/socfpga_de1_soc.h | 19 +-- 2 files changed, 2 insertions(+), 18 deletions(-) diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 032deef..19ff608 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" +CONFIG_DEFAULT_FDT_FILE="socfpga.dtb" CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h index deec647..3142bd1 100644 --- a/include/configs/socfpga_de1_soc.h +++ b/include/configs/socfpga_de1_soc.h @@ -18,7 +18,7 @@ #define PHYS_SDRAM_1_SIZE 0x4000 /* 1GiB */ /* Booting Linux */ -#define CONFIG_BOOTFILE"fitImage" +#define CONFIG_BOOTFILE"zImage" #define CONFIG_BOOTARGS"console=ttyS0," __stringify(CONFIG_BAUDRATE) #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" #define CONFIG_LOADADDR0x0100 @@ -32,23 +32,6 @@ #define CONFIG_ENV_IS_IN_MMC -/* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdtaddr}\0" \ - "bootimage=zImage\0" \ - "fdtaddr=100\0" \ - "fdtimage=socfpga.dtb\0" \ - "bootm ${loadaddr} - ${fdtaddr}\0" \ - "mmcroot=/dev/mmcblk0p2\0" \ - "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${mmcroot} rw rootwait;" \ - "bootz ${loadaddr} - ${fdtaddr}\0" \ - "mmcload=mmc rescan;" \ - "load mmc 0:1 ${loadaddr} ${bootimage};" \ - "load mmc 0:1 ${fdtaddr} ${fdtimage}\0" \ - /* The rest of the configuration is shared */ #include -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 7/7] arm: socfpga: Update sr1500 environment
From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen Acked-by: Stefan Roese --- configs/socfpga_sr1500_defconfig | 1 + include/configs/socfpga_sr1500.h | 25 - 2 files changed, 1 insertion(+), 25 deletions(-) diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 6fd7bc0..b0b08da 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" +CONFIG_DEFAULT_FDT_FILE="socfpga.dtb" CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 0407f03..3c63e80 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -32,31 +32,6 @@ #define CONFIG_PHY_MARVELL #define PHY_ANEG_TIMEOUT 8000 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=n\0" \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "bootimage=zImage\0" \ - "fdt_addr=100\0" \ - "fdtimage=socfpga.dtb\0" \ - "fsloadcmd=ext2load\0" \ - "bootm ${loadaddr} - ${fdt_addr}\0" \ - "mmcroot=/dev/mmcblk0p2\0" \ - "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ - " root=${mmcroot} rw rootwait;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "mmcload=mmc rescan;" \ - "load mmc 0:1 ${loadaddr} ${bootimage};" \ - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ - "qspiload=sf probe && mtdparts default && run ubiload\0" \ - "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ - " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "ubiload=ubi part UBI && ubifsmount ubi0 && " \ - "ubifsload ${loadaddr} /boot/${bootimage} && " \ - "ubifsload ${fdt_addr} /boot/${fdtimage}\0" - /* Environment */ #define CONFIG_ENV_IS_IN_SPI_FLASH -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/7]
On 01/24/2017 06:05 PM, Dalon Westergreen wrote: > From: Dalon Westergreen > > These patches update the boot and os partition numbers in the > default uboot environment for a number of socfpga boards. Per > request, common environment configurations have been moved to a > shared header. > > Changes in v4: > - Removed extraneous define in socfpga_common.h >and only use CONFIG_EXTRA_ENV_SETTINGS for >common uboot environment > Changes in v3: > - Corrected error in common default environment > > Dalon Westergreen (7): > arm: socfpga: add env settings to common header > arm: socfpga: update de0 nano default environment > arm: socfpga: update cyclone5 socdk default environment > arm: socfpga: update arria5 socdk default environment > arm: socfpga: Update DE1 environment > arm: socfpga: Update SoCKit environment > arm: socfpga: Update sr1500 environment > > configs/socfpga_arria5_defconfig | 1 + > configs/socfpga_cyclone5_defconfig | 1 + > configs/socfpga_de0_nano_soc_defconfig | 3 +-- > configs/socfpga_de1_soc_defconfig| 1 + > configs/socfpga_sockit_defconfig | 1 + > configs/socfpga_sr1500_defconfig | 1 + > include/configs/socfpga_arria5_socdk.h | 25 - > include/configs/socfpga_common.h | 27 +++ > include/configs/socfpga_cyclone5_socdk.h | 25 - > include/configs/socfpga_de0_nano_soc.h | 19 +-- > include/configs/socfpga_de1_soc.h| 19 +-- > include/configs/socfpga_sockit.h | 27 +-- > include/configs/socfpga_sr1500.h | 25 - > 13 files changed, 36 insertions(+), 139 deletions(-) > Whole series Acked-by: Marek Vasut Dinh, any comments ? -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH] net: phy: dp83867: add support for MAC impedance configuration
From: Mugunthan V N Add support for programmable MAC impedance configuration and fix typo in DT impedance parameters names. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko --- no functional changes, just cc list corrected arch/arm/dts/dra72-evm-revc.dts | 4 ++-- drivers/net/phy/ti.c| 31 +++ 2 files changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/dra72-evm-revc.dts b/arch/arm/dts/dra72-evm-revc.dts index 5a1bb34..bc814f1 100644 --- a/arch/arm/dts/dra72-evm-revc.dts +++ b/arch/arm/dts/dra72-evm-revc.dts @@ -67,7 +67,7 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; - ti,min-output-imepdance; + ti,min-output-impedance; }; dp83867_1: ethernet-phy@3 { @@ -75,6 +75,6 @@ ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; - ti,min-output-imepdance; + ti,min-output-impedance; }; }; diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c index c55dd97..21b181a 100644 --- a/drivers/net/phy/ti.c +++ b/drivers/net/phy/ti.c @@ -27,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; /* Extended Registers */ #define DP83867_RGMIICTL 0x0032 #define DP83867_RGMIIDCTL 0x0086 +#define DP83867_IO_MUX_CFG 0x0170 #define DP83867_SW_RESET BIT(15) #define DP83867_SW_RESTART BIT(14) @@ -84,10 +85,17 @@ DECLARE_GLOBAL_DATA_PTR; #define DEFAULT_TX_ID_DELAYDP83867_RGMIIDCTL_2_75_NS #define DEFAULT_FIFO_DEPTH DP83867_PHYCR_FIFO_DEPTH_4_B_NIB +/* IO_MUX_CFG bits */ +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f + +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0 +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f + struct dp83867_private { int rx_id_delay; int tx_id_delay; int fifo_depth; + int io_impedance; }; /** @@ -166,6 +174,15 @@ static int dp83867_of_init(struct phy_device *phydev) { struct dp83867_private *dp83867 = phydev->priv; struct udevice *dev = phydev->dev; + int node = dev->of_offset; + const void *fdt = gd->fdt_blob; + + if (fdtdec_get_bool(fdt, node, "ti,max-output-impedance")) + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX; + else if (fdtdec_get_bool(fdt, node, "ti,min-output-impedance")) + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN; + else + dp83867->io_impedance = -EINVAL; dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, "ti,rx-internal-delay", -1); @@ -186,6 +203,7 @@ static int dp83867_of_init(struct phy_device *phydev) dp83867->rx_id_delay = DEFAULT_RX_ID_DELAY; dp83867->tx_id_delay = DEFAULT_TX_ID_DELAY; dp83867->fifo_depth = DEFAULT_FIFO_DEPTH; + dp83867->io_impedance = -EINVAL; return 0; } @@ -269,6 +287,19 @@ static int dp83867_config(struct phy_device *phydev) phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL, DP83867_DEVADDR, phydev->addr, delay); + + if (dp83867->io_impedance >= 0) { + val = phy_read_mmd_indirect(phydev, + DP83867_IO_MUX_CFG, + DP83867_DEVADDR, + phydev->addr); + val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + val |= dp83867->io_impedance & + DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR, phydev->addr, + val); + } } genphy_config_aneg(phydev); -- 2.10.1.dirty ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net: phy: dp83867: add support for MAC impedance configuration
On 01/22/2017 10:51 PM, Lokesh Vutla wrote: On Friday 20 January 2017 04:03 AM, Grygorii Strashko wrote: Sry CC:u-boot@lists.denx.de On 01/19/2017 04:30 PM, Grygorii Strashko wrote: From: Mugunthan V N Add support for programmable MAC impedance configuration and fix typo in DT impedance parameters names. Signed-off-by: Mugunthan V N Signed-off-by: Grygorii Strashko I could see port 0 working but not port1. Is there any special setting required for port1? it works, but it's required to change active_slave property in dt. i've just re-sent patch with proper cc list. -- regards, -grygorii ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/2] ARM: am335x: Support chiliSOM and chiliBoard
These patches add support for chiliSOM (http://grinn-global.com/chilisom/), and chiliBoard (which uses chiliSOM as it's base). chiliSOM consists of processor (TI AM335x), RAM memory (up to 512M DDR3) and flash (NAND). The idea is that every board vendor can use chiliSOM as it's base for designed board. Hence, we need a way to reuse common code between those board. chiliBoard is a development kit (and reference platform for chiliSOM), that mainly shows possibilities and use cases of chiliSOM. This is a second approach and we are moving chiliSOM sources to arch/arm/mach-omap2/am33xx/ directory. The same will happen with liteSOM support (which is already merged) after successful chiliSOM code review. Patches were developed and tested on 2017.01. Changes v1 -> v2: * chiliSOM was moved from arch/arm/mach-chilisom/chilisom.c to arch/arm/mach-omap2/chilisom.c (suggested by Tom) * CONFIG_CHILISOM -> CONFIG_AM33XX_CHILISOM (suggested by Tom) * converted include/configs/chiliboard.h header to SPDX license identifier (suggested by Tom) * removed USB gadget, CMD_DFU options from chiliboard_defconfig Marcin Niestroj (2): ARM: am335x: Add support for chiliSOM board/chiliboard: Add support for chiliBoard arch/arm/Kconfig| 1 + arch/arm/include/asm/arch-am33xx/chilisom.h | 15 ++ arch/arm/mach-omap2/am33xx/Kconfig | 10 ++ arch/arm/mach-omap2/am33xx/Makefile | 2 + arch/arm/mach-omap2/am33xx/chilisom.c | 185 +++ board/grinn/chiliboard/Kconfig | 15 ++ board/grinn/chiliboard/MAINTAINERS | 6 + board/grinn/chiliboard/Makefile | 6 + board/grinn/chiliboard/README | 31 board/grinn/chiliboard/board.c | 264 configs/chiliboard_defconfig| 48 + include/configs/chiliboard.h| 220 +++ 12 files changed, 803 insertions(+) create mode 100644 arch/arm/include/asm/arch-am33xx/chilisom.h create mode 100644 arch/arm/mach-omap2/am33xx/chilisom.c create mode 100644 board/grinn/chiliboard/Kconfig create mode 100644 board/grinn/chiliboard/MAINTAINERS create mode 100644 board/grinn/chiliboard/Makefile create mode 100644 board/grinn/chiliboard/README create mode 100644 board/grinn/chiliboard/board.c create mode 100644 configs/chiliboard_defconfig create mode 100644 include/configs/chiliboard.h -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] ARM: am335x: Add support for chiliSOM
chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/). It can't exists on its own, but will be used as part of other boards. Hardware specification: * TI AM335x processor * 128M, 256M or 512M DDR3 memory * up to 256M NAND We place source inside arch/arm/mach-omap2/ directory and make it possible to reuse initialization code (i.e. DDR, NAND init) for all boards that use it. Signed-off-by: Marcin Niestroj --- Changes v1 -> v2 (suggested by Tom): * chiliSOM was moved from arch/arm/mach-chilisom/chilisom.c to arch/arm/mach-omap2/chilisom.c * CONFIG_CHILISOM -> CONFIG_AM33XX_CHILISOM arch/arm/include/asm/arch-am33xx/chilisom.h | 15 +++ arch/arm/mach-omap2/am33xx/Kconfig | 4 + arch/arm/mach-omap2/am33xx/Makefile | 2 + arch/arm/mach-omap2/am33xx/chilisom.c | 185 4 files changed, 206 insertions(+) create mode 100644 arch/arm/include/asm/arch-am33xx/chilisom.h create mode 100644 arch/arm/mach-omap2/am33xx/chilisom.c diff --git a/arch/arm/include/asm/arch-am33xx/chilisom.h b/arch/arm/include/asm/arch-am33xx/chilisom.h new file mode 100644 index 00..bd0016e441 --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/chilisom.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2017 Grinn + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __ARCH_ARM_MACH_CHILISOM_SOM_H__ +#define __ARCH_ARM_MACH_CHILISOM_SOM_H__ + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +void chilisom_enable_pin_mux(void); +void chilisom_spl_board_init(void); +#endif + +#endif diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 56c44062c4..b1a0f0f356 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -1,5 +1,9 @@ if AM33XX +config AM33XX_CHILISOM + bool + select SUPPORT_SPL + choice prompt "AM33xx board select" optional diff --git a/arch/arm/mach-omap2/am33xx/Makefile b/arch/arm/mach-omap2/am33xx/Makefile index 6fda4825fc..05cc8a11c5 100644 --- a/arch/arm/mach-omap2/am33xx/Makefile +++ b/arch/arm/mach-omap2/am33xx/Makefile @@ -20,3 +20,5 @@ obj-y += board.o obj-y += mux.o obj-$(CONFIG_CLOCK_SYNTHESIZER)+= clk_synthesizer.o + +obj-$(CONFIG_AM33XX_CHILISOM) += chilisom.o diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c new file mode 100644 index 00..a594f6cf37 --- /dev/null +++ b/arch/arm/mach-omap2/am33xx/chilisom.c @@ -0,0 +1,185 @@ +/* + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2017, Grinn - http://grinn-global.com/ + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + +static struct module_pin_mux i2c0_pin_mux[] = { + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ + {-1}, +}; + +static struct module_pin_mux nand_pin_mux[] = { + {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ + {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ + {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ + {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ + {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ + {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ + {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ + {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ + {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ + {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ + {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ + {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ + {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ + {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ + {-1}, +}; + +static void enable_i2c0_pin_mux(void) +{ + configure_module_pin_mux(i2c0_pin_mux); +} + +void chilisom_enable_pin_mux(void) +{ + /* chilisom pin mux */ + configure_module_pin_mux(nand_pin_mux); +} + +static const struct ddr_data ddr3_chilisom_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, +}; + +static const struct
[U-Boot] [PATCH v2 2/2] board/chiliboard: Add support for chiliBoard
chiliBoard is a development board which uses chiliSOM as its base. Hardware specification: * chiliSOM (TI AM335x, DRAM, NAND) * Ethernet PHY (id 0) * USB host (usb1) * MicroSD slot (mmc0) Signed-off-by: Marcin Niestroj --- Changes v1 -> v2: * converted include/configs/chiliboard.h header to SPDX license identifier (suggested by Tom) * removed USB gadget, CMD_DFU options from chiliboard_defconfig arch/arm/Kconfig | 1 + arch/arm/mach-omap2/am33xx/Kconfig | 6 + board/grinn/chiliboard/Kconfig | 15 +++ board/grinn/chiliboard/MAINTAINERS | 6 + board/grinn/chiliboard/Makefile| 6 + board/grinn/chiliboard/README | 31 + board/grinn/chiliboard/board.c | 264 + configs/chiliboard_defconfig | 48 +++ include/configs/chiliboard.h | 220 +++ 9 files changed, 597 insertions(+) create mode 100644 board/grinn/chiliboard/Kconfig create mode 100644 board/grinn/chiliboard/MAINTAINERS create mode 100644 board/grinn/chiliboard/Makefile create mode 100644 board/grinn/chiliboard/README create mode 100644 board/grinn/chiliboard/board.c create mode 100644 configs/chiliboard_defconfig create mode 100644 include/configs/chiliboard.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2554a2cd14..3421f273b5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1046,6 +1046,7 @@ source "board/freescale/mx53loco/Kconfig" source "board/freescale/mx53smd/Kconfig" source "board/freescale/s32v234evb/Kconfig" source "board/freescale/vf610twr/Kconfig" +source "board/grinn/chiliboard/Kconfig" source "board/gumstix/pepper/Kconfig" source "board/h2200/Kconfig" source "board/hisilicon/hikey/Kconfig" diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index b1a0f0f356..57e1a93211 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -59,6 +59,12 @@ config TARGET_BAV335X For more information, visit: http://birdland.com/oem +config TARGET_CHILIBOARD + bool "Grinn chiliBoard" + select AM33XX_CHILISOM + select DM + select DM_SERIAL + config TARGET_CM_T335 bool "Support cm_t335" select DM diff --git a/board/grinn/chiliboard/Kconfig b/board/grinn/chiliboard/Kconfig new file mode 100644 index 00..20056e81a1 --- /dev/null +++ b/board/grinn/chiliboard/Kconfig @@ -0,0 +1,15 @@ +if TARGET_CHILIBOARD + +config SYS_BOARD + default "chiliboard" + +config SYS_VENDOR + default "grinn" + +config SYS_CONFIG_NAME + default "chiliboard" + +config SYS_SOC + default "am33xx" + +endif diff --git a/board/grinn/chiliboard/MAINTAINERS b/board/grinn/chiliboard/MAINTAINERS new file mode 100644 index 00..56b306f84c --- /dev/null +++ b/board/grinn/chiliboard/MAINTAINERS @@ -0,0 +1,6 @@ +CHILIBOARD +M: Marcin Niestroj +S: Maintained +F: board/grinn/chiliboard/ +F: include/configs/chiliboard.h +F: configs/chiliboard_defconfig diff --git a/board/grinn/chiliboard/Makefile b/board/grinn/chiliboard/Makefile new file mode 100644 index 00..865968d1a7 --- /dev/null +++ b/board/grinn/chiliboard/Makefile @@ -0,0 +1,6 @@ +# (C) Copyright 2017 Grinn +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := board.o diff --git a/board/grinn/chiliboard/README b/board/grinn/chiliboard/README new file mode 100644 index 00..cea4c1d42e --- /dev/null +++ b/board/grinn/chiliboard/README @@ -0,0 +1,31 @@ +How to use U-Boot on Grinn's chiliBoard +-- + +- Build U-Boot for chiliBoard: + +$ make mrproper +$ make chiliboard_defconfig +$ make + +This will generate the SPL image called MLO and the u-boot.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=MLO of=/dev/mmcblk0 bs=128k; sync + +- Flash the u-boot.img image into the micro SD card: + +sudo dd if=u-boot.img of=/dev/mmcblk0 bs=128k seek=3; sync + +- Jumper settings: + +S2: 1 1 1 0 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Insert the micro SD card in the board. + +- Connect USB cable between chiliBoard and the PC for the power and console. + +- U-Boot messages should come up. diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c new file mode 100644 index 00..b0015f1663 --- /dev/null +++ b/board/grinn/chiliboard/board.c @@ -0,0 +1,264 @@ +/* + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2017, Grinn - http://grinn-global.com/ + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +static __maybe_unused struct ctrl_dev *cdev = + (struct ctrl_dev *)CTRL_DEVI
Re: [U-Boot] [PATCH v2 2/2] board/chiliboard: Add support for chiliBoard
On Tue, Jan 24, 2017 at 06:51:52PM +0100, Marcin Niestroj wrote: > chiliBoard is a development board which uses chiliSOM as its base. > > Hardware specification: > * chiliSOM (TI AM335x, DRAM, NAND) > * Ethernet PHY (id 0) > * USB host (usb1) > * MicroSD slot (mmc0) > > Signed-off-by: Marcin Niestroj > --- > Changes v1 -> v2: > * converted include/configs/chiliboard.h header to SPDX license >identifier (suggested by Tom) > * removed USB gadget, CMD_DFU options from chiliboard_defconfig Based on these points: > +++ b/board/grinn/chiliboard/MAINTAINERS > @@ -0,0 +1,6 @@ > +CHILIBOARD > +M: Marcin Niestroj > +S: Maintained > +F: board/grinn/chiliboard/ > +F: include/configs/chiliboard.h > +F: configs/chiliboard_defconfig Add 'arch/arm/mach-omap2/am33xx/chilisom.c' here too. [snip] > +#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) > &&\ > + defined(CONFIG_SPL_BUILD)) || \ > + ((defined(CONFIG_DRIVER_TI_CPSW) || \ > + defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \ > + !defined(CONFIG_SPL_BUILD)) There's still some gadget references here. And are you supporting cpsw eth in SPL on the SOM? If not, CONFIG_SPL_ETH_SUPPORT can go too. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] ARM: am335x: Add support for chiliSOM
On Tue, Jan 24, 2017 at 06:51:51PM +0100, Marcin Niestroj wrote: > chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/). > It can't exists on its own, but will be used as part of other boards. > > Hardware specification: > * TI AM335x processor > * 128M, 256M or 512M DDR3 memory > * up to 256M NAND > > We place source inside arch/arm/mach-omap2/ directory and make it > possible to reuse initialization code (i.e. DDR, NAND init) for all > boards that use it. > > Signed-off-by: Marcin Niestroj Reviewed-by: Tom Rini -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Falcon boot breaks on DRA7 because of commit b9c8ccab "env_mmc.c: Allow environment to be used within SPL"
On Tue, Jan 24, 2017 at 06:04:47PM +0100, Jean-Jacques Hiblot wrote: > > > On 24/01/2017 16:46, Tom Rini wrote: > >>I had noticed that it's quite old indeed. I didn't mean that it's a > >>regression. I'm just puzzled by the commit. what is its purpose ? > >>why is SPL not using CONFIG_SYS_MMC_ENV_DEV ? > >Because in SPL we do not have both MMC devices initialized. > That is not always the case. Actually in spl_mmc.c the code requires > us to register more than one MMC device to work properly when > multiple MMC boot devices can be used (see > spl_mmc_get_device_index()) > I did the test of registering only MMC2 when booting from eMMC, the > SPL fails because it can't find device 1: > Trying to boot from MMC2_2 > MMC Device 1 not found > spl: could not find mmc device. error: -19 > > >We register > >the one we booted from and thus it is device 0 to U-Boot in this case. > >I suspect the rest of the issues stem from this quirk, or something > >having broken around this quirk. Thanks! Right. So I suspect the problem is that some level of the env_mmc.c code needs to be adapted again for the change in how SPL now works with the possibility of multiple devices. It's possible that the change you found is the right fix, please investigate a bit more and confirm things before submitting a proper patch, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 3/9] ARM: stm32: cleanup stm32f7 files
Hi, > -Original Message- > From: Michael Kurz [mailto:michi.k...@gmail.com] > Sent: Sunday, January 22, 2017 7:04 AM > To: u-boot@lists.denx.de > Cc: Michael Kurz ; Vikas MANOCHA > ; Albert Aribaud > ; Toshifumi NISHINAGA ; > Joe Hershberger > Subject: [PATCH v4 3/9] ARM: stm32: cleanup stm32f7 files > > Cleanup stm32f7 files: > - use BIT macro > - use GENMASK macro > - use rcc struct instead of macro additions > > Add missing stm32f7 register in rcc struct > > Signed-off-by: Michael Kurz Acked-by: Vikas MANOCHA Cheers, Vikas > > --- > > Changes in v4: > - Split struct stm32_rcc_regs into two structs (common and stm32f7 specific) > > Changes in v3: > - Removed 'prefix all constants with STM32_' > - Reverted move of header into source file (rcc.h -> clock.c) > > Changes in v2: > - Add cleanup patch > > arch/arm/include/asm/arch-stm32f7/fmc.h| 6 +- > arch/arm/include/asm/arch-stm32f7/gpt.h| 6 +- > arch/arm/include/asm/arch-stm32f7/rcc.h| 50 ++ > arch/arm/include/asm/arch-stm32f7/stm32.h | 12 ++- > arch/arm/mach-stm32/stm32f7/clock.c| 154 > - > board/st/stm32f746-disco/stm32f746-disco.c | 7 +- > 6 files changed, 111 insertions(+), 124 deletions(-) > > diff --git a/arch/arm/include/asm/arch-stm32f7/fmc.h > b/arch/arm/include/asm/arch-stm32f7/fmc.h > index 7dd5077..d61a86f 100644 > --- a/arch/arm/include/asm/arch-stm32f7/fmc.h > +++ b/arch/arm/include/asm/arch-stm32f7/fmc.h > @@ -58,12 +58,12 @@ struct stm32_fmc_regs { > #define FMC_SDCMR_MODE_SELFREFRESH 5 > #define FMC_SDCMR_MODE_POWERDOWN 6 > > -#define FMC_SDCMR_BANK_1 (1 << 4) > -#define FMC_SDCMR_BANK_2 (1 << 3) > +#define FMC_SDCMR_BANK_1 BIT(4) > +#define FMC_SDCMR_BANK_2 BIT(3) > > #define FMC_SDCMR_MODE_REGISTER_SHIFT9 > > -#define FMC_SDSR_BUSY(1 << 5) > +#define FMC_SDSR_BUSYBIT(5) > > #define FMC_BUSY_WAIT() do { \ > __asm__ __volatile__ ("dsb" : : : "memory"); \ diff --git > a/arch/arm/include/asm/arch-stm32f7/gpt.h > b/arch/arm/include/asm/arch-stm32f7/gpt.h > index 903bdf6..e9e0c14 100644 > --- a/arch/arm/include/asm/arch-stm32f7/gpt.h > +++ b/arch/arm/include/asm/arch-stm32f7/gpt.h > @@ -38,8 +38,8 @@ struct gpt_regs *const gpt1_regs_ptr = > (struct gpt_regs *)TIM2_BASE; > > /* Timer control1 register */ > -#define GPT_CR1_CEN 0x0001 > -#define GPT_MODE_AUTO_RELOAD (1 << 7) > +#define GPT_CR1_CEN BIT(0) > +#define GPT_MODE_AUTO_RELOAD BIT(7) > > /* Auto reload register for free running config */ > #define GPT_FREE_RUNNING 0x > @@ -48,6 +48,6 @@ struct gpt_regs *const gpt1_regs_ptr = > #define CONFIG_STM32_HZ 1000 > > /* Timer Event Generation registers */ > -#define TIM_EGR_UG (1 << 0) > +#define TIM_EGR_UG BIT(0) > > #endif > diff --git a/arch/arm/include/asm/arch-stm32f7/rcc.h > b/arch/arm/include/asm/arch-stm32f7/rcc.h > index 8bfb7b6..184c366 100644 > --- a/arch/arm/include/asm/arch-stm32f7/rcc.h > +++ b/arch/arm/include/asm/arch-stm32f7/rcc.h > @@ -34,31 +34,43 @@ > #define RCC_PLLSAICFG0x88/* PLLSAI configuration */ > #define RCC_DCKCFG1 0x8C/* dedicated clocks configuration register */ > #define RCC_DCKCFG2 0x90/* dedicated clocks configuration register */ > +/* > + * RCC AHB1ENR specific definitions > + */ > +#define RCC_AHB1ENR_GPIO_A_ENBIT(0) > +#define RCC_AHB1ENR_GPIO_B_ENBIT(1) > +#define RCC_AHB1ENR_GPIO_C_ENBIT(2) > +#define RCC_AHB1ENR_GPIO_D_ENBIT(3) > +#define RCC_AHB1ENR_GPIO_E_ENBIT(4) > +#define RCC_AHB1ENR_GPIO_F_ENBIT(5) > +#define RCC_AHB1ENR_GPIO_G_ENBIT(6) > +#define RCC_AHB1ENR_GPIO_H_ENBIT(7) > +#define RCC_AHB1ENR_GPIO_I_ENBIT(8) > +#define RCC_AHB1ENR_GPIO_J_ENBIT(9) > +#define RCC_AHB1ENR_GPIO_K_ENBIT(10) > +#define RCC_AHB1ENR_ETHMAC_ENBIT(25) > +#define RCC_AHB1ENR_ETHMAC_TX_EN BIT(26) > +#define RCC_AHB1ENR_ETHMAC_RX_EN BIT(27) > +#define RCC_AHB1ENR_ETHMAC_PTP_ENBIT(28) > > -#define RCC_APB1ENR_TIM2EN (1 << 0) > -#define RCC_APB1ENR_PWREN(1 << 28) > +/* > + * RCC AHB3ENR specific definitions > + */ > +#define RCC_AHB3ENR_FMC_EN BIT(0) > > /* > - * RCC USART specific definitions > + * RCC APB1ENR specific definitions > */ > -#define RCC_ENR_USART1EN (1 << 4) > -#define RCC_ENR_USART2EN (1 << 17) > -#define RCC_ENR_USART3EN (1 << 18) > -#define RCC_ENR_USART6EN (1 << 5) > +#define RCC_APB1ENR_TIM2EN BIT(0) > +#define RCC_APB1ENR_USART2EN BIT(17) > +#define RCC_APB1ENR_USART3EN BIT(18) > +#define
Re: [U-Boot] [PATCH v4 0/9] ARM: stm32: add network and qspi driver support to stm32f746-disco board
Hi Michael, > -Original Message- > From: Michael Kurz [mailto:michi.k...@gmail.com] > Sent: Sunday, January 22, 2017 7:04 AM > To: u-boot@lists.denx.de > Cc: Michael Kurz ; Heiko Schocher ; > Michal Simek ; Simon Glass > ; Vikas MANOCHA ; York Sun > ; Lokesh Vutla > ; Masahiro Yamada ; Purna > Chandra Mandal > ; Ian Campbell ; Jagan Teki > ; Hans de Goede > ; Albert Aribaud ; Jagan Teki > ; Joe > Hershberger ; Prabhakar Kushwaha > ; Daniel Schwierzeck > ; Toshifumi NISHINAGA > ; Stephen Warren > Subject: [PATCH v4 0/9] ARM: stm32: add network and qspi driver support to > stm32f746-disco board > > This series adds support for the network and the qspi devices found on the > stm32f746 controller and enables those devices on the > stm32f746-disco board. Looks good to me. Cheers, Vikas > > Changes in v4: > - Correct commit message and add linux source file path > - Update to current master > - Fix missing newline at end of file > - Removed currently not used entries from dts file > - Add binding document for qspi driver > - Disable qspi quad interface in dts file here > - Split struct stm32_rcc_regs into two structs (common and stm32f7 specific) > - Reword commit message > - Add Acked-by tag to 'fix stm32f7 sdram fmc base address' > - Add Reviewed-by tag to 'use clock setup function defined in clock.c' > - Remove dts patch as the dts import patch now disables the quad interface > > Changes in v3: > - Split pin control files of from device tree patch > - Add Acked-by tag to 'add stm32f746 device tree pin control files' > - Split pin control files of from device tree patch > - Add Acked-by tag to 'add stm32f746-disco device tree files' > - Removed 'prefix all constants with STM32_' > - Reverted move of header into source file (rcc.h -> clock.c) > - Split cleanup patch > - Split clock setup changes of from cleanup patch > - Add Acked-by tag to 'add designware mac glue code for stm32' > - Moved qspi rcc bits into rcc header > - Drop 'add missing flag to micron/stm N25Q128 flash chips' patch > > Changes in v2: > - Add cleanup patch > - Replaced bit shifts and masks with BIT() and GENMASK() macro > - Moved STM32_SYSCFG_BASE into stm32.h header > - Add Acked-by tag to 'net: phy: add SMSC LAN8742 phy' > - Replaced bit shifts and masks with BIT() and GENMASK() macro > > Michael Kurz (9): > ARM: DTS: stm32: add stm32f746 device tree pin control files > ARM: DTS: stm32: add stm32f746-disco device tree files > ARM: stm32: cleanup stm32f7 files > ARM: stm32: fix stm32f7 sdram fmc base address > ARM: stm32: use clock setup function defined in clock.c > net: stm32: add designware mac glue code for stm32 > net: phy: add SMSC LAN8742 phy > ARM: stm32: enable support for smsc phy on stm32f746-disco board > ARM: SPI: stm32: add stm32f746 qspi driver > > arch/arm/dts/Makefile|2 + > arch/arm/dts/armv7-m.dtsi| 25 + > arch/arm/dts/stm32f746-disco.dts | 96 ++ > arch/arm/dts/stm32f746.dtsi | 79 ++ > arch/arm/include/asm/arch-stm32f7/fmc.h |9 +- > arch/arm/include/asm/arch-stm32f7/gpt.h |6 +- > arch/arm/include/asm/arch-stm32f7/rcc.h | 77 +- > arch/arm/include/asm/arch-stm32f7/stm32.h| 14 +- > arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 10 +- > arch/arm/include/asm/arch-stm32f7/syscfg.h | 38 + > arch/arm/mach-stm32/stm32f7/clock.c | 171 ++- > arch/arm/mach-stm32/stm32f7/timer.c |4 +- > board/st/stm32f746-disco/stm32f746-disco.c | 124 +- > configs/stm32f746-disco_defconfig| 23 +- > doc/device-tree-bindings/spi/spi-stm32-qspi.txt | 39 + > drivers/net/designware.c |1 + > drivers/net/phy/smsc.c | 12 + > drivers/spi/Kconfig |8 + > drivers/spi/Makefile |1 + > drivers/spi/stm32_qspi.c | 628 ++ > include/configs/stm32f746-disco.h| 10 +- > include/dt-bindings/pinctrl/stm32f746-pinfunc.h | 1324 > ++ > 22 files changed, 2540 insertions(+), 161 deletions(-) create mode 100644 > arch/arm/dts/armv7-m.dtsi create mode 100644 > arch/arm/dts/stm32f746-disco.dts create mode 100644 > arch/arm/dts/stm32f746.dtsi create mode 100644 > arch/arm/include/asm/arch-stm32f7/syscfg.h > create mode 100644 doc/device-tree-bindings/spi/spi-stm32-qspi.txt > create mode 100644 drivers/spi/stm32_qspi.c create mode 100644 > include/dt-bindings/pinctrl/stm32f746-pinfunc.h > > -- > 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ext4: crash when writing a file
On 01/23/2017 05:38 PM, Brüns, Stefan wrote: > On Freitag, 20. Januar 2017 18:32:49 CET Sébastien Szymanski wrote: > [...] >> Then under the sandbox I do the following: >> >> U-Boot 2017.01-2-g558e41e-dirty (Jan 20 2017 - 16:19:47 +0100) >> >> DRAM: 256 MiB >> MMC: >> Using default environment >> >> In:serial >> Out: serial >> Err: serial >> SCSI: Net: No ethernet found. >> IDE: Bus 0: not available >> >> => host bind 0 /tftproot/rootfs.raw >> >> => ls host 0:2 >>1024 . >>1024 .. >> 16384 lost+found >>1024 var >>1024 run >>1024 root >>1024 media >>1024 mnt >>1024 tmp >> 3 lib32 >>1024 usr >>1024 proc >>1024 dev >>1024 boot >>1024 sys >>3072 sbin >>3072 bin >> 11 linuxrc >>1024 etc >>1024 opt >>3072 lib >> >> => ls host 0:2 /boot >>1024 . >>1024 .. >>26909 imx6ul-opos6uldev.dtb >> 1 dtbs >> 5359984 opos6ul-linux.bin >> >> => host load hostfs - 0 /tftproot/opos6ul-linux.bin >> 5359984 bytes read in 2 ms (2.5 GiB/s) >> >> => printenv filesize >> filesize=51c970 >> >> => ext4write host 0:2 0 /boot/opos6ul-linux.bin ${filesize} >> File System is consistent >> file found, deleting >> update journal finished >> File System is consistent >> update journal finished >> Segmentation fault > > As you can repeat this under sandbox, the next step would be to run sandbox > under gdb, e.g.: > $> gdb --args sandbox -c "host bind 0 /tftproot/rootfs.raw ; host load hostfs > - 0 /tftproot/opos6ul-linux.bin ; ext4write host 0:2 0 > /boot/opos6ul-linux.bin > ${filesize}" Yes, I did this and it crashes exactly where I pointed out in my first post: (gdb) run Starting program: /home/sszy/development/armadeus-u-boot/u-boot -c host\ bind\ 0\ /tftproot/rootfs.raw\;\ host\ load\ hostfs\ -\ 0\ /tftproot/opos6ul-linux.bin\;\ ext4write\ host\ 0:2\ 0\ /boot/opos6ul-linux.bin\ \$\{filesize\} [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib64/libthread_db.so.1". U-Boot 2017.01-2-g558e41e-dirty (Jan 24 2017 - 10:44:13 +0100) DRAM: 256 MiB MMC: Using default environment In:serial Out: serial Err: serial SCSI: Net: No ethernet found. IDE: Bus 0: not available 5359984 bytes read in 2 ms (2.5 GiB/s) File System is consistent file found, deleting update journal finished File System is consistent update journal finished Program received signal SIGSEGV, Segmentation fault. free (mem=) at common/dlmalloc.c:1586 1586 if (!(inuse_bit_at_offset(next, nextsz))) /* consolidate forward */ (gdb) bt #0 free (mem=) at common/dlmalloc.c:1586 #1 0x0044e9a3 in ext4fs_deinit () at fs/ext4/ext4_write.c:722 #2 0x0044fd85 in ext4fs_write (fname=, buffer=, sizebytes=sizebytes@entry=5359984) at fs/ext4/ext4_write.c:980 #3 0x0044fe5f in ext4_write_file (filename=, buf=, offset=, len=5359984, actwrite=0x7fffd5b8) at fs/ext4/ext4_write.c:1012 #4 0x0044a41b in fs_write (filename=filename@entry=0x74887280 "/boot/opos6ul-linux.bin", addr=addr@entry=0, offset=offset@entry=0, len=len@entry=5359984, actwrite=actwrite@entry=0x7fffd5b8) at fs/fs.c:325 #5 0x0044a7a3 in do_save (cmdtp=, flag=, argc=6, argv=, fstype=) at fs/fs.c:478 Regards, > > Kind regards, > > Stefan > -- Sébastien Szymanski Software Engineer, Armadeus Systems sebastien.szyman...@armadeus.com Tel: +33 (0)9 72 29 41 44 Fax: +33 (0)9 72 28 79 26 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] arm: Clean up MACH_TYPE defines in config headers
A few boards were defining a MACH_TYPE_xxx name and value until it had been synced in officially. These values now are here so remove the config header defines. Signed-off-by: Tom Rini --- include/configs/am335x_igep0033.h | 1 - include/configs/apx4devkit.h | 1 - include/configs/dalmore.h | 2 -- include/configs/draco.h | 1 - include/configs/m28evk.h | 1 - include/configs/pcm051.h | 1 - include/configs/pepper.h | 1 - include/configs/pxm2.h| 1 - include/configs/rut.h | 1 - include/configs/sc_sps_1.h| 1 - include/configs/wandboard.h | 3 +-- 11 files changed, 1 insertion(+), 13 deletions(-) diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h index 16fb1ae8aa6a..7bf1f3bf5984 100644 --- a/include/configs/am335x_igep0033.h +++ b/include/configs/am335x_igep0033.h @@ -18,7 +18,6 @@ #include /* Mach type */ -#define MACH_TYPE_IGEP0033 4521/* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033 /* Clock defines */ diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h index babaf2671e36..48015445e3ea 100644 --- a/include/configs/apx4devkit.h +++ b/include/configs/apx4devkit.h @@ -16,7 +16,6 @@ /* System configurations */ #define CONFIG_MX28/* i.MX28 SoC */ -#define MACH_TYPE_APX4DEVKIT 3712 #define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT /* U-Boot Commands */ diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index a0f04f9ce33c..1fa445a94c85 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -32,8 +32,6 @@ #define CONFIG_SYS_MMC_ENV_PART2 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) -#define MACH_TYPE_DALMORE 4304/* not yet in mach-types.h */ - /* SPI */ #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED2400 diff --git a/include/configs/draco.h b/include/configs/draco.h index b4ca982e1843..838fdb549124 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -14,7 +14,6 @@ #define __CONFIG_DRACO_H #define CONFIG_SIEMENS_DRACO -#define MACH_TYPE_DRACO4314 #define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DRACO #include "siemens-am33x-common.h" diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 25884b41466d..7d2c88cfe614 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -9,7 +9,6 @@ /* System configurations */ #define CONFIG_MX28/* i.MX28 SoC */ -#define MACH_TYPE_M28EVK 3613 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK #define CONFIG_TIMESTAMP /* Print image info with timestamp */ diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index aff4635e90e6..abd00c483ea7 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -22,7 +22,6 @@ #include #define CONFIG_ENV_SIZE(128 << 10) /* 128 KiB */ -#define MACH_TYPE_PCM051 4144/* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_PCM051 /* set to negative value for no autoboot */ diff --git a/include/configs/pepper.h b/include/configs/pepper.h index 6034baa63410..9552dd1bcbba 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Mach type */ -#define MACH_TYPE_PEPPER 4207/* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_PEPPER #define CONFIG_ENV_SIZE(128 << 10) /* 128 KiB */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index d797a2ce4d7b..4776e97ed6a8 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -15,7 +15,6 @@ #define __CONFIG_PXM2_H #define CONFIG_SIEMENS_PXM2 -#define MACH_TYPE_PXM2 4309 #define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_PXM2 #include "siemens-am33x-common.h" diff --git a/include/configs/rut.h b/include/configs/rut.h index e5933b85ee12..1a939e9de74a 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -15,7 +15,6 @@ #define __CONFIG_RUT_H #define CONFIG_SIEMENS_RUT -#define MACH_TYPE_RUT 4316 #define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT #include "siemens-am33x-common.h" diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index 56a23a6ef00a..c23f665e1af3 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -11,7 +11,6 @@ /* System configuration */ #define CONFIG_MX28/* i.MX28 SoC */ -#define MACH_TYPE_SC_SPS_1 4172 #define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1 /* U-Boot Commands */ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 125c74ed1e95..11f3f5736d20 100644 --- a/inc
[U-Boot] [PATCH 1/2] arm: Remove unofficial mach-type number uses
We have a number of instances of platforms that define a MACH_TYPE_xxx value and number. We are currently synced with the latest vales from the Linux Kernel and in turn if numbers are not used there it is because they were never officially used anywhere. We drop all our instances of these numbers. Cc: Heiko Schocher Cc: Yegor Yefremov Cc: Gilles Gameiro Cc: Tom Warren Cc: Stephen Warren Cc: Manfred Rudigier Cc: "Christoph Rüdisser" Cc: Igor Grinberg Cc: Vladimir Zapolskiy Cc: Stefan Herbrechtsmeier Cc: Jason Cooper Cc: Walter Schweizer Cc: Ash Charles Cc: Raphael Assenat Cc: egnite GmbH Cc: Stefano Babic Cc: Ajay Bhargav Cc: Lukasz Dalek Cc: Simon Guinot Cc: Anatolij Gustschin Cc: Daniel Gorsulowski Cc: Fabio Estevam Cc: Peng Fan Cc: Evgeni Dobrev Cc: "Albert ARIBAUD (3ADEV)" Cc: Ilko Iliev Cc: Dave Purdy Cc: Stefan Roese Cc: Jaehoon Chung Cc: Minkyu Kang Cc: Javier Martinez Canillas Cc: Sjoerd Simons Cc: Masahiro Yamada Cc: Simon Glass Cc: Jagan Teki Cc: Lokesh Vutla Cc: Paul Kocialkowski Signed-off-by: Tom Rini --- board/LaCie/netspace_v2/netspace_v2.c | 2 ++ board/Marvell/gplugd/gplugd.c | 2 -- board/Seagate/nas220/nas220.c | 5 - board/esd/meesc/meesc.c | 9 +++-- board/gumstix/duovero/duovero.c | 1 - board/h2200/h2200.c | 2 -- board/quipos/cairo/cairo.c| 2 -- board/ronetix/pm9261/pm9261.c | 3 --- board/ronetix/pm9263/pm9263.c | 3 --- board/ronetix/pm9g45/pm9g45.c | 2 -- board/technexion/tao3530/tao3530.c| 2 -- include/configs/am335x_evm.h | 3 --- include/configs/am335x_shc.h | 19 --- include/configs/baltos.h | 3 --- include/configs/bav335x.h | 3 --- include/configs/beaver.h | 3 --- include/configs/calimain.h| 2 -- include/configs/cm_t335.h | 3 --- include/configs/devkit3250.h | 6 -- include/configs/dns325.h | 6 -- include/configs/dreamplug.h | 14 -- include/configs/ds109.h | 14 -- include/configs/duovero.h | 2 -- include/configs/eco5pk.h | 3 --- include/configs/ethernut5.h | 4 include/configs/exynos5250-common.h | 4 include/configs/exynos5420-common.h | 3 --- include/configs/flea3.h | 7 --- include/configs/gplugd.h | 11 --- include/configs/h2200.h | 3 --- include/configs/km/km_arm.h | 5 - include/configs/lacie_kw.h| 8 include/configs/mcx.h | 3 --- include/configs/meesc.h | 8 include/configs/mt_ventoux.h | 3 --- include/configs/mx6slevk.h| 3 --- include/configs/nas220.h | 6 -- include/configs/omap3_cairo.h | 4 include/configs/pm9261.h | 3 --- include/configs/pm9263.h | 3 --- include/configs/pm9g45.h | 3 --- include/configs/pogo_e02.h| 6 -- include/configs/tao3530.h | 2 -- include/configs/titanium.h| 3 --- include/configs/trats.h | 6 -- include/configs/twister.h | 4 include/configs/udoo.h| 3 --- include/configs/woodburn_common.h | 7 --- include/configs/work_92105.h | 7 --- 49 files changed, 5 insertions(+), 228 deletions(-) diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c index 17e629622ff7..21fff5fa7a8b 100644 --- a/board/LaCie/netspace_v2/netspace_v2.c +++ b/board/LaCie/netspace_v2/netspace_v2.c @@ -69,8 +69,10 @@ int board_early_init_f(void) int board_init(void) { +#ifdef CONFIG_MACH_TYPE /* Machine number */ gd->bd->bi_arch_number = CONFIG_MACH_TYPE; +#endif /* Boot parameters address */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c index c8c4ad2a9822..1786d14a58d2 100644 --- a/board/Marvell/gplugd/gplugd.c +++ b/board/Marvell/gplugd/gplugd.c @@ -75,8 +75,6 @@ int board_init(void) struct armd1apb2_registers *apb2_regs = (struct armd1apb2_registers *)ARMD1_APBC2_BASE; - /* arch number of Board */ - gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD; /* adress of boot parameters */ gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100; /* Assert PHY_RST# */ diff --git a/board/Seagate/nas220/nas220.c b/board/Seagate/nas220/nas220.c index d9a06273a319..5e55929a8b4f 100644 --- a/board/Seagate/nas220/nas220.c +++ b/board/Seagate/nas220/nas220.c @@ -72,11 +72,6 @@ int board_early_init_f(void) int board_init(void) { - /* -* arch number of board -*/ - gd->bd->bi_arch_number = MACH_TYPE_NAS22
Re: [U-Boot] [PATCH v2] powerpc/t2080: CPU erratum A-007907
On 10/24/2016 01:48 PM, Darwin Dingel wrote: > Core hang occurs when using L1 stashes. Workaround is to disable L1 > stashes so software uses L2 cache for stashes instead. > > Reviewed-by: Chris Packham > Signed-off-by: Darwin Dingel > Cc: York Sun > --- > Changes for v2: > - Enabled for T4240 and B4860 > Revised subject tag to mpc85xx instead of t2080. Move SYS_FSL_ERRATUM_A007907 to Kconfig. Applied to u-boot-mpc85xx master, awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc: Enable flush and invalidate dcache by range for MPC85xx
On 01/05/2017 08:30 PM, Tony O'Brien wrote: > Commit ac337168a unified functions to flush and invalidate dcache by > range. These two functions were no-ops for SoCs other than 4xx and > MPC86xx. Adding these functions seemed to be correct but introduced > issues in some drivers when the dcache was flushed. While the root > cause was under investigation, these functions were disabled in > Commit cb1629f91a for affected SoCs, including the MPC85xx, to make > the various drivers work. > > On the T208x USB stopped working after v2016.07 was pulled. After > re-enabling the dcache functions for the MPC85xx it started working > again. The USB and DPPA Ethernet drivers have been seen as > operational after this change but other drivers cannot be tested. > > Reviewed-by: Chris Packham > Signed-off-by: Tony O'Brien > Cc: Marek Vasut > Cc: York Sun > --- > The USB and Ethernet functionality has been tested on both the > T2080RDB and our own design but we don't have the hardware to test > any of the other drivers. We will wait and see if it causes us any > issues with other drivers. > arch/powerpc/lib/ppccache.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Applied to u-boot-mpc85xx master, awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc85xx: pci: Implement workaround for Erratum A007815
On 12/22/2016 08:37 AM, Mingkai Hu wrote: > > >> -Original Message- >> From: york sun >> Sent: Friday, December 02, 2016 1:24 AM >> To: Mingkai Hu >> Cc: Chris Packham ; Tony O'Brien >> ; u-boot >> Subject: Re: [U-Boot] [PATCH] mpc85xx: pci: Implement workaround for >> Erratum A007815 >> >> On 11/30/2016 11:51 PM, Chris Packham wrote: >>> (adding York) >>> >>> On Thu, Dec 1, 2016 at 4:20 PM, Tony O'Brien >>> wrote: The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller. Reviewed-by: Hamish Martin --- Note that this does not implement the whole fix for this erratum, just what is necessary for our implementation. Since we are using a fixed RC configuration, no support has been added for EP mode or any consideration of link-up/down events. Signed-off-by: Tony O'Brien --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 1 + arch/powerpc/include/asm/fsl_pci.h| 4 +++- drivers/pci/fsl_pci_init.c| 7 +++ 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 402a1ff..aabb56b 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -330,6 +330,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663 puts("Work-around for Erratum A009663 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + puts("Work-around for Erratum A007815 enabled\n"); #endif return 0; } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index c92bc1e..c298e44 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -785,6 +785,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013) #define >> CONFIG_SYS_FSL_ERRATUM_A006593 #define CONFIG_SYS_FSL_ERRATUM_A007186 #define CONFIG_SYS_FSL_ERRATUM_A006379 +#define CONFIG_SYS_FSL_ERRATUM_A007815 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define CONFIG_SYS_FSL_SFP_VER_3_0 >> >> Tony, >> >> The signed-off signature should be above the --- line. >> >> Mingkai, >> >> Please review this implementation. This erratum applies to T4240, T2080, >> LS1021A. >> > > Hi York and Tony, > > Sorry for delayed response. > > I think it's better to add the errata implementation for the layerscape > platform also. > > The layerscape driver code is drivers/pci/pcie_layerscape.c. We can help to > test the patch on the layerscape platform if Tony don't have the platform. Mingkai, I am going to merge the v2 patch. Please send a patch for Layerscape driver when you have it. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] arm: Remove unofficial mach-type number uses
Hi Tom, On 01/24/2017 11:31 PM, Tom Rini wrote: > We have a number of instances of platforms that define a MACH_TYPE_xxx > value and number. We are currently synced with the latest vales from > the Linux Kernel and in turn if numbers are not used there it is because > they were never officially used anywhere. We drop all our instances of > these numbers. [snip] > diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h > index a71f67c352bb..f9066e7521a1 100644 > --- a/include/configs/devkit3250.h > +++ b/include/configs/devkit3250.h > @@ -13,12 +13,6 @@ > #include > #include > > -/* > - * Define DevKit3250 machine type by hand until it lands in mach-types > - */ > -#define MACH_TYPE_DEVKIT3250 3697 > -#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250 > - in fact this is a registered ARM machine type for the board, please reference the list on http://www.arm.linux.org.uk/developer/machines/ This may impact some other boards from your list, but as for DevKit3250 board the MACH_TYPE is not in use, so please feel free to remove it. For devkit3250: Acked-by: Vladimir Zapolskiy > #define CONFIG_SYS_ICACHE_OFF > #define CONFIG_SYS_DCACHE_OFF > #if !defined(CONFIG_SPL_BUILD) -- With best wishes, Vladimir ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] arm: Remove unofficial mach-type number uses
[re-sending without a URL in it] On Wed, Jan 25, 2017 at 12:28:47AM +0200, Vladimir Zapolskiy wrote: > Hi Tom, > > On 01/24/2017 11:31 PM, Tom Rini wrote: > > We have a number of instances of platforms that define a MACH_TYPE_xxx > > value and number. We are currently synced with the latest vales from > > the Linux Kernel and in turn if numbers are not used there it is because > > they were never officially used anywhere. We drop all our instances of > > these numbers. > > [snip] > > > diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h > > index a71f67c352bb..f9066e7521a1 100644 > > --- a/include/configs/devkit3250.h > > +++ b/include/configs/devkit3250.h > > @@ -13,12 +13,6 @@ > > #include > > #include > > > > -/* > > - * Define DevKit3250 machine type by hand until it lands in mach-types > > - */ > > -#define MACH_TYPE_DEVKIT3250 3697 > > -#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250 > > - > > in fact this is a registered ARM machine type for the board, please > reference the list on http://www.arm.linux.org.uk/developer/machines/ So I talked with rmk about this quickly and the reduced list, which is what the kernel uses and I also wish to use is the reduced list of MACH_TYPE_xxx and the short version is that the reduced list only includes the MACH_TYPE_xxx values that were used in mainline rather than just registered. Perhaps instead of saying "officially used" I should make it clearer that it means used in the upstream linux kernel? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v4, 1/16] nand: sunxi: Fix modulo by zero error
Hello Maxime, Jagan, [as I was not subscribed to the u-boot mailing list from this email address yet, I could not properly reply, nor do I have my git-send-patch setup yet.] I tried the patch series and reproduced the sunxi-spl-with-ecc.bin flow on an A13 Olinuxino board with NAND. I think the fix for the modulo by 0 must also be applied to the nand_read_buffer() function as follows: diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c index 24c5dcc..f7d31bc 100644 --- a/drivers/mtd/nand/sunxi_nand_spl.c +++ b/drivers/mtd/nand/sunxi_nand_spl.c @@ -486,17 +486,24 @@ static int nand_detect_config(struct nfc_config *conf, u32 offs, void *dest) static int nand_read_buffer(struct nfc_config *conf, uint32_t offs, unsigned int size, void *dest) { - int first_seed, page, ret; + int first_seed = 0, page, ret; size = ALIGN(size, conf->page_size); page = offs / conf->page_size; - first_seed = page % conf->nseeds; + if (conf->randomize) + first_seed = page % conf->nseeds; With that fix, I could boot U-Boot through the U-Boot SPL, fully from NAND on an A13-Olinuxino-WiFi board with 8192/640. Regards, Leon. > From patchwork Mon Jan 23 13:46:43 2017 > Content-Type: text/plain; charset="utf-8" > MIME-Version: 1.0 > Content-Transfer-Encoding: 7bit > Subject: [U-Boot,v4,1/16] nand: sunxi: Fix modulo by zero error > From: Maxime Ripard > X-Patchwork-Id: 718570 > X-Patchwork-Delegate: jagannadh.t...@gmail.com > Message-Id: > <57745204e0a659bdcce05f77a5681fa0ab60690b.1485179128.git-series.maxime.rip...@free-electrons.com> > To: Jagan Teki , > Scott Wood > Cc: Thomas Petazzoni , > Alexander Kaplan , > Maxime Ripard , u-boot@lists.denx.de > Date: Mon, 23 Jan 2017 14:46:43 +0100 > > When trying to autodetect the ECC and randomization configurations, the > driver starts with a randomization disabled and no seeds. > > In this case, the number of seeds is obviously 0, and the randomize boolean > is set to false. > > However, the logic that retrieves the seed for a given page offset will > blindly use the number of seeds, without testing if the randomization is > enabled, basically doing a modulo by 0. > > As it turns out, the libgcc in the common toolchain returns 0 here, which > was our expected value in such a case, and why we would not detect it. > However, U-Boot's libgcc will for some reason return from the function > instead, resulting in an error to load the U-Boot binary in the SPL. > > Signed-off-by: Maxime Ripard > Acked-by: Boris Brezillon > Acked-by: Scott Wood > --- > drivers/mtd/nand/sunxi_nand_spl.c | 7 --- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/nand/sunxi_nand_spl.c > b/drivers/mtd/nand/sunxi_nand_spl.c > index 1ef7366d4c42..eed4472bdc34 100644 > --- a/drivers/mtd/nand/sunxi_nand_spl.c > +++ b/drivers/mtd/nand/sunxi_nand_spl.c > @@ -245,7 +245,7 @@ static int nand_read_page(const struct nfc_config *conf, > u32 offs, > { > dma_addr_t dst = (dma_addr_t)dest; > int nsectors = len / conf->ecc_size; > -u16 rand_seed; > +u16 rand_seed = 0; > u32 val; > int page; > > @@ -258,8 +258,9 @@ static int nand_read_page(const struct nfc_config *conf, > u32 offs, > /* clear ecc status */ > writel(0, SUNXI_NFC_BASE + NFC_ECC_ST); > > -/* Choose correct seed */ > -rand_seed = random_seed[page % conf->nseeds]; > +/* Choose correct seed if randomized */ > +if (conf->randomize) > +rand_seed = random_seed[page % conf->nseeds]; > > writel((rand_seed << 16) | (conf->ecc_strength << 12) | > (conf->randomize ? NFC_ECC_RANDOM_EN : 0) | > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mpc85xx: pci: Implement workaround for Erratum A007815
On 12/01/2016 12:22 PM, Tony O'Brien wrote: > The read-only-write-enable bit is set by default and must be cleared > to prevent overwriting read-only registers. This should be done > immediately after resetting the PCI Express controller. > > Reviewed-by: Hamish Martin > Signed-off-by: Tony O'Brien > > --- > Note that this does not implement the whole fix for this erratum, > just what is necessary for our implementation. Since we are using a > fixed RC configuration, no support has been added for EP mode or any > consideration of link-up/down events. > --- > arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++ > arch/powerpc/include/asm/config_mpc85xx.h | 1 + > arch/powerpc/include/asm/fsl_pci.h| 4 +++- > drivers/pci/fsl_pci_init.c| 7 +++ > 4 files changed, 14 insertions(+), 1 deletion(-) > Move SYS_FSL_ERRATUM_A007815 to Kconfig. Applied to u-boot-mpc85xx master, awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Please pull u-boot-mmc master
On Tue, Jan 24, 2017 at 06:37:35PM +0900, Jaehoon Chung wrote: > Dear Tom, > > Could you pull these patches on your master branch? > > The following changes since commit 0c9e85f67cd86d2d7a3424ea3ebff0e6db7a3915: > > Merge branch 'master' of git://git.denx.de/u-boot-uniphier (2017-01-22 > 17:07:48 -0500) > > are available in the git repository at: > > http://git.denx.de/u-boot-mmc.git master > > for you to fetch changes up to 919b485834a746cf839ccded41e456d17d57a31f: > > mmc: Print error code for mmc_complete_init failure (2017-01-23 15:37:42 > +0900) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/3] Kconfig: Migrate BOARD_LATE_INIT to a select
On Sun, Jan 22, 2017 at 07:43:11PM -0500, Tom Rini wrote: > This option should not really be user selectable. Note that on PowerPC > we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be > conditional on that. > > Signed-off-by: Tom Rini > Acked-by: Masahiro Yamada (for UniPhier) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v2] rpi: Fix device tree path on ARM64
On Mon, Jan 23, 2017 at 01:34:39AM +0200, Tuomas Tynkkynen wrote: > The directory structure of device tree files produced by the kernel's > 'make dtbs_install' is different on ARM64, the RPi3 device tree file is > in a 'broadcom' subdirectory there. > > Signed-off-by: Tuomas Tynkkynen > Acked-by: Stephen Warren Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/3] imx31_phycore: Split the eet variant out into a different TARGET
On Sun, Jan 22, 2017 at 07:43:09PM -0500, Tom Rini wrote: > Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and > make this a distinct config target. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST
On Sun, Jan 22, 2017 at 07:43:10PM -0500, Tom Rini wrote: > Introduce board/freescale/common/Kconfig so that we have a single place > for CONFIG options that are shared between ARM and PowerPC NXP platforms. > > Cc: York Sun > Signed-off-by: Tom Rini > Reviewed-by: York Sun Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] tools: Correct python building host tools
On Mon, Jan 23, 2017 at 11:44:33AM -0500, Tom Rini wrote: > When we have python building tools for the host it will not check HOSTXX > variables but only XX variables, for example LDFLAGS and not > HOSTLDFLAGS. > > Cc: Simon Glass > Reported-by: Heiko Schocher > Fixes: 1905c8fc711a ("build: Always build the libfdt python module") > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass > Tested-by: Simon Glass > Tested-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] mach-omap2: Cleanup secure boot media generation
On Mon, Jan 23, 2017 at 11:34:37AM -0600, Andrew F. Davis wrote: > Currently all secure media types of SPL are generated for all platforms, > all platforms do not need all types, only generate the media types valid > for each platform. > > Signed-off-by: Andrew F. Davis > Reviewed-by: Tom Rini > Tested-by: Lokesh Vutla Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] bootz/booti: relocate ramdisk if CONFIG_SYS_BOOT_RAMDISK_HIGH set
On Mon, Jan 23, 2017 at 04:51:45PM +0100, Cédric Schieli wrote: > In commit c2e7e72, the ramdisk relocation code was moved from > image_setup_linux to do_bootm, leaving the bootz and booti cases broken. > > This patch fixes both by adding the BOOTM_STATE_RAMDISK state in their > call to do_bootm_states if CONFIG_SYS_BOOT_RAMDISK_HIGH is set. > > Signed-off-by: Cédric Schieli > Reviewed-by: Rick Altherr > Tested-by: Masahiro Yamada Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: am57xx: cl-som-am57x: fix Ethernet
On Mon, Jan 23, 2017 at 01:14:18PM +0200, Uri Mashiach wrote: > The module is continuously rebooting with the following message: > Net: data abort > pc : [] lr : [] > reloc pc : [<80816f42>]lr : [<8080d32b>] > sp : fdf5ce48 ip : fdf5d79c fp : 0017 > r10: 8083cd58 r9 : fdf5cef0 r8 : fdf5d5d0 > r7 : 48485000 r6 : 40ff r5 : fdf5d6e0 r4 : fdf5d618 > r3 : fdf5d5b4 r2 : fdf5d5d0 r1 : 643a3631 r0 : fdf5d6e0 > Flags: nzCv IRQs off FIQs off Mode SVC_32 > Resetting CPU ... > > Modifications: > * Enable Ethernet configuration in the SPL. > * Update PINMUX of PHY enable GPIO. > > Signed-off-by: Uri Mashiach > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] travis-ci: Add swig and libpython-dev to the package list
On Mon, Jan 23, 2017 at 05:40:22PM -0500, Tom Rini wrote: > As part of 1905c8fc711a we introduced failures depending on if swig and > libpython-dev are installed or not. To provide coverage for this are of > code in the future ensure we have these packages installed. > > Signed-off-by: Tom Rini > Reviewed-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 00/13] sunxi: Allwinner H5 and OrangePi PC2 support
This is an updated version of the Allwinner H5 SoC support. Changes compared to version 1: - Add Maxime's ACKs - new patch 2 and 3 to rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY - renaming CONFIG symbol name for single core SoCs - fixing one checkpatch issue (some are left, though) - mentioning methodology and reason for missing data in DRAM driver - renaming shared config symbol to CONFIG_MACH_SUNXI_H3_H5 - updated to lastest origin/master Maxime, I couldn't come up with more information on the DRAM setup. The bits were mostly discovered by comparing register dumps and deeper meaning is not known (to me, at least). This will hopefully be resolved with the bigger DRAM driver rewrite ahead. checkpatch.pl is still complaining about the spaces in the MBUS defintion, however I prefer the improved readability using the horizontal alignment over being checkpatch-clean. Also the other structure definitions suffer from the same issue. If this is really needed to fix, feel free to do so during merging. Cheers, Andre. -- This series introduces support for the Allwinner H5 SoC with four Cortex-A53 cores. The SoC's peripherals are very similar to the H3, although the cores and the BROM/SRAM layout resembles the A64. The first 8 patches contain some fixes and refactoring, to make code sharing between the three mentioned SoCs easier. Patch 09/13 adds support for the H5 DRAM controller, by extending the already existing combined H3/A64 DRAM code. Patch 10/13 renames the existing CONFIG_MACH_SUN8I_H3 config symbol to let it be used by all peripheral code that can be shared between the H3 and H5. Patch 11/13 introduces the H5 SoC config option into Kconfig, which defines this shared symbol as well. Patch 12/13 adds an easy device tree, which actually uses the H3 .dtsi and overwrites nodes which are different. This is good enough for U-Boot, the DT will be changed anyway once we get the DT merged into the Linux kernel. The final patch then adds the defconfig for the OrangePi PC2 board. Since this board comes with soldered SPI flash, we enable support for it in the SPL. This has been tested by writing the SPI flash with some special sunxi-fel version. The BROM loaded and executed the SPL, which in turn loaded and executed U-Boot proper. Both parts are 64-bit only for now. Ethernet support is enabled, but fails at the moment since the EMAC driver does not support setting a GPIO to enable the external Gigabit PHY. At the moment this build suffers from the same problem as the A64: the ATF is missing, so Linux won't boot easily. With the RFC version of the SPL FIT extension series on the list, applied on top of this one this should now be solved. This series is on top of origin/master. Please have a look and let me know your opinion! Cheers, Andre. Andre Przywara (13): sunxi: fix ACTLR.SMP assembly routine ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY fsl: ls102x: remove redundant GENERIC_TIMER_CLK sunxi: simplify ACTLR.SMP bit set #ifdef sunxi: configs: merge sun9i and sun50i SPL memory definitions sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM sunxi: provide ARMv8 mem_map for every ARM64 board SPI: SPL: sunxi: fix 64-bit build sunxi: DRAM: add Allwinner H5 support sunxi: prepare for sharing MACH_SUN8I_H3 config symbol sunxi: introduce Allwinner H5 config option sunxi: dts: add basic OrangePi PC 2 device tree file sunxi: configs: add basic OrangePi PC 2 defconfig arch/arm/cpu/armv7/ls102xa/psci.S | 2 +- arch/arm/cpu/armv7/ls102xa/timer.c| 2 +- arch/arm/cpu/armv7/nonsec_virt.S | 4 +- arch/arm/cpu/armv7/sunxi/psci.c | 2 +- arch/arm/dts/Makefile | 2 + arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 4 +- arch/arm/include/asm/arch-sunxi/cpu.h | 1 + arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 +- arch/arm/include/asm/arch-sunxi/dram.h| 2 +- arch/arm/include/asm/arch-sunxi/spl.h | 2 +- arch/arm/mach-sunxi/Makefile | 2 +- arch/arm/mach-sunxi/board.c | 12 +-- arch/arm/mach-sunxi/clock_sun6i.c | 6 +- arch/arm/mach-sunxi/cpu_info.c| 2 + arch/arm/mach-sunxi/dram_sun8i_h3.c | 97 ++--- arch/arm/mach-sunxi/usb_phy.c | 4 +- board/sunxi/Kconfig | 36 ++- board/sunxi/MAINTAINERS | 5 + board/sunxi/board.c | 6 +- configs/orangepi_pc2_defconfig| 16 +++ drivers/mtd/spi/Kconfig | 2 +- drivers/mtd/spi/sunxi_spi_spl.c | 16 +-- drivers/net/sun8i_emac.c | 2 +- drivers/power/Kconfig | 4 +- drivers/usb/host/ehci-sunxi.c | 2 +- include/configs/exy
[U-Boot] [PATCH v2 03/13] fsl: ls102x: remove redundant GENERIC_TIMER_CLK
Some Freescale boards used an extra version of the constant to hold the Generic Timer frequency. This can easily be covered by the now unified COUNTER_FREQUENCY constant, so remove this extra variable from those boards. Signed-off-by: Andre Przywara --- arch/arm/cpu/armv7/ls102xa/psci.S | 2 +- arch/arm/cpu/armv7/ls102xa/timer.c | 2 +- include/configs/ls1021aiot.h | 5 - include/configs/ls1021aqds.h | 5 - include/configs/ls1021atwr.h | 5 - 5 files changed, 2 insertions(+), 17 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S b/arch/arm/cpu/armv7/ls102xa/psci.S index 3d41d37..e1dc5f3 100644 --- a/arch/arm/cpu/armv7/ls102xa/psci.S +++ b/arch/arm/cpu/armv7/ls102xa/psci.S @@ -37,7 +37,7 @@ .align 5 -#defineONE_MS (GENERIC_TIMER_CLK / 1000) +#defineONE_MS (COUNTER_FREQUENCY / 1000) #defineRESET_WAIT (30 * ONE_MS) .globl psci_version diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index e6a32ca..d5237d2 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -62,7 +62,7 @@ int timer_init(void) /* Enable System Counter */ writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); - freq = GENERIC_TIMER_CLK; + freq = COUNTER_FREQUENCY; asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); /* Set PL1 Physical Timer Ctrl */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index a126da4..39d7e23 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -38,11 +38,6 @@ #define CONFIG_CMD_EXT2 #endif -/* - * Generic Timer Definitions - */ -#define GENERIC_TIMER_CLK 1250 - #define CONFIG_SYS_CLK_FREQ1 #define CONFIG_DDR_CLK_FREQ1 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d60ea30..a51e722 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -28,11 +28,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -/* - * Generic Timer Definitions - */ -#define GENERIC_TIMER_CLK 1250 - #ifndef __ASSEMBLY__ unsigned long get_board_sys_clk(void); unsigned long get_board_ddr_clk(void); diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 5eacbde..8ec5a64 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -57,11 +57,6 @@ #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif -/* - * Generic Timer Definitions - */ -#define GENERIC_TIMER_CLK 1250 - #define CONFIG_SYS_CLK_FREQ1 #define CONFIG_DDR_CLK_FREQ1 -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/13] ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY
Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara --- arch/arm/cpu/armv7/nonsec_virt.S | 4 ++-- arch/arm/cpu/armv7/sunxi/psci.c | 2 +- board/sunxi/board.c | 6 +++--- include/configs/exynos-common.h | 2 +- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- include/configs/mx7_common.h | 2 +- include/configs/sun50i.h | 1 - include/configs/sunxi-common.h | 2 +- scripts/config_whitelist.txt | 1 - 11 files changed, 12 insertions(+), 14 deletions(-) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 95ce938..e39aba7 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -188,11 +188,11 @@ ENTRY(_nonsec_init) * we do this here instead. * But first check if we have the generic timer. */ -#ifdef CONFIG_TIMER_CLK_FREQ +#ifdef COUNTER_FREQUENCY mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 and r0, r0, #CPUID_ARM_GENTIMER_MASK@ mask arch timer bits cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT) - ldreq r1, =CONFIG_TIMER_CLK_FREQ + ldreq r1, =COUNTER_FREQUENCY mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ #endif diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index 766b8c7..104dc90 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -46,7 +46,7 @@ static u32 __secure cp15_read_cntp_ctl(void) return val; } -#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000) +#define ONE_MS (COUNTER_FREQUENCY / 1000) static void __secure __mdelay(u32 ms) { diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 5365638..b966012 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -100,14 +100,14 @@ int board_init(void) * we avoid the risk of writing to it. */ asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq)); - if (freq != CONFIG_TIMER_CLK_FREQ) { + if (freq != COUNTER_FREQUENCY) { debug("arch timer frequency is %d Hz, should be %d, fixing ...\n", - freq, CONFIG_TIMER_CLK_FREQ); + freq, COUNTER_FREQUENCY); #ifdef CONFIG_NON_SECURE printf("arch timer frequency is wrong, but cannot adjust it\n"); #else asm volatile("mcr p15, 0, %0, c14, c0, 0" -: : "r"(CONFIG_TIMER_CLK_FREQ)); +: : "r"(COUNTER_FREQUENCY)); #endif } } diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index cdbe154..0d28797 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -24,7 +24,7 @@ /* input clock of PLL: 24MHz input clock */ #define CONFIG_SYS_CLK_FREQ2400 -#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 69ba8bf..a126da4 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -258,7 +258,7 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR0x01ee0200 -#define CONFIG_TIMER_CLK_FREQ 1250 +#define COUNTER_FREQUENCY 1250 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 031dce7..d60ea30 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -515,7 +515,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR0x01ee0200 -#define CONFIG_TIMER_CLK_FREQ 1250 +#define COUNTER_FREQUENCY 1250 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1f179f4..5eacbde 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -385,7 +385,7 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR0x01ee0200 -#define CONFIG_TIMER_CLK_FREQ 1250 +#define COUNTER_FREQUENCY 1250 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a
[U-Boot] [PATCH v2 01/13] sunxi: fix ACTLR.SMP assembly routine
If we take the liberty to use register r0 to perform our bit set, we should be nice enough to tell the compiler about it. Add r0 to the clobber list to avoid potential mayhem. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/mach-sunxi/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 52be5b0..58fbacb 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -188,7 +188,8 @@ void s_init(void) asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" "orr r0, r0, #1 << 6\n" - "mcr p15, 0, r0, c1, c0, 1\n"); + "mcr p15, 0, r0, c1, c0, 1\n" + ::: "r0"); #endif #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to some peripherals */ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 04/13] sunxi: simplify ACTLR.SMP bit set #ifdef
Instead of enumerating all SoC families that need that bit set, let's just express this more clearly: The SMP bits needs to be set on SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the other way round, so we use ! CPU_IS_UP and ! ARM64. Signed-off-by: Andre Przywara --- arch/arm/mach-sunxi/board.c | 5 + board/sunxi/Kconfig | 6 ++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 58fbacb..fdcf68e 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -180,10 +180,7 @@ void s_init(void) /* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */ #endif -#if defined CONFIG_MACH_SUN6I || \ -defined CONFIG_MACH_SUN7I || \ -defined CONFIG_MACH_SUN8I || \ -defined CONFIG_MACH_SUN9I +#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64) /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 37b4252..e795f12 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -27,6 +27,10 @@ config SPL_POWER_SUPPORT config SPL_SERIAL_SUPPORT default y +config ARM_CORTEX_CPU_IS_UP + bool + default n + # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig config SUNXI_GEN_SUN4I @@ -50,12 +54,14 @@ choice config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL config MACH_SUN5I bool "sun5i (Allwinner A13)" select CPU_V7 + select ARM_CORTEX_CPU_IS_UP select SUNXI_GEN_SUN4I select SUPPORT_SPL -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 05/13] sunxi: configs: merge sun9i and sun50i SPL memory definitions
For some reason we were pretty conservative when defining the maximum SPL size for the Allwinner A80(sun9i) SoC. According to the manual the SRAM A1 is even 40KB, but the BROM probably still has the 32 KiB load limit. For the sake of simplicity, merge the SPL memory definitions for the A64 and A80 SoCs, since both SoC share the BROM/SRAM A1 memory layout. This helps to further simplify this is in the next patch. Signed-off-by: Andre Przywara --- include/configs/sunxi-common.h | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1f7def0..ee85304 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -186,12 +186,9 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE #endif -#if defined(CONFIG_MACH_SUN9I) -#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE0x5fc0 /* ? KiB on sun9i */ -#elif defined(CONFIG_MACH_SUN50I) +#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB on sun50i */ +#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB on sun9/50i */ #else #define CONFIG_SPL_TEXT_BASE 0x40/* sram start+header */ #define CONFIG_SPL_MAX_SIZE0x5fc0 /* 24KB on sun4i/sun7i */ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 06/13] sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM
Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB, while the first SRAM region is mapped at address 0. With the extended physical memory support of the A80 this was changed, so the BROM is now at address 0 and the SRAM region starts right behind this at 64KB. This configuration seems to be called "high SRAM". Instead of enumerating the SoCs which have copied this configuration, let's call a spade a spade and introduce a Kconfig option for this setup. SoCs implementing this (A80, A64 and H5, so far), can then select this configuration. Simplify the config header definition on the way. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/include/asm/arch-sunxi/spl.h | 2 +- board/sunxi/Kconfig | 6 ++ include/configs/sunxi-common.h| 19 +++ 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h index 5d7ab55..831d0c0 100644 --- a/arch/arm/include/asm/arch-sunxi/spl.h +++ b/arch/arm/include/asm/arch-sunxi/spl.h @@ -12,7 +12,7 @@ #define SPL_SIGNATURE "SPL" /* marks "sunxi" SPL header */ #define SPL_HEADER_VERSION 1 -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) +#ifdef CONFIG_SUNXI_HIGH_SRAM #define SPL_ADDR 0x1 #else #define SPL_ADDR 0x0 diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index e795f12..5a71050 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -31,6 +31,10 @@ config ARM_CORTEX_CPU_IS_UP bool default n +config SUNXI_HIGH_SRAM + bool + default n + # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig config SUNXI_GEN_SUN4I @@ -124,6 +128,7 @@ config MACH_SUN8I_H3 config MACH_SUN9I bool "sun9i (Allwinner A80)" select CPU_V7 + select SUNXI_HIGH_SRAM select SUNXI_GEN_SUN6I select SUPPORT_SPL @@ -131,6 +136,7 @@ config MACH_SUN50I bool "sun50i (Allwinner A64)" select ARM64 select SUNXI_GEN_SUN6I + select SUNXI_HIGH_SRAM select SUPPORT_SPL endchoice diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index ee85304..cc31ba8 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -86,7 +86,7 @@ #define CONFIG_SPL_BSS_MAX_SIZE0x0008 /* 512 KiB */ -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) +#ifdef CONFIG_SUNXI_HIGH_SRAM /* * The A80's A1 sram starts at 0x0001 rather then at 0x and is * slightly bigger. Note that it is possible to map the first 32 KiB of the @@ -186,29 +186,24 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE #endif -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) +#ifdef CONFIG_SUNXI_HIGH_SRAM #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB on sun9/50i */ +#define CONFIG_SPL_MAX_SIZE0x7fc0 /* 32 KiB */ +#define LOW_LEVEL_SRAM_STACK 0x00018000 #else #define CONFIG_SPL_TEXT_BASE 0x40/* sram start+header */ #define CONFIG_SPL_MAX_SIZE0x5fc0 /* 24KB on sun4i/sun7i */ +#define LOW_LEVEL_SRAM_STACK 0x8000 /* End of sram */ #endif +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + #ifndef CONFIG_ARM64 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" #endif #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ -#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) -/* FIXME: 40 KiB instead of 32 KiB ? */ -#define LOW_LEVEL_SRAM_STACK 0x00018000 -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#else -/* end of 32 KiB in sram */ -#define LOW_LEVEL_SRAM_STACK 0x8000 /* End of sram */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#endif /* I2C */ #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 07/13] sunxi: provide ARMv8 mem_map for every ARM64 board
Every armv8 board needs the memory map, so change the #ifdef to ARM64 to avoid enumerating every single board or SoC. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/mach-sunxi/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index fdcf68e..96764d1 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -40,7 +40,7 @@ struct fel_stash { struct fel_stash fel_stash __attribute__((section(".data"))); -#ifdef CONFIG_MACH_SUN50I +#ifdef CONFIG_ARM64 #include static struct mm_region sunxi_mem_map[] = { -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 10/13] sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 4 ++-- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++-- arch/arm/include/asm/arch-sunxi/dram.h| 2 +- arch/arm/mach-sunxi/Makefile | 2 +- arch/arm/mach-sunxi/board.c | 2 +- arch/arm/mach-sunxi/clock_sun6i.c | 6 +++--- arch/arm/mach-sunxi/usb_phy.c | 4 ++-- board/sunxi/Kconfig | 14 +- drivers/mtd/spi/Kconfig | 2 +- drivers/net/sun8i_emac.c | 2 +- drivers/power/Kconfig | 4 ++-- drivers/usb/host/ehci-sunxi.c | 2 +- 12 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 3f87672..1bfb48b 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -242,7 +242,7 @@ struct sunxi_ccm_reg { /* ahb_gate0 offsets */ #define AHB_GATE_OFFSET_USB_OHCI1 30 #define AHB_GATE_OFFSET_USB_OHCI0 29 -#ifdef CONFIG_MACH_SUN8I_H3 +#ifdef CONFIG_MACH_SUNXI_H3_H5 /* * These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call * them 0 - 2 like they were called on older SoCs. @@ -293,7 +293,7 @@ struct sunxi_ccm_reg { #define CCM_USB_CTRL_PHY1_CLK (0x1 << 9) #define CCM_USB_CTRL_PHY2_CLK (0x1 << 10) #define CCM_USB_CTRL_PHY3_CLK (0x1 << 11) -#ifdef CONFIG_MACH_SUN8I_H3 +#ifdef CONFIG_MACH_SUNXI_H3_H5 /* * These are OHCI1 - OHCI3 in the datasheet (OHCI0 is for the OTG) we call * them 0 - 2 like they were called on older SoCs. diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 3c85222..ea672fe 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -56,7 +56,7 @@ #define SUNXI_USB2_BASE0x01c1c000 #endif #ifdef CONFIG_SUNXI_GEN_SUN6I -#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) +#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) #define SUNXI_USBPHY_BASE 0x01c19000 #define SUNXI_USB0_BASE0x01c1a000 #define SUNXI_USB1_BASE0x01c1b000 @@ -94,7 +94,7 @@ #define SUNXI_KEYPAD_BASE 0x01c23000 #define SUNXI_TZPC_BASE0x01c23400 -#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3) || \ +#if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUNXI_H3_H5) || \ defined(CONFIG_MACH_SUN50I) /* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */ #define SUNXI_SIDC_BASE0x01c14000 diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index 53e6d47..1dc8220 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -24,7 +24,7 @@ #include #elif defined(CONFIG_MACH_SUN8I_A83T) #include -#elif defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) +#elif defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) #include #elif defined(CONFIG_MACH_SUN9I) #include diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 7daba11..efab481 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -48,7 +48,7 @@ obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o -obj-$(CONFIG_MACH_SUN8I_H3)+= dram_sun8i_h3.o +obj-$(CONFIG_MACH_SUNXI_H3_H5) += dram_sun8i_h3.o obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o obj-$(CONFIG_MACH_SUN50I) += dram_sun8i_h3.o endif diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 96764d1..5e03d03 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -98,7 +98,7 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_A33_GPB_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_A33_GPB_UART0); sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP); -#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_H3) +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNXI_H3_H5) sunxi_gpio_set_cfgpin(SUNXI_GPA(4), SUN8I_H3_GPA_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPA(5), SUN8I_H3_GPA_UART0); sunxi_gpio_set_pull(SUNXI_GPA(5), SUNXI_GPIO_PULL_UP); diff --git a/arch/arm/mach-sunxi/cloc
[U-Boot] [PATCH v2 09/13] sunxi: DRAM: add Allwinner H5 support
The DRAM controller in the Allwinner H5 SoC is again very similar to the one in the H3 and A64. Based on the existing socid parameter, add support for this controller by reusing the bulk of the code and only deviating where needed. These new bits set or cleared here and there have been mostly found by looking at DRAM register dumps after using the H5 boot0 and comparing them to what we set in the code. So for now it's mostly unclear what those bits actually mean - hence the missing names and comments. Also add the delay line parameters taken from the boot0 and libdram disassembly. Register setup differences between H5 and H3 are courtesy of Jens Kuske. Signed-off-by: Andre Przywara --- arch/arm/include/asm/arch-sunxi/cpu.h | 1 + arch/arm/mach-sunxi/dram_sun8i_h3.c | 97 +-- 2 files changed, 82 insertions(+), 16 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h index 6f96a97..e8e670e 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu.h +++ b/arch/arm/include/asm/arch-sunxi/cpu.h @@ -15,5 +15,6 @@ #define SOCID_A64 0x1689 #define SOCID_H3 0x1680 +#define SOCID_H5 0x1718 #endif /* _SUNXI_CPU_H */ diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c index 9f7cc7f..d681a9d 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c @@ -177,6 +177,34 @@ static void mctl_set_master_priority_a64(void) writel(0x8104, &mctl_com->mdfs_bwlr[2]); } +static void mctl_set_master_priority_h5(void) +{ + struct sunxi_mctl_com_reg * const mctl_com = + (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; + + /* enable bandwidth limit windows and set windows size 1us */ + writel(399, &mctl_com->tmr); + writel((1 << 16), &mctl_com->bwcr); + + /* set cpu high priority */ + writel(0x0001, &mctl_com->mapr); + + /* Port 2 is reserved per Allwinner's linux-3.10 source, yet +* they initialise it */ + MBUS_CONF( CPU, true, HIGHEST, 0, 300, 260, 150); + MBUS_CONF( GPU, true, HIGHEST, 0, 600, 400, 200); + MBUS_CONF(UNUSED, true, HIGHEST, 0, 512, 256, 96); + MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32); + MBUS_CONF(VE, true, HIGHEST, 0, 1900, 1500, 1000); + MBUS_CONF( CSI, true, HIGHEST, 0, 150, 120, 100); + MBUS_CONF( NAND, true,HIGH, 0, 256, 128, 64); + MBUS_CONF(SS, true, HIGHEST, 0, 256, 128, 64); + MBUS_CONF(TS, true, HIGHEST, 0, 256, 128, 64); + MBUS_CONF(DI, true,HIGH, 0, 1024, 256, 64); + MBUS_CONF(DE, true, HIGHEST, 3, 3400, 2400, 1024); + MBUS_CONF(DE_CFD, true, HIGHEST, 0, 600, 400, 200); +} + static void mctl_set_master_priority(uint16_t socid) { switch (socid) { @@ -186,6 +214,9 @@ static void mctl_set_master_priority(uint16_t socid) case SOCID_A64: mctl_set_master_priority_a64(); return; + case SOCID_H5: + mctl_set_master_priority_h5(); + return; } } @@ -256,7 +287,7 @@ static void mctl_set_timing_params(uint16_t socid, struct dram_para *para) /* set two rank timing */ clrsetbits_le32(&mctl_ctl->dramtmg[8], (0xff << 8) | (0xff << 0), - (0x66 << 8) | (0x10 << 0)); + ((socid == SOCID_H5 ? 0x33 : 0x66) << 8) | (0x10 << 0)); /* set PHY interface timing, write latency and read latency configure */ writel((0x2 << 24) | (t_rdata_en << 16) | (0x1 << 8) | @@ -391,7 +422,7 @@ static void mctl_sys_init(uint16_t socid, struct dram_para *para) CCM_DRAMCLK_CFG_DIV(1) | CCM_DRAMCLK_CFG_SRC_PLL11 | CCM_DRAMCLK_CFG_UPD); - } else if (socid == SOCID_H3) { + } else if (socid == SOCID_H3 || socid == SOCID_H5) { clock_set_pll5(CONFIG_DRAM_CLK * 2 * 100, false); clrsetbits_le32(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_DIV_MASK | @@ -410,7 +441,7 @@ static void mctl_sys_init(uint16_t socid, struct dram_para *para) setbits_le32(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_RST); udelay(10); - writel(0xc00e, &mctl_ctl->clken); + writel(socid == SOCID_H5 ? 0x8000 : 0xc00e, &mctl_ctl->clken); udelay(500); } @@ -434,7 +465,10 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) /* setting VTC, default disable all VT */ clrbits_le32(&mctl_ctl->pgcr[0], (1 << 30) | 0x3f); - clrsetbits_le32(&mctl_ctl->pgcr[1], 1 << 24, 1 << 26); + if (socid == SOCID_H5) + setbits_le32(&mctl_ctl->pgcr[1], (1 << 24) | (1 << 26)); + else + clrsetbits_le32(&mctl_ctl->pgcr[1], 1 << 24, 1 << 26); /* in
[U-Boot] [PATCH v2 11/13] sunxi: introduce Allwinner H5 config option
The Allwinner H5 Soc is bascially an H3 with high SRAM and ARMv8 cores. As the peripherals and the pinmuxing are almost identical, we piggy back on the shared MACH_SUN8I_H3_H5 config symbol. Signed-off-by: Andre Przywara --- arch/arm/mach-sunxi/cpu_info.c | 2 ++ board/sunxi/Kconfig| 10 ++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c index f1f6fd5..85633cc 100644 --- a/arch/arm/mach-sunxi/cpu_info.c +++ b/arch/arm/mach-sunxi/cpu_info.c @@ -91,6 +91,8 @@ int print_cpuinfo(void) puts("CPU: Allwinner A80 (SUN9I)\n"); #elif defined CONFIG_MACH_SUN50I puts("CPU: Allwinner A64 (SUN50I)\n"); +#elif defined CONFIG_MACH_SUN50I_H5 + puts("CPU: Allwinner H5 (SUN50I)\n"); #else #warning Please update cpu_info.c with correct CPU information puts("CPU: SUNXI Family\n"); diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index a63e176..87ec77e 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -56,6 +56,11 @@ config MACH_SUNXI_H3_H5 select SUNXI_GEN_SUN6I select SUPPORT_SPL +config MACH_SUN50I_H5 + bool + select SUNXI_HIGH_SRAM + select MACH_SUNXI_H3_H5 + choice prompt "Sunxi SoC Variant" optional @@ -143,6 +148,11 @@ config MACH_SUN50I select SUNXI_HIGH_SRAM select SUPPORT_SPL +config MACH_SUN50I_H5_64 + bool "sun50i (Allwinner H5)" + select ARM64 + select MACH_SUN50I_H5 + endchoice # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33" -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/13] SPI: SPL: sunxi: fix 64-bit build
Addresses passed on to readl and writel are expected to be of the same size as a pointer. Change the parameter types of sunxi_spi0_read_data() to make the compiler happy and allow a warning-free aarch64 compile. Signed-off-by: Andre Przywara Reviewed-by: Simon Glass --- drivers/mtd/spi/sunxi_spi_spl.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c index a24c115..852abd4 100644 --- a/drivers/mtd/spi/sunxi_spi_spl.c +++ b/drivers/mtd/spi/sunxi_spi_spl.c @@ -185,14 +185,14 @@ static void spi0_deinit(void) #define SPI_READ_MAX_SIZE 60 /* FIFO size, minus 4 bytes of the header */ static void sunxi_spi0_read_data(u8 *buf, u32 addr, u32 bufsize, -u32 spi_ctl_reg, -u32 spi_ctl_xch_bitmask, -u32 spi_fifo_reg, -u32 spi_tx_reg, -u32 spi_rx_reg, -u32 spi_bc_reg, -u32 spi_tc_reg, -u32 spi_bcc_reg) +ulong spi_ctl_reg, +ulong spi_ctl_xch_bitmask, +ulong spi_fifo_reg, +ulong spi_tx_reg, +ulong spi_rx_reg, +ulong spi_bc_reg, +ulong spi_tc_reg, +ulong spi_bcc_reg) { writel(4 + bufsize, spi_bc_reg); /* Burst counter (total bytes) */ writel(4, spi_tc_reg); /* Transfer counter (bytes to send) */ -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/13] sunxi: dts: add basic OrangePi PC 2 device tree file
The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC. Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi and changing the differing components accordingly. This is a preliminary device tree mostly for U-Boot's own sake, it is expected to be updated once the official DT gets accepted upstream. Signed-off-by: Andre Przywara --- arch/arm/dts/Makefile | 2 + arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 147 2 files changed, 149 insertions(+) create mode 100644 arch/arm/dts/sun50i-h5-orangepi-pc2.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6a7924e..73b06ea 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -292,6 +292,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h3-orangepi-plus.dtb \ sun8i-h3-orangepi-plus2e.dtb \ sun8i-h3-nanopi-neo.dtb +dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-orangepi-pc2.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts new file mode 100644 index 000..de60f78 --- /dev/null +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2016 ARM Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun8i-h3.dtsi" + +/ { + model = "OrangePi PC 2"; + compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5"; + + cpus { + cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + enable-method = "psci"; + }; + cpu@1 { + compatible = "arm,cortex-a53", "arm,armv8"; + enable-method = "psci"; + }; + cpu@2 { + compatible = "arm,cortex-a53", "arm,armv8"; + enable-method = "psci"; + }; + cpu@3 { + compatible = "arm,cortex-a53", "arm,armv8"; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0x4000 0x4000>; + }; + + aliases { + serial0 = &uart0; + ethernet0 = &emac; + }; + + soc { + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <330>; + regulator-max-microvolt = <330>; + }; + }; +}; + +&gic { + compatible = "arm,gic-400"; +}; + +&mmc0 { + compatible = "allwinner,sun50i-h5-mmc", +"all
[U-Boot] [PATCH v2 13/13] sunxi: configs: add basic OrangePi PC 2 defconfig
The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC. Add a (64-bit only) defconfig defining the required options to build the U-Boot proper. Signed-off-by: Andre Przywara --- board/sunxi/MAINTAINERS| 5 + configs/orangepi_pc2_defconfig | 16 2 files changed, 21 insertions(+) create mode 100644 configs/orangepi_pc2_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 2321b8b..3f21129 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -242,6 +242,11 @@ M: Icenowy Zheng S: Maintained F: configs/orangepi_zero_defconfig +ORANGEPI PC 2 BOARD +M: Andre Przywara +S: Maintained +F: configs/orangepi_pc2_defconfig + R16 EVB PARROT BOARD M: Quentin Schulz S: Maintained diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig new file mode 100644 index 000..bc81ccc --- /dev/null +++ b/configs/orangepi_pc2_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I_H5_64=y +CONFIG_SPL=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881977 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CONSOLE_MUX=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y -- 2.8.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/7]
On 01/24/2017 11:11 AM, Marek Vasut wrote: > On 01/24/2017 06:05 PM, Dalon Westergreen wrote: >> From: Dalon Westergreen >> >> These patches update the boot and os partition numbers in the >> default uboot environment for a number of socfpga boards. Per >> request, common environment configurations have been moved to a >> shared header. >> >> Changes in v4: >> - Removed extraneous define in socfpga_common.h >>and only use CONFIG_EXTRA_ENV_SETTINGS for >>common uboot environment >> Changes in v3: >> - Corrected error in common default environment >> >> Dalon Westergreen (7): >> arm: socfpga: add env settings to common header >> arm: socfpga: update de0 nano default environment >> arm: socfpga: update cyclone5 socdk default environment >> arm: socfpga: update arria5 socdk default environment >> arm: socfpga: Update DE1 environment >> arm: socfpga: Update SoCKit environment >> arm: socfpga: Update sr1500 environment >> >> configs/socfpga_arria5_defconfig | 1 + >> configs/socfpga_cyclone5_defconfig | 1 + >> configs/socfpga_de0_nano_soc_defconfig | 3 +-- >> configs/socfpga_de1_soc_defconfig| 1 + >> configs/socfpga_sockit_defconfig | 1 + >> configs/socfpga_sr1500_defconfig | 1 + >> include/configs/socfpga_arria5_socdk.h | 25 - >> include/configs/socfpga_common.h | 27 +++ >> include/configs/socfpga_cyclone5_socdk.h | 25 - >> include/configs/socfpga_de0_nano_soc.h | 19 +-- >> include/configs/socfpga_de1_soc.h| 19 +-- >> include/configs/socfpga_sockit.h | 27 +-- >> include/configs/socfpga_sr1500.h | 25 - >> 13 files changed, 36 insertions(+), 139 deletions(-) >> > > Whole series > Acked-by: Marek Vasut > > Dinh, any comments ? I thought you had a comment on why this series changes the default bootfile from a fitImage to zImage. Was that comment addressed? Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/7]
On Tue, 2017-01-24 at 20:58 -0600, Dinh Nguyen wrote: > > On 01/24/2017 11:11 AM, Marek Vasut wrote: > > > > On 01/24/2017 06:05 PM, Dalon Westergreen wrote: > > > > > > From: Dalon Westergreen > > > > > > These patches update the boot and os partition numbers in the > > > default uboot environment for a number of socfpga boards. Per > > > request, common environment configurations have been moved to a > > > shared header. > > > > > > Changes in v4: > > > - Removed extraneous define in socfpga_common.h > > > and only use CONFIG_EXTRA_ENV_SETTINGS for > > > common uboot environment > > > Changes in v3: > > > - Corrected error in common default environment > > > > > > Dalon Westergreen (7): > > > arm: socfpga: add env settings to common header > > > arm: socfpga: update de0 nano default environment > > > arm: socfpga: update cyclone5 socdk default environment > > > arm: socfpga: update arria5 socdk default environment > > > arm: socfpga: Update DE1 environment > > > arm: socfpga: Update SoCKit environment > > > arm: socfpga: Update sr1500 environment > > > > > > configs/socfpga_arria5_defconfig | 1 + > > > configs/socfpga_cyclone5_defconfig | 1 + > > > configs/socfpga_de0_nano_soc_defconfig | 3 +-- > > > configs/socfpga_de1_soc_defconfig| 1 + > > > configs/socfpga_sockit_defconfig | 1 + > > > configs/socfpga_sr1500_defconfig | 1 + > > > include/configs/socfpga_arria5_socdk.h | 25 - > > > include/configs/socfpga_common.h | 27 +++ > > > include/configs/socfpga_cyclone5_socdk.h | 25 - > > > include/configs/socfpga_de0_nano_soc.h | 19 +-- > > > include/configs/socfpga_de1_soc.h| 19 +-- > > > include/configs/socfpga_sockit.h | 27 +-- > > > include/configs/socfpga_sr1500.h | 25 - > > > 13 files changed, 36 insertions(+), 139 deletions(-) > > > > > > > Whole series > > Acked-by: Marek Vasut > > > > Dinh, any comments ? > > I thought you had a comment on why this series changes the default > bootfile from a fitImage to zImage. Was that comment addressed? Yes, my comment was that none of the boards were currently using fitimages. > Dinh -- -- Thanks, Dalon Westergreen - ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
On 01/24/2017 11:05 AM, Dalon Westergreen wrote: > From: Dalon Westergreen > > Remove the default environment as it is now in a common > header. > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > to set the linux devicetree name. > > Signed-off-by: Dalon Westergreen > --- > configs/socfpga_de0_nano_soc_defconfig | 3 +-- > include/configs/socfpga_de0_nano_soc.h | 19 +-- > 2 files changed, 2 insertions(+), 20 deletions(-) > > diff --git a/configs/socfpga_de0_nano_soc_defconfig > b/configs/socfpga_de0_nano_soc_defconfig > index af41e1e..4837809 100644 > --- a/configs/socfpga_de0_nano_soc_defconfig > +++ b/configs/socfpga_de0_nano_soc_defconfig > @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y > CONFIG_SPL_STACK_R_ADDR=0x0080 > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" > +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" This should be socfpga_cyclone5_de0_nano_soc.dtb Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
On 01/24/2017 09:11 PM, Westergreen, Dalon wrote: > On Tue, 2017-01-24 at 21:08 -0600, Dinh Nguyen wrote: >> >> On 01/24/2017 11:05 AM, Dalon Westergreen wrote: >>> >>> From: Dalon Westergreen >>> >>> Remove the default environment as it is now in a common >>> header. >>> >>> Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig >>> to set the linux devicetree name. >>> >>> Signed-off-by: Dalon Westergreen >>> --- >>> configs/socfpga_de0_nano_soc_defconfig | 3 +-- >>> include/configs/socfpga_de0_nano_soc.h | 19 +-- >>> 2 files changed, 2 insertions(+), 20 deletions(-) >>> >>> diff --git a/configs/socfpga_de0_nano_soc_defconfig >>> b/configs/socfpga_de0_nano_soc_defconfig >>> index af41e1e..4837809 100644 >>> --- a/configs/socfpga_de0_nano_soc_defconfig >>> +++ b/configs/socfpga_de0_nano_soc_defconfig >>> @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 >>> CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y >>> CONFIG_SPL_STACK_R_ADDR=0x0080 >>> CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" >>> +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" >> >> This should be socfpga_cyclone5_de0_nano_soc.dtb >> > No, just checked the dts in the kernel source. it is > socfpga_cyclone5_de0_sockit.dts. I can change this to > what you like, but my intent had been to match names > in the kernel source where possible. > This is U-Boot: check under U-Boot's arch/arm/dts/ socfpga_cyclone5_sockit.dtb is for the sockit socfpga_cyclone5_de0_nano_soc.dtb is for the DE0 Nano board. commit 55c7a765f63ab10b9a3b8cbd38bf1483901a7b36 Author: Dinh Nguyen Date: Tue Sep 1 17:41:52 2015 -0500 arm: socfpga: Add support for the Terasic DE-0 Atlas board Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is CycloneV based board. The board can boot from SD/MMC. Ethernet is also supported. Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 5/7] arm: socfpga: Update DE1 environment
On 01/24/2017 11:06 AM, Dalon Westergreen wrote: > From: Dalon Westergreen > > Remove the default environment as it is now in a common > header. > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > to set the linux devicetree name. > > Signed-off-by: Dalon Westergreen > --- > configs/socfpga_de1_soc_defconfig | 1 + > include/configs/socfpga_de1_soc.h | 19 +-- > 2 files changed, 2 insertions(+), 18 deletions(-) > > diff --git a/configs/socfpga_de1_soc_defconfig > b/configs/socfpga_de1_soc_defconfig > index 032deef..19ff608 100644 > --- a/configs/socfpga_de1_soc_defconfig > +++ b/configs/socfpga_de1_soc_defconfig > @@ -6,6 +6,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y > CONFIG_SPL_STACK_R_ADDR=0x0080 > CONFIG_SPL_YMODEM_SUPPORT=y > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" > +CONFIG_DEFAULT_FDT_FILE="socfpga.dtb" Why not socfpga_cyclone5_de1_soc.dtb ? Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
On 01/24/2017 09:16 PM, Dinh Nguyen wrote: > > > On 01/24/2017 09:11 PM, Westergreen, Dalon wrote: >> On Tue, 2017-01-24 at 21:08 -0600, Dinh Nguyen wrote: >>> >>> On 01/24/2017 11:05 AM, Dalon Westergreen wrote: From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen --- configs/socfpga_de0_nano_soc_defconfig | 3 +-- include/configs/socfpga_de0_nano_soc.h | 19 +-- 2 files changed, 2 insertions(+), 20 deletions(-) diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index af41e1e..4837809 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y CONFIG_SPL_STACK_R_ADDR=0x0080 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" >>> >>> This should be socfpga_cyclone5_de0_nano_soc.dtb >>> >> No, just checked the dts in the kernel source. it is >> socfpga_cyclone5_de0_sockit.dts. I can change this to >> what you like, but my intent had been to match names >> in the kernel source where possible. >> > > This is U-Boot: check under U-Boot's arch/arm/dts/ > > socfpga_cyclone5_sockit.dtb is for the sockit > socfpga_cyclone5_de0_nano_soc.dtb is for the DE0 Nano board. > > > commit 55c7a765f63ab10b9a3b8cbd38bf1483901a7b36 > Author: Dinh Nguyen > Date: Tue Sep 1 17:41:52 2015 -0500 > > arm: socfpga: Add support for the Terasic DE-0 Atlas board > > Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is > CycloneV based board. The board can boot from SD/MMC. Ethernet is also > supported. > Oh you're right...I got confused. You're matching the DTS in the kernel. Sorry about that... Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
On Tue, 2017-01-24 at 21:08 -0600, Dinh Nguyen wrote: > > On 01/24/2017 11:05 AM, Dalon Westergreen wrote: > > > > From: Dalon Westergreen > > > > Remove the default environment as it is now in a common > > header. > > > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > > to set the linux devicetree name. > > > > Signed-off-by: Dalon Westergreen > > --- > > configs/socfpga_de0_nano_soc_defconfig | 3 +-- > > include/configs/socfpga_de0_nano_soc.h | 19 +-- > > 2 files changed, 2 insertions(+), 20 deletions(-) > > > > diff --git a/configs/socfpga_de0_nano_soc_defconfig > > b/configs/socfpga_de0_nano_soc_defconfig > > index af41e1e..4837809 100644 > > --- a/configs/socfpga_de0_nano_soc_defconfig > > +++ b/configs/socfpga_de0_nano_soc_defconfig > > @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 > > CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y > > CONFIG_SPL_STACK_R_ADDR=0x0080 > > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" > > +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" > > This should be socfpga_cyclone5_de0_nano_soc.dtb > No, just checked the dts in the kernel source. it is socfpga_cyclone5_de0_sockit.dts. I can change this to what you like, but my intent had been to match names in the kernel source where possible. thanks. > Dinh > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
On Tue, 2017-01-24 at 21:16 -0600, Dinh Nguyen wrote: > > On 01/24/2017 09:11 PM, Westergreen, Dalon wrote: > > > > On Tue, 2017-01-24 at 21:08 -0600, Dinh Nguyen wrote: > > > > > > > > > On 01/24/2017 11:05 AM, Dalon Westergreen wrote: > > > > > > > > > > > > From: Dalon Westergreen > > > > > > > > Remove the default environment as it is now in a common > > > > header. > > > > > > > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > > > > to set the linux devicetree name. > > > > > > > > Signed-off-by: Dalon Westergreen > > > > --- > > > > configs/socfpga_de0_nano_soc_defconfig | 3 +-- > > > > include/configs/socfpga_de0_nano_soc.h | 19 +-- > > > > 2 files changed, 2 insertions(+), 20 deletions(-) > > > > > > > > diff --git a/configs/socfpga_de0_nano_soc_defconfig > > > > b/configs/socfpga_de0_nano_soc_defconfig > > > > index af41e1e..4837809 100644 > > > > --- a/configs/socfpga_de0_nano_soc_defconfig > > > > +++ b/configs/socfpga_de0_nano_soc_defconfig > > > > @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 > > > > CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y > > > > CONFIG_SPL_STACK_R_ADDR=0x0080 > > > > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" > > > > +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" > > > > > > This should be socfpga_cyclone5_de0_nano_soc.dtb > > > > > No, just checked the dts in the kernel source. it is > > socfpga_cyclone5_de0_sockit.dts. I can change this to > > what you like, but my intent had been to match names > > in the kernel source where possible. > > > > This is U-Boot: check under U-Boot's arch/arm/dts/ > > socfpga_cyclone5_sockit.dtb is for the sockit > socfpga_cyclone5_de0_nano_soc.dtb is for the DE0 Nano board. > > > commit 55c7a765f63ab10b9a3b8cbd38bf1483901a7b36 > Author: Dinh Nguyen > Date: Tue Sep 1 17:41:52 2015 -0500 > > arm: socfpga: Add support for the Terasic DE-0 Atlas board > > Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is > CycloneV based board. The board can boot from SD/MMC. Ethernet is also > supported. > > Ah, i see. I was under the impression CONFIG_DEFAULT_FDT_FILE was only being used for the uboot env and CONFIG_DEFAULT_DEVICE_TREE was for the dts being used by uboot. I am using CONFIG_DEFAULT_FDT_FILE to set the uboot env fdtimage variable. Is that not the case? > Dinh > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot -- -- Dalon Westergreen Embedded Specialist Intel Programmable Solutions Group Phone : 1.858.202.3518 -- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/7] arm: socfpga: update de0 nano default environment
On 01/24/2017 09:23 PM, Westergreen, Dalon wrote: > On Tue, 2017-01-24 at 21:16 -0600, Dinh Nguyen wrote: >> >> On 01/24/2017 09:11 PM, Westergreen, Dalon wrote: >>> >>> On Tue, 2017-01-24 at 21:08 -0600, Dinh Nguyen wrote: On 01/24/2017 11:05 AM, Dalon Westergreen wrote: > > > From: Dalon Westergreen > > Remove the default environment as it is now in a common > header. > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > to set the linux devicetree name. > > Signed-off-by: Dalon Westergreen > --- > configs/socfpga_de0_nano_soc_defconfig | 3 +-- > include/configs/socfpga_de0_nano_soc.h | 19 +-- > 2 files changed, 2 insertions(+), 20 deletions(-) > > diff --git a/configs/socfpga_de0_nano_soc_defconfig > b/configs/socfpga_de0_nano_soc_defconfig > index af41e1e..4837809 100644 > --- a/configs/socfpga_de0_nano_soc_defconfig > +++ b/configs/socfpga_de0_nano_soc_defconfig > @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y > CONFIG_SPL_STACK_R_ADDR=0x0080 > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" > +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_de0_sockit.dtb" This should be socfpga_cyclone5_de0_nano_soc.dtb >>> No, just checked the dts in the kernel source. it is >>> socfpga_cyclone5_de0_sockit.dts. I can change this to >>> what you like, but my intent had been to match names >>> in the kernel source where possible. >>> >> >> This is U-Boot: check under U-Boot's arch/arm/dts/ >> >> socfpga_cyclone5_sockit.dtb is for the sockit >> socfpga_cyclone5_de0_nano_soc.dtb is for the DE0 Nano board. >> >> >> commit 55c7a765f63ab10b9a3b8cbd38bf1483901a7b36 >> Author: Dinh Nguyen >> Date: Tue Sep 1 17:41:52 2015 -0500 >> >> arm: socfpga: Add support for the Terasic DE-0 Atlas board >> >> Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is >> CycloneV based board. The board can boot from SD/MMC. Ethernet is also >> supported. >> >> > Ah, i see. I was under the impression CONFIG_DEFAULT_FDT_FILE > was only being used for the uboot env and CONFIG_DEFAULT_DEVICE_TREE > was for the dts being used by uboot. I am using > CONFIG_DEFAULT_FDT_FILE to set the uboot env fdtimage > variable. Is that not the case? > No, you're right! I got confused..see follow up message. Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 5/7] arm: socfpga: Update DE1 environment
On Tue, 2017-01-24 at 21:20 -0600, Dinh Nguyen wrote: > > On 01/24/2017 11:06 AM, Dalon Westergreen wrote: > > > > From: Dalon Westergreen > > > > Remove the default environment as it is now in a common > > header. > > > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > > to set the linux devicetree name. > > > > Signed-off-by: Dalon Westergreen > > --- > > configs/socfpga_de1_soc_defconfig | 1 + > > include/configs/socfpga_de1_soc.h | 19 +-- > > 2 files changed, 2 insertions(+), 18 deletions(-) > > > > diff --git a/configs/socfpga_de1_soc_defconfig > > b/configs/socfpga_de1_soc_defconfig > > index 032deef..19ff608 100644 > > --- a/configs/socfpga_de1_soc_defconfig > > +++ b/configs/socfpga_de1_soc_defconfig > > @@ -6,6 +6,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y > > CONFIG_SPL_STACK_R_ADDR=0x0080 > > CONFIG_SPL_YMODEM_SUPPORT=y > > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" > > +CONFIG_DEFAULT_FDT_FILE="socfpga.dtb" > > Why not socfpga_cyclone5_de1_soc.dtb ? > There was no mainlined linux dts for this board so i just left it as it was. > Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4] disk: convert to Kconfig
On Tue, Jan 24, 2017 at 10:56:55AM +0100, Patrick Delaunay wrote: > From: Patrick Delaunay > > This converts the following to Kconfig: >CONFIG_PARTITIONS >CONFIG_MAC_PARTITION >CONFIG_DOS_PARTITION >CONFIG_ISO_PARTITION >CONFIG_AMIGA_PARTITION >CONFIG_EFI_PARTITION >CONFIG_PARTITION_UUIDS >CONFIG_PARTITION_TYPE_GUID > > Specific SPL config are added to reduce SPL size > for some target and solve compilation issues > >CONFIG_SPL_MAC_PARTITION >CONFIG_SPL_DOS_PARTITION >CONFIG_SPL_ISO_PARTITION >CONFIG_SPL_AMIGA_PARTITION >CONFIG_SPL_EFI_PARTITION > > Associated test are updated to the correct CONFIG (SPL or not) > by using macro CONFIG_IS_ENABLED > > To update the U-Boot code I use : > 0- Resync with savedefconfig >/tools/moveconfig.py -s -Cy > > 1- update defconfig for new SPL option >./tools/moveconfig.py --spl --commit \ >PARTITIONS MAC_PARTITION DOS_PARTITION \ >ISO_PARTITION AMIGA_PARTITION EFI_PARTITION \ >PARTITION_UUIDS PARTITION_TYPE_GUID > >then replace CONFIG by CONFIG_SPL in defconfig >sed -i > "s/CONFIG_\(DOS\|EFI\|ISO\|MAC\|AMIGA\)_PARTITION/CONFIG_SPL_\1_PARTITION/" \ >configs/* > > 2- update defconfig for existing option >./tools/moveconfig.py --commit --yes \ >PARTITIONS MAC_PARTITION DOS_PARTITION \ >ISO_PARTITION AMIGA_PARTITION EFI_PARTITION \ >PARTITION_UUIDS PARTITION_TYPE_GUID > > => squash the 2 modifications > > > Signed-off-by: Patrick Delaunay > Signed-off-by: Patrick Delaunay I played with this a lot tonight. I think, sadly, we're going the wrong direction in this conversion. I believe I had originally suggested a patch, but that's not right. Lets get one patch per partition type, as that will make finding and correcting the conversion easier. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 6/7] arm: socfpga: Update SoCKit environment
On 01/24/2017 11:06 AM, Dalon Westergreen wrote: > From: Dalon Westergreen > > Remove the default environment as it is now in a common > header. > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > to set the linux devicetree name. > > Signed-off-by: Dalon Westergreen > --- > configs/socfpga_sockit_defconfig | 1 + > include/configs/socfpga_sockit.h | 27 +-- > 2 files changed, 2 insertions(+), 26 deletions(-) > > diff --git a/configs/socfpga_sockit_defconfig > b/configs/socfpga_sockit_defconfig > index d0c2bda..130c4e2 100644 > --- a/configs/socfpga_sockit_defconfig > +++ b/configs/socfpga_sockit_defconfig > @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y > CONFIG_SPL_STACK_R_ADDR=0x0080 > CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" > +CONFIG_DEFAULT_FDT_FILE="socfpga.dtb" Should this be "socfpga_cyclone5_sockit.dtb" ? Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/7]
On 01/25/2017 04:07 AM, Dalon Westergreen wrote: > On Tue, 2017-01-24 at 20:58 -0600, Dinh Nguyen wrote: >> >> On 01/24/2017 11:11 AM, Marek Vasut wrote: >>> >>> On 01/24/2017 06:05 PM, Dalon Westergreen wrote: From: Dalon Westergreen These patches update the boot and os partition numbers in the default uboot environment for a number of socfpga boards. Per request, common environment configurations have been moved to a shared header. Changes in v4: - Removed extraneous define in socfpga_common.h and only use CONFIG_EXTRA_ENV_SETTINGS for common uboot environment Changes in v3: - Corrected error in common default environment Dalon Westergreen (7): arm: socfpga: add env settings to common header arm: socfpga: update de0 nano default environment arm: socfpga: update cyclone5 socdk default environment arm: socfpga: update arria5 socdk default environment arm: socfpga: Update DE1 environment arm: socfpga: Update SoCKit environment arm: socfpga: Update sr1500 environment configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 3 +-- configs/socfpga_de1_soc_defconfig| 1 + configs/socfpga_sockit_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + include/configs/socfpga_arria5_socdk.h | 25 - include/configs/socfpga_common.h | 27 +++ include/configs/socfpga_cyclone5_socdk.h | 25 - include/configs/socfpga_de0_nano_soc.h | 19 +-- include/configs/socfpga_de1_soc.h| 19 +-- include/configs/socfpga_sockit.h | 27 +-- include/configs/socfpga_sr1500.h | 25 - 13 files changed, 36 insertions(+), 139 deletions(-) >>> >>> Whole series >>> Acked-by: Marek Vasut >>> >>> Dinh, any comments ? >> >> I thought you had a comment on why this series changes the default >> bootfile from a fitImage to zImage. Was that comment addressed? > > Yes, my comment was that none of the boards were currently using > fitimages. Yes, it seems the default altera SD card images use zImage + separate DTB. I constantly regret bringing bootz into U-Boot tbh, but such are the mistakes of youth ... -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot