From: Mark Marshall <mark.marsh...@omicron.at>
We should use the symbolic names for the cache control bits.
Signed-off-by: Mark Marshall <mark.marsh...@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.grazia...@omicronenergy.com>
---
arch/powerpc/cpu/mpc85xx/start.S | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 932216c..eb817f1 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1373,8 +1373,8 @@ icache_enable:
mtlr r8
isync
mfspr r4,L1CSR1
- ori r4,r4,0x0001
- oris r4,r4,0x0001
+ ori r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@l
+ oris r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@h
mtspr L1CSR1,r4
isync
blr
@@ -1402,8 +1402,8 @@ dcache_enable:
mtlr r8
isync
mfspr r0,L1CSR0
- ori r0,r0,0x0001
- oris r0,r0,0x0001
+ ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l
+ oris r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@h
msync
isync
mtspr L1CSR0,r0
--
2.7.4
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