[llvm-commits] [llvm-gcc-4.2] r40670 - in /llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp llvm-linker-hack.cpp
Author: resistor Date: Wed Aug 1 02:08:09 2007 New Revision: 40670 URL: http://llvm.org/viewvc/llvm-project?rev=40670&view=rev Log: FastDSE has been renamed just DSE. Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=40670&r1=40669&r2=40670&view=diff == --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Aug 1 02:08:09 2007 @@ -355,7 +355,7 @@ // opened up by them. PM->add(createInstructionCombiningPass()); PM->add(createCondPropagationPass()); // Propagate conditionals -PM->add(createFastDeadStoreEliminationPass()); // Delete dead stores +PM->add(createDeadStoreEliminationPass()); // Delete dead stores PM->add(createAggressiveDCEPass()); // SSA based 'Aggressive DCE' PM->add(createCFGSimplificationPass()); // Merge & remove BBs Modified: llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp?rev=40670&r1=40669&r2=40670&view=diff == --- llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-linker-hack.cpp Wed Aug 1 02:08:09 2007 @@ -77,7 +77,6 @@ llvm::createDeadArgEliminationPass(); llvm::createLoadValueNumberingPass(); llvm::createTailCallEliminationPass(); - llvm::createFastDeadStoreEliminationPass(); llvm::createIPConstantPropagationPass(); llvm::createStripDeadPrototypesPass(); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40660 - in /llvm/trunk: include/llvm/ include/llvm/Support/ lib/AsmParser/ lib/Bitcode/Reader/ lib/CodeGen/ lib/ExecutionEngine/JIT/ lib/Transforms/IPO/ lib/Transforms/Instr
On Jul 31, 2007, at 23:43, David Greene wrote:
Modified: llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/
Scalar/LowerGC.cpp?rev=40660&r1=40659&r2=40660&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp Tue Jul 31
22:43:44 2007
@@ -27,6 +27,7 @@
#include "llvm/Module.h"
#include "llvm/Pass.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/ADT/SmallVector.h"
using namespace llvm;
namespace {
@@ -197,8 +198,18 @@
CI->setOperand(0, GCRead);
} else {
// Create a whole new call to replace the old one.
-CallInst *NC = new CallInst(GCRead, CI->getOperand
(1),
-CI->getOperand(2),
+
+// It sure would be nice to pass op_begin()+1,
+// op_begin()+2 but it runs into trouble with
+// CallInst::init's &*ierator, which requires a
+// conversion from Use* to Value*. The conversion
+// from Use to Value * is not useful because the
+// memory for Value * won't be contiguous.
+SmallVector Args;
+Args.push_back(CI->getOperand(1));
+Args.push_back(CI->getOperand(2));
+CallInst *NC = new CallInst(GCRead, Args.begin(),
+Args.end(),
CI->getName(), CI);
// These functions only deal with ptr type results
so BitCast
// is the correct kind of cast (no-op cast).
Hi David,
Can't you just use
Value* Args[] = { CI->GetOperand(1),
CI->GetOperand(2) };
CallInst *NC = new CallInst(GCRead, Args, Args + 2,
CI->getName(), CI);
here and in UpgradeParser.y?
— Gordon
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[llvm-commits] [llvm] r40671 - /llvm/trunk/include/llvm/Pass.h
Author: djg
Date: Wed Aug 1 09:28:20 2007
New Revision: 40671
URL: http://llvm.org/viewvc/llvm-project?rev=40671&view=rev
Log:
Make ImmutablePass::runOnModule non-virtual, since it is not
intended to be overridden.
Modified:
llvm/trunk/include/llvm/Pass.h
Modified: llvm/trunk/include/llvm/Pass.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Pass.h?rev=40671&r1=40670&r2=40671&view=diff
==
--- llvm/trunk/include/llvm/Pass.h (original)
+++ llvm/trunk/include/llvm/Pass.h Wed Aug 1 09:28:20 2007
@@ -262,7 +262,7 @@
/// ImmutablePasses are never run.
///
- virtual bool runOnModule(Module &M) { return false; }
+ bool runOnModule(Module &M) { return false; }
explicit ImmutablePass(intptr_t pid) : ModulePass(pid) {}
// Force out-of-line virtual method.
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[llvm-commits] [llvm] r40672 - /llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
Author: djg
Date: Wed Aug 1 09:42:30 2007
New Revision: 40672
URL: http://llvm.org/viewvc/llvm-project?rev=40672&view=rev
Log:
Change a .size directive to use a tab instead of a space, for consistency.
Modified:
llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
Modified: llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp?rev=40672&r1=40671&r2=40672&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Aug 1 09:42:30 2007
@@ -180,7 +180,7 @@
}
if (TAI->hasDotTypeDotSizeDirective())
-O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
+O << "\t.size\t" << CurrentFnName << ", .-" << CurrentFnName << "\n";
if (TAI->doesSupportDebugInformation()) {
// Emit post-function debug information.
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[llvm-commits] [llvm] r40673 - in /llvm/trunk: include/llvm/Analysis/ include/llvm/CodeGen/ include/llvm/Target/ include/llvm/Transforms/IPO/ lib/Analysis/ lib/Analysis/IPA/ lib/Transforms/IPO/ lib/Tr
Author: djg
Date: Wed Aug 1 10:32:29 2007
New Revision: 40673
URL: http://llvm.org/viewvc/llvm-project?rev=40673&view=rev
Log:
More explicit keywords.
Modified:
llvm/trunk/include/llvm/Analysis/LoopPass.h
llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h
llvm/trunk/lib/Analysis/IPA/CallGraphSCCPass.cpp
llvm/trunk/lib/Analysis/ProfileInfoLoaderPass.cpp
llvm/trunk/lib/Transforms/IPO/ExtractFunction.cpp
llvm/trunk/lib/Transforms/IPO/Internalize.cpp
llvm/trunk/lib/Transforms/IPO/LoopExtractor.cpp
llvm/trunk/lib/Transforms/IPO/StripSymbols.cpp
llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
llvm/trunk/lib/Transforms/Utils/LowerAllocations.cpp
llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
llvm/trunk/lib/Transforms/Utils/LowerSelect.cpp
Modified: llvm/trunk/include/llvm/Analysis/LoopPass.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/LoopPass.h?rev=40673&r1=40672&r2=40673&view=diff
==
--- llvm/trunk/include/llvm/Analysis/LoopPass.h (original)
+++ llvm/trunk/include/llvm/Analysis/LoopPass.h Wed Aug 1 10:32:29 2007
@@ -84,7 +84,7 @@
public:
static char ID;
- LPPassManager(int Depth);
+ explicit LPPassManager(int Depth);
/// run - Execute all of the passes scheduled for execution. Keep track of
/// whether any of the passes modifies the module, and if so, return true.
Modified: llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h?rev=40673&r1=40672&r2=40673&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineConstantPool.h Wed Aug 1 10:32:29
2007
@@ -114,7 +114,8 @@
std::vector Constants; ///< The pool of constants.
public:
/// @brief The only constructor.
- MachineConstantPool(const TargetData *td) : TD(td), PoolAlignment(1) {}
+ explicit MachineConstantPool(const TargetData *td)
+: TD(td), PoolAlignment(1) {}
~MachineConstantPool();
/// getConstantPoolAlignment - Return the log2 of the alignment required by
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=40673&r1=40672&r2=40673&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Aug 1 10:32:29 2007
@@ -76,7 +76,7 @@
SchedulingForRegPressure // Scheduling for lowest register pressure.
};
- TargetLowering(TargetMachine &TM);
+ explicit TargetLowering(TargetMachine &TM);
virtual ~TargetLowering();
TargetMachine &getTargetMachine() const { return TM; }
@@ -510,7 +510,7 @@
SDOperand Old;
SDOperand New;
-TargetLoweringOpt(SelectionDAG &InDAG) : DAG(InDAG) {}
+explicit TargetLoweringOpt(SelectionDAG &InDAG) : DAG(InDAG) {}
bool CombineTo(SDOperand O, SDOperand N) {
Old = O;
Modified: llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h?rev=40673&r1=40672&r2=40673&view=diff
==
--- llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h (original)
+++ llvm/trunk/include/llvm/Transforms/IPO/InlinerPass.h Wed Aug 1 10:32:29
2007
@@ -26,7 +26,7 @@
/// perform the inlining operations that does not depend on the policy.
///
struct Inliner : public CallGraphSCCPass {
- Inliner(const void *ID);
+ explicit Inliner(const void *ID);
/// getAnalysisUsage - For this class, we declare that we require and
preserve
/// the call graph. If the derived class implements this method, it should
Modified: llvm/trunk/lib/Analysis/IPA/CallGraphSCCPass.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/IPA/CallGraphSCCPass.cpp?rev=40673&r1=40672&r2=40673&view=diff
==
--- llvm/trunk/lib/Analysis/IPA/CallGraphSCCPass.cpp (original)
+++ llvm/trunk/lib/Analysis/IPA/CallGraphSCCPass.cpp Wed Aug 1 10:32:29 2007
@@ -31,7 +31,7 @@
public:
static char ID;
- CGPassManager(int Depth)
+ explicit CGPassManager(int Depth)
: ModulePass((intptr_t)&ID), PMDataManager(Depth) { }
/// run - Execute all of the passes scheduled for execution. Keep track of
Modifi
[llvm-commits] [llvm] r40674 - in /llvm/trunk/test/Transforms/DeadStoreElimination: alloca.llx context-sensitive.llx free.llx simple.llx
Author: resistor
Date: Wed Aug 1 11:53:51 2007
New Revision: 40674
URL: http://llvm.org/viewvc/llvm-project?rev=40674&view=rev
Log:
Forgot to update these files for the FastDSE changes.
Modified:
llvm/trunk/test/Transforms/DeadStoreElimination/alloca.llx
llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.llx
llvm/trunk/test/Transforms/DeadStoreElimination/free.llx
llvm/trunk/test/Transforms/DeadStoreElimination/simple.llx
Modified: llvm/trunk/test/Transforms/DeadStoreElimination/alloca.llx
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/alloca.llx?rev=40674&r1=40673&r2=40674&view=diff
==
--- llvm/trunk/test/Transforms/DeadStoreElimination/alloca.llx (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/alloca.llx Wed Aug 1
11:53:51 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-upgrade < %s | llvm-as | opt -fdse | llvm-dis | not grep DEAD
+; RUN: llvm-upgrade < %s | llvm-as | opt -dse | llvm-dis | not grep DEAD
void %test(int* %Q) {
%P = alloca int
Modified: llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.llx
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.llx?rev=40674&r1=40673&r2=40674&view=diff
==
--- llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.llx
(original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/context-sensitive.llx Wed
Aug 1 11:53:51 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-upgrade < %s | llvm-as | opt -fdse | llvm-dis | not grep DEAD
+; RUN: llvm-upgrade < %s | llvm-as | opt -dse | llvm-dis | not grep DEAD
declare void %ext()
Modified: llvm/trunk/test/Transforms/DeadStoreElimination/free.llx
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/free.llx?rev=40674&r1=40673&r2=40674&view=diff
==
--- llvm/trunk/test/Transforms/DeadStoreElimination/free.llx (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/free.llx Wed Aug 1
11:53:51 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-upgrade < %s | llvm-as | opt -fdse | llvm-dis | not grep DEAD
+; RUN: llvm-upgrade < %s | llvm-as | opt -dse | llvm-dis | not grep DEAD
void %test(int* %Q, int* %P) {
%DEAD = load int* %Q
Modified: llvm/trunk/test/Transforms/DeadStoreElimination/simple.llx
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadStoreElimination/simple.llx?rev=40674&r1=40673&r2=40674&view=diff
==
--- llvm/trunk/test/Transforms/DeadStoreElimination/simple.llx (original)
+++ llvm/trunk/test/Transforms/DeadStoreElimination/simple.llx Wed Aug 1
11:53:51 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-upgrade < %s | llvm-as | opt -fdse | llvm-dis | not grep DEAD
+; RUN: llvm-upgrade < %s | llvm-as | opt -dse | llvm-dis | not grep DEAD
void %test(int* %Q, int* %P) {
%DEAD = load int* %Q
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[llvm-commits] [llvm] r40675 - /llvm/trunk/test/CodeGen/X86/sse-align-11.ll
Author: lattner
Date: Wed Aug 1 12:10:30 2007
New Revision: 40675
URL: http://llvm.org/viewvc/llvm-project?rev=40675&view=rev
Log:
we're now handling this right :)
Added:
llvm/trunk/test/CodeGen/X86/sse-align-11.ll
Added: llvm/trunk/test/CodeGen/X86/sse-align-11.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-11.ll?rev=40675&view=auto
==
--- llvm/trunk/test/CodeGen/X86/sse-align-11.ll (added)
+++ llvm/trunk/test/CodeGen/X86/sse-align-11.ll Wed Aug 1 12:10:30 2007
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=darwin | grep movaps
+; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=linux | grep movups
+
+define <4 x float> @foo(float %a, float %b, float %c, float %d) {
+entry:
+%tmp6 = insertelement <4 x float> undef, float %a, i32 0
+%tmp7 = insertelement <4 x float> %tmp6, float %b, i32 1
+%tmp8 = insertelement <4 x float> %tmp7, float %c, i32 2
+%tmp9 = insertelement <4 x float> %tmp8, float %d, i32 3
+ret <4 x float> %tmp9
+}
+
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Re: [llvm-commits] [llvm] r40015 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/sse-align-0.ll test/CodeGen/X86/sse-align-1.ll test/CodeGen/X86/sse-align-10.ll test/CodeGen/X86/sse-a
On Jul 18, 2007, at 1:23 PM, Dan Gohman wrote: > Implement initial memory alignment awareness for SSE instructions. > Vector loads > and stores that have a specified alignment of less than 16 bytes > now use > instructions that support misaligned memory references. This is *very* cool. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40502 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
Hi Evan,
On Jul 25, 2007, at 11:30 PM, Evan Cheng wrote:
> I do want to support static codegen for JIT. If non-JIT mode silently
> change it to dynamic-no-pic, then we can't emulate with llc.
>
> An alternative is to define a code model that is somewhere between
> small and medium. It's only used by Mac OS / static though. Not sure
> if that's cleaner?
Okay, instead of checking for isTargetDarwin() in this low-level
place, what do you think of adding a new subtarget field, which is
only set on darwin, and checking that instead? The idea of doing
this is that instead of checking isTargetDarwin(), you would check ST-
>hasNoSmallModel() or something, which is more obvious to the reader
what is going on.
What do you think?
-Chris
> Evan
>
> Sent from my iPhone
>
> On Jul 25, 2007, at 10:47 PM, Chris Lattner <[EMAIL PROTECTED]>
> wrote:
>
>>
>> On Jul 25, 2007, at 4:41 PM, Evan Cheng wrote:
>>
>>> Author: evancheng
>>> Date: Wed Jul 25 18:41:36 2007
>>> New Revision: 40502
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=40502&view=rev
>>> Log:
>>> Mac OS X x86-64 lower 4G address is not available.
>>
>> Hi Evan,
>>
>> Would it be better to have the X86 backend change the relo module to
>> mdynamic-no-pic on darwin? It seems strange to test the os in a low-
>> level place like this.
>>
>> -Chirs
>>
>>> Modified:
>>>llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
>>>
>>> Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
>>> X86ISelDAGToDAG.cpp?rev=40502&r1=40501&r2=40502&view=diff
>>>
>>> ===
>>> ===
>>>
>>> --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Jul 25
>>> 18:41:36 2007
>>> @@ -615,7 +615,8 @@
>>> SDOperand N0 = N.getOperand(0);
>>> if (GlobalAddressSDNode *G = dyn_cast
>>> (N0)) {
>>> GlobalValue *GV = G->getGlobal();
>>> -bool isAbs32 = !is64Bit || isStatic;
>>> +// Mac OS X X86-64 lower 4G address is not available.
>>> +bool isAbs32 = !is64Bit || (isStatic && !Subtarget-
isTargetDarwin());
>>> if (isAbs32 || isRoot) {
>>> AM.GV = GV;
>>> AM.Disp += G->getOffset();
>>>
>>>
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Re: [llvm-commits] [llvm] r40521 - in /llvm/trunk: include/llvm/CodeGen/Passes.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/LowerSubregs.cpp
On Jul 26, 2007, at 1:18 AM, Christopher Lamb wrote:
> Author: clamb
> Date: Thu Jul 26 03:18:32 2007
> New Revision: 40521
Nice work on subregs!
> + /// LowerSubregs Pass - This pass lowers subregs to register-
> register copies
> + /// which yields suboptimial, but correct code if the register
> allocator
suboptimial -> suboptimal
> +// Returns the Register Class of a physical register
> +static const TargetRegisterClass *getPhysicalRegisterRegClass(
> +const MRegisterInfo &MRI,
> +unsigned reg) {
Please end comments with a period if they are a sentence.
> + assert(MRegisterInfo::isPhysicalRegister(reg) &&
> + "reg must be a physical register");
> + // Pick the register class of the right type that contains this
> physreg.
> + for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
> + E = MRI.regclass_end(); I != E; ++I)
> +if ((*I)->contains(reg))
> + return *I;
> + assert(false && "Couldn't find the register class");
> + return 0;
> +}
> +
> +static bool isSubRegOf(const MRegisterInfo &MRI,
> + unsigned SubReg,
> + unsigned SupReg) {
> + const TargetRegisterDesc &RD = MRI[SubReg];
> + for (const unsigned *reg = RD.SuperRegs; *reg != 0; ++reg)
> +if (*reg == SupReg)
> + return true;
> +
> + return false;
> +}
Would it make sense for getPhysicalRegisterRegClass/isSubRegOf to be
methods on MRegisterInfo?
> +/// runOnMachineFunction - Reduce subregister inserts and extracts
> to register
> +/// copies.
> +///
> +bool LowerSubregsInstructionPass::runOnMachineFunction
> (MachineFunction &MF) {
> + DOUT << "Machine Function\n";
> + const TargetMachine &TM = MF.getTarget();
> + const MRegisterInfo &MRI = *TM.getRegisterInfo();
> +
> + bool MadeChange = false;
> +
> + DOUT << "** LOWERING SUBREG INSTRS **\n";
> + DOUT << "** Function: " << MF.getFunction()->getName()
> << '\n';
> +
> + for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
> + mbbi != mbbe; ++mbbi) {
> +for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi-
> >end();
> + mi != me; ++mi) {
> +
> + if (mi->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
...
> +
> +DOUT << "\n";
> +mbbi->erase(mi);
> +MadeChange = true;
> +
> + } else if (mi->getOpcode() == TargetInstrInfo::INSERT_SUBREG) {
...
> +
> +DOUT << "\n";
> +mbbi->erase(mi);
> +MadeChange = true;
> + }
> +}
> + }
> +
> + return MadeChange;
> +}
This loop is reading from invalidated iterators. Specifically, after
you erase the machine instrs, the next iteration of the loop
increments the "mi" iterator, which points to the deleted instruction.
I suggest structuring the loop like this:
for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
mbbi != mbbe; ++mbbi) {
for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi-
>end();
mi != me; ) {
MachineInstr *MI = mi++;
if (MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
LowerExtract(MI);
} else if (MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG) {
LowerInsert(MI);
}
}}
By incrementing the iterator early, you avoid the invalidation
problems. Use of methods for the lowering make the code easier to
read but has no functionality change,
-Chris
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Re: [llvm-commits] [llvm] r40549 - in /llvm/trunk: docs/ include/llvm/ include/llvm/CodeGen/ include/llvm/Target/ lib/AsmParser/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/
On Jul 27, 2007, at 5:58 AM, Duncan Sands wrote: > Author: baldrick > Date: Fri Jul 27 07:58:54 2007 > New Revision: 40549 > > URL: http://llvm.org/viewvc/llvm-project?rev=40549&view=rev > Log: > Support for trampolines, except for X86 codegen which is > still under discussion. Nice. You just had to make a lier out of me... on wednesday I said we probably wouldn't have trampolines for quite a while ;-) Comments below: > > > > + Trampoline Intrinsics > + .. > + These intrinsics make it possible to excise one parameter, > marked with > + the nest attribute, from a function. The result is a > callable > + function pointer lacking the nest parameter - the caller does > not need > + to provide a value for it. Instead, the value to use is stored in > + advance in a "trampoline", a block of memory usually allocated > + on the stack, which also contains code to splice the nest value > into the > + argument list. This is used to implement the GCC nested > function address > + extension. Nice summary. Dummy question: it isn't possible to merge the init and adjust intrinsics, is it? If the result of init can only be used by adjust, it seems reasonable to merge them. > + > + Trampolines are currently only supported on the X86 architecture. > + LangRef.html should not describe implementation state, please remove this comment. > +declare void @llvm.init.trampoline(i8*, i8* > , i8* ) > + The llvm.init.trampoline intrinsic takes three > arguments, all > + pointers. The tramp argument must point to a > sufficiently large > + and sufficiently aligned block of memory; this memory is written > to by the > + intrinsic. Currently LLVM provides no help in determining just > how big and > + aligned the memory needs to be. I would suggest changing this last sentence to: "Note that this size is target-specific - LLVM currently provides no portable way to determine the size or alignment to use for the memory, so a front-end that generates this intrinsic must have some target-specific knowledge." > +SDOperand ARMTargetLowering::LowerADJUST_TRAMP(SDOperand Op, > +SelectionDAG > &DAG) { > + // Thumb trampolines should be entered in thumb mode, so set the > bottom bit > + // of the address. > + return DAG.getNode(ISD::OR, MVT::i32, Op.getOperand(0), > + DAG.getConstant(1, MVT::i32)); This may or may not be right in the future. For now, both GCC and LLVM compile an entire file in thumb or in arm mode. In the future, we may mix and match functions as appropriate. Can you please add a fixme to this saying that we should reevaluate it if the caller and callee can ever be different ISAs. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r40679 - in /llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp llvm-convert.cpp llvm-internal.h llvm-types.cpp
Author: clamb
Date: Wed Aug 1 13:19:14 2007
New Revision: 40679
URL: http://llvm.org/viewvc/llvm-project?rev=40679&view=rev
Log:
Bring across restrict handling from llvm-gcc-4.0. This should fix PR1582 on
both llvm-gcc projects.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.2/trunk/gcc/llvm-internal.h
llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=40679&r1=40678&r2=40679&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Aug 1 13:19:14 2007
@@ -1004,7 +1004,7 @@
if (FnEntry == 0) {
unsigned CC;
const FunctionType *Ty =
-TheTypeConverter->ConvertFunctionType(TREE_TYPE(decl), NULL, CC);
+TheTypeConverter->ConvertFunctionType(TREE_TYPE(decl), decl, NULL, CC);
FnEntry = new Function(Ty, Function::ExternalLinkage, Name, TheModule);
FnEntry->setCallingConv(CC);
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=40679&r1=40678&r2=40679&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 1 13:19:14 2007
@@ -530,6 +530,7 @@
} else {
// Otherwise, just get the type from the function itself.
FTy = TheTypeConverter->ConvertFunctionType(TREE_TYPE(FnDecl),
+FnDecl,
static_chain,
CallingConv);
}
@@ -2597,6 +2598,7 @@
unsigned CallingConv;
const Type *Ty = TheTypeConverter->ConvertFunctionType(function_type,
+ fndecl,
static_chain,
CallingConv);
Callee = CastToType(Instruction::BitCast, Callee, PointerType::get(Ty));
Modified: llvm-gcc-4.2/trunk/gcc/llvm-internal.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-internal.h?rev=40679&r1=40678&r2=40679&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-internal.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-internal.h Wed Aug 1 13:19:14 2007
@@ -147,6 +147,7 @@
/// tree to an LLVM type. This does the same thing that ConvertType does,
but
/// it also returns the function's LLVM calling convention.
const FunctionType *ConvertFunctionType(tree_node *type,
+ tree_node *decl,
tree_node *static_chain,
unsigned &CallingConv);
Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=40679&r1=40678&r2=40679&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Wed Aug 1 13:19:14 2007
@@ -804,9 +804,13 @@
case FUNCTION_TYPE: {
if (const Type *Ty = GET_TYPE_LLVM(type))
return Ty;
-
+
+// No declaration to pass through, passing NULL.
unsigned CallingConv;
-return TypeDB.setType(type, ConvertFunctionType(type, NULL, CallingConv));
+return TypeDB.setType(type, ConvertFunctionType(type,
+NULL,
+NULL,
+CallingConv));
}
case ARRAY_TYPE: {
if (const Type *Ty = GET_TYPE_LLVM(type))
@@ -948,6 +952,7 @@
}
const FunctionType *TypeConverter::ConvertFunctionType(tree type,
+ tree decl,
tree static_chain,
unsigned &CallingConv) {
const Type *RetTy = 0;
@@ -998,6 +1003,8 @@
LLVM_TARGET_INIT_REGPARM(local_regparam, type);
#endif // LLVM_TARGET_ENABLE_REGPARM
+ // Check if we have a corresponding decl to inspect.
+ tree DeclArgs = (decl) ? DECL_ARGUMENTS(decl) : NULL;
// Loop over all of the arguments, adding them as we go.
tree Args = TYPE_ARG_TYPES(type);
for (; Args && TREE_VALUE(Args) != void_type_node; Args = TREE_CHAIN(Args)){
@@ -1032,10 +1039,15 @@
Attributes |= ParamAttr::SExt;
}
-// Compute noalias attributes.
-if (TREE_CODE(ArgTy) == POINTER_TYPE || TREE_CODE(ArgTy) == REFERENCE_TYPE)
- if (TYPE_RESTR
[llvm-commits] [llvm-gcc-4.0] r40678 - /llvm-gcc-4.0/trunk/gcc/llvm-types.cpp
Author: clamb
Date: Wed Aug 1 13:16:29 2007
New Revision: 40678
URL: http://llvm.org/viewvc/llvm-project?rev=40678&view=rev
Log:
Clean up comments and 80 col violations.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-types.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-types.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-types.cpp?rev=40678&r1=40677&r2=40678&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-types.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-types.cpp Wed Aug 1 13:16:29 2007
@@ -784,9 +784,12 @@
if (const Type *Ty = GET_TYPE_LLVM(type))
return Ty;
-// No declaration to pass through, passing NULL
+// No declaration to pass through, passing NULL.
unsigned CallingConv;
-return TypeDB.setType(type, ConvertFunctionType(type, NULL, NULL,
CallingConv));
+return TypeDB.setType(type, ConvertFunctionType(type,
+NULL,
+NULL,
+CallingConv));
}
case ARRAY_TYPE: {
if (const Type *Ty = GET_TYPE_LLVM(type))
@@ -979,7 +982,7 @@
LLVM_TARGET_INIT_REGPARM(local_regparam, type);
#endif // LLVM_TARGET_ENABLE_REGPARM
- // Check if we have a corresponding decl to inspect
+ // Check if we have a corresponding decl to inspect.
tree DeclArgs = (decl) ? DECL_ARGUMENTS(decl) : NULL;
// Loop over all of the arguments, adding them as we go.
tree Args = TYPE_ARG_TYPES(type);
@@ -1017,7 +1020,7 @@
// Compute noalias attributes. If we have a decl for the function
// inspect it for restrict qualifiers, otherwise try the argument
-// types
+// types.
tree RestrictArgTy = (DeclArgs) ? TREE_TYPE(DeclArgs) : ArgTy;
if (TREE_CODE(RestrictArgTy) == POINTER_TYPE ||
TREE_CODE(RestrictArgTy) == REFERENCE_TYPE) {
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[llvm-commits] [llvm] r40681 - /llvm/trunk/test/C++Frontend/2007-08-01-RestrictMethod.cpp
Author: clamb
Date: Wed Aug 1 13:48:29 2007
New Revision: 40681
URL: http://llvm.org/viewvc/llvm-project?rev=40681&view=rev
Log:
Clean up C++ restrict test cases and add a test for restrict qualified methods.
Added:
llvm/trunk/test/C++Frontend/2007-08-01-RestrictMethod.cpp
Added: llvm/trunk/test/C++Frontend/2007-08-01-RestrictMethod.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-08-01-RestrictMethod.cpp?rev=40681&view=auto
==
--- llvm/trunk/test/C++Frontend/2007-08-01-RestrictMethod.cpp (added)
+++ llvm/trunk/test/C++Frontend/2007-08-01-RestrictMethod.cpp Wed Aug 1
13:48:29 2007
@@ -0,0 +1,13 @@
+// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias
+
+
+class foo {
+ int member[4];
+
+ void bar(int * a);
+
+};
+
+void foo::bar(int * a) __restrict {
+ member[3] = *a;
+}
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Re: [llvm-commits] [llvm] r40595 - in /llvm/trunk: lib/Transforms/Scalar/GVN.cpp test/Transforms/GVN/2007-07-30-PredIDom.ll
On Jul 30, 2007, at 9:57 AM, Owen Anderson wrote: > Author: resistor > Date: Mon Jul 30 11:57:08 2007 > New Revision: 40595 > > URL: http://llvm.org/viewvc/llvm-project?rev=40595&view=rev > Log: > Fix a bug caused by indiscriminantly asking for the dominators of a > predecessor. > == > > --- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original) > +++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Mon Jul 30 11:57:08 2007 > @@ -723,7 +723,8 @@ > return V = GetValueForBlock(IDom->getBlock(), orig, Phis); >} > > - > + if (std::distance(pred_begin(BB), pred_end(BB)) == 1) > +return V = GetValueForBlock(IDom->getBlock(), orig, Phis); > FYI, the if condition is O(n) in the number of predecessors, instead of constant time. Instead of using std::distance, just use BB- >getSinglePredecessor() which is constant time. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40680 - in /llvm/trunk/test/C++Frontend: 2007-07-29-RestrictPtrArg.cpp 2007-07-29-RestrictRefArg.cpp
Author: lattner
Date: Wed Aug 1 13:37:44 2007
New Revision: 40680
URL: http://llvm.org/viewvc/llvm-project?rev=40680&view=rev
Log:
these tests aren't xfailed.
Modified:
llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp
llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp
Modified: llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-07-29-RestrictPtrArg.cpp?rev=40680&r1=40679&r2=40680&view=diff
==
--- llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp (original)
+++ llvm/trunk/test/C++Frontend/2007-07-29-RestrictPtrArg.cpp Wed Aug 1
13:37:44 2007
@@ -1,5 +1,4 @@
// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias
-// NOTE: This should be un-XFAILed when the C++ type qualifiers are fixed
void foo(int * __restrict myptr1, int * myptr2) {
myptr1[0] = 0;
Modified: llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/C%2B%2BFrontend/2007-07-29-RestrictRefArg.cpp?rev=40680&r1=40679&r2=40680&view=diff
==
--- llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp (original)
+++ llvm/trunk/test/C++Frontend/2007-07-29-RestrictRefArg.cpp Wed Aug 1
13:37:44 2007
@@ -1,5 +1,4 @@
// RUN: %llvmgxx -c -emit-llvm %s -o - | llvm-dis | grep noalias
-// NOTE: This should be un-XFAILed when the C++ type qualifiers are fixed
void foo(int & __restrict myptr1, int & myptr2) {
myptr1 = 0;
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Re: [llvm-commits] Patch: JIT support for ARM
On Jul 30, 2007, at 12:15 PM, Evan Cheng wrote:
> +static const unsigned InstBits[] = {
> + 0,
> + 0,
> + 0,
> + 0,
> + 0,
> + 0XE2B0,
> + 0XE0B0,
> + 0XE0B0,
> + 0XE290,
>
> This is impossible to maintain. Please move opcode bits into .td
> files. That is, please add it to each instruction definition:
>// FIXME: Set all opcodes to 0 for now.
> : InstARM<0, am, sz, im, cstr> {
Hi Raul,
The PPC JIT is a great example of how to use this. It also has 32-
bit instructions which have registers and immediates filled in in
various places.
-Chris
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[llvm-commits] [llvm] r40688 - /llvm/trunk/lib/CodeGen/LiveVariables.cpp
Author: evancheng
Date: Wed Aug 1 15:18:21 2007
New Revision: 40688
URL: http://llvm.org/viewvc/llvm-project?rev=40688&view=rev
Log:
Bugs: missing partial uses and redundant partial defs.
Modified:
llvm/trunk/lib/CodeGen/LiveVariables.cpp
Modified: llvm/trunk/lib/CodeGen/LiveVariables.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveVariables.cpp?rev=40688&r1=40687&r2=40688&view=diff
==
--- llvm/trunk/lib/CodeGen/LiveVariables.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveVariables.cpp Wed Aug 1 15:18:21 2007
@@ -281,10 +281,24 @@
PhysRegUsed[SubReg] = true;
}
- // Remember the partial uses.
for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg);
- unsigned SuperReg = *SuperRegs; ++SuperRegs)
-PhysRegPartUse[SuperReg] = MI;
+ unsigned SuperReg = *SuperRegs; ++SuperRegs) {
+// Remember the partial use of this superreg if it was previously defined.
+bool HasPrevDef = PhysRegInfo[SuperReg] != NULL;
+if (!HasPrevDef) {
+ for (const unsigned *SSRegs = RegInfo->getSuperRegisters(SuperReg);
+ unsigned SSReg = *SSRegs; ++SSRegs) {
+if (PhysRegInfo[SSReg] != NULL) {
+ HasPrevDef = true;
+ break;
+}
+ }
+}
+if (HasPrevDef) {
+ PhysRegInfo[SuperReg] = MI;
+ PhysRegPartUse[SuperReg] = MI;
+}
+ }
}
bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI,
@@ -342,7 +356,7 @@
addRegisterKilled(Reg, PhysRegPartUse[Reg], true);
}
} else if (PhysRegPartUse[Reg])
- // Add implicit use / kill to last use of a sub-register.
+ // Add implicit use / kill to last partial use.
addRegisterKilled(Reg, PhysRegPartUse[Reg], true);
else
addRegisterDead(Reg, LastRef);
@@ -385,11 +399,13 @@
PhysRegInfo[Reg] = MI;
PhysRegUsed[Reg] = false;
+PhysRegPartDef[Reg].clear();
PhysRegPartUse[Reg] = NULL;
for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
unsigned SubReg = *SubRegs; ++SubRegs) {
PhysRegInfo[SubReg] = MI;
PhysRegUsed[SubReg] = false;
+ PhysRegPartDef[SubReg].clear();
PhysRegPartUse[SubReg] = NULL;
}
}
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[llvm-commits] [llvm] r40687 - /llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c
Author: laurov
Date: Wed Aug 1 15:07:59 2007
New Revision: 40687
URL: http://llvm.org/viewvc/llvm-project?rev=40687&view=rev
Log:
Add a test for the load/store alignment.
Added:
llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c
Added: llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c?rev=40687&view=auto
==
--- llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c (added)
+++ llvm/trunk/test/CFrontend/2007-08-01-LoadStoreAlign.c Wed Aug 1 15:07:59
2007
@@ -0,0 +1,17 @@
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | grep -c {align 1} | grep 2
+// RUN: %llvmgcc -O3 -S -o - -emit-llvm %s | llvm-as | llc
+
+struct p {
+ char a;
+ int b;
+} __attribute__ ((packed));
+
+struct p t = { 1, 10 };
+struct p u;
+
+int main () {
+ int tmp = t.b;
+ u.b = tmp;
+ return tmp;
+
+}
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[llvm-commits] [llvm-gcc-4.0] r40686 - in /llvm-gcc-4.0/trunk/gcc: llvm-convert.cpp llvm-internal.h tree.c
Author: laurov
Date: Wed Aug 1 15:06:15 2007
New Revision: 40686
URL: http://llvm.org/viewvc/llvm-project?rev=40686&view=rev
Log:
Set the alignment of loads and stores. (PR1548)
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.0/trunk/gcc/llvm-internal.h
llvm-gcc-4.0/trunk/gcc/tree.c
Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=40686&r1=40685&r2=40686&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Wed Aug 1 15:06:15 2007
@@ -1135,13 +1135,19 @@
/// ptrs, copying all of the elements.
static void CopyAggregate(Value *DestPtr, Value *SrcPtr,
bool isDstVolatile, bool isSrcVolatile,
- LLVMBuilder &Builder) {
+ unsigned Alignment, LLVMBuilder &Builder) {
assert(DestPtr->getType() == SrcPtr->getType() &&
"Cannot copy between two pointers of different type!");
const Type *ElTy = cast(DestPtr->getType())->getElementType();
+
+ unsigned TypeAlign = getTargetData().getABITypeAlignment(ElTy);
+ Alignment = MIN(Alignment, TypeAlign);
+
if (ElTy->isFirstClassType()) {
LoadInst *V = Builder.CreateLoad(SrcPtr, isSrcVolatile, "tmp");
-Builder.CreateStore(V, DestPtr, isDstVolatile);
+StoreInst *S = Builder.CreateStore(V, DestPtr, isDstVolatile);
+V->setAlignment(Alignment);
+S->setAlignment(Alignment);
} else if (const StructType *STy = dyn_cast(ElTy)) {
Constant *Zero = ConstantInt::get(Type::Int32Ty, 0);
for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) {
@@ -1150,7 +1156,8 @@
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *DElPtr = Builder.CreateGEP(DestPtr, Zero, Idx, "tmp");
Value *SElPtr = Builder.CreateGEP(SrcPtr, Zero, Idx, "tmp");
- CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Builder);
+ CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Alignment,
+Builder);
}
} else {
const ArrayType *ATy = cast(ElTy);
@@ -1159,7 +1166,8 @@
Constant *Idx = ConstantInt::get(Type::Int32Ty, i);
Value *DElPtr = Builder.CreateGEP(DestPtr, Zero, Idx, "tmp");
Value *SElPtr = Builder.CreateGEP(SrcPtr, Zero, Idx, "tmp");
- CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Builder);
+ CopyAggregate(DElPtr, SElPtr, isDstVolatile, isSrcVolatile, Alignment,
+Builder);
}
}
}
@@ -1187,7 +1195,8 @@
/// EmitAggregateCopy - Copy the elements from SrcPtr to DestPtr, using the
/// GCC type specified by GCCType to know which elements to copy.
void TreeToLLVM::EmitAggregateCopy(Value *DestPtr, Value *SrcPtr, tree type,
- bool isDstVolatile, bool isSrcVolatile) {
+ bool isDstVolatile, bool isSrcVolatile,
+ unsigned Alignment) {
if (DestPtr == SrcPtr && !isDstVolatile && !isSrcVolatile)
return; // noop copy.
@@ -1206,12 +1215,12 @@
PointerType::get(LLVMTy));
SrcPtr = CastToType(Instruction::BitCast, SrcPtr,
PointerType::get(LLVMTy));
- CopyAggregate(DestPtr, SrcPtr, isDstVolatile, isSrcVolatile, Builder);
+ CopyAggregate(DestPtr, SrcPtr, isDstVolatile, isSrcVolatile, Alignment,
+Builder);
return;
}
}
- unsigned Alignment = TYPE_ALIGN_OK(type) ? (TYPE_ALIGN_UNIT(type) & ~0U) : 0;
Value *TypeSize = Emit(TYPE_SIZE_UNIT(type), 0);
EmitMemCpy(DestPtr, SrcPtr, TypeSize, Alignment);
}
@@ -2460,14 +2469,17 @@
const Type *Ty = ConvertType(TREE_TYPE(exp));
if (!LV.isBitfield()) {
-
+unsigned Alignment = expr_align(exp) / 8;
if (!DestLoc) {
// Scalar value: emit a load.
Value *Ptr = CastToType(Instruction::BitCast, LV.Ptr,
PointerType::get(Ty));
- return Builder.CreateLoad(Ptr, isVolatile, "tmp");
+ LoadInst *LI = Builder.CreateLoad(Ptr, isVolatile, "tmp");
+ LI->setAlignment(Alignment);
+ return LI;
} else {
- EmitAggregateCopy(DestLoc, LV.Ptr, TREE_TYPE(exp), false, isVolatile);
+ EmitAggregateCopy(DestLoc, LV.Ptr, TREE_TYPE(exp), false, isVolatile,
+Alignment);
return 0;
}
} else {
@@ -2903,6 +2915,7 @@
LValue LV = EmitLV(TREE_OPERAND(exp, 0));
bool isVolatile = TREE_THIS_VOLATILE(TREE_OPERAND(exp, 0));
+ unsigned Alignment = expr_align(TREE_OPERAND(exp, 0)) / 8;
if (!LV.isBitfield()) {
const Type *ValTy = ConvertType(TREE_TYPE(TREE_OPERAND(exp, 1)));
@@ -2915,14 +2928,16 @@
RHS = CastToAnyType(RHS, Op1Signed, PT->getElementType(), Op0Signed);
else
LV.Ptr = BitCastToType(LV.Ptr,
[llvm-commits] [llvm-gcc-4.2] r40684 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Author: asl Date: Wed Aug 1 14:59:14 2007 New Revision: 40684 URL: http://llvm.org/viewvc/llvm-project?rev=40684&view=rev Log: Use external weak linkage for weak reference alisees by default Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=40684&r1=40683&r2=40684&view=diff == --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Aug 1 14:59:14 2007 @@ -624,13 +624,13 @@ if (GlobalVariable *GV = dyn_cast(V)) Aliasee = new GlobalVariable(GV->getType(), GV->isConstant(), - GlobalVariable::ExternalLinkage, + GlobalVariable::ExternalWeakLinkage, NULL, AliaseeName, TheModule); else if (Function *F = dyn_cast(V)) Aliasee = new Function(F->getFunctionType(), - Function::ExternalLinkage, + Function::ExternalWeakLinkage, AliaseeName, TheModule); else ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40682 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/ARM/unaligned_load_store.ll
Author: laurov
Date: Wed Aug 1 14:34:21 2007
New Revision: 40682
URL: http://llvm.org/viewvc/llvm-project?rev=40682&view=rev
Log:
Expand unaligned loads/stores when the target doesn't support them. (PR1548)
Added:
llvm/trunk/test/CodeGen/ARM/unaligned_load_store.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=40682&r1=40681&r2=40682&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 1 14:34:21 2007
@@ -550,6 +550,93 @@
return Result;
}
+/// ExpandUnalignedStore - Expands an unaligned store to 2 half-size stores.
+static
+SDOperand ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
+ TargetLowering &TLI) {
+ assert(MVT::isInteger(ST->getStoredVT()) &&
+ "Non integer unaligned stores not implemented.");
+ int SVOffset = ST->getSrcValueOffset();
+ SDOperand Chain = ST->getChain();
+ SDOperand Ptr = ST->getBasePtr();
+ SDOperand Val = ST->getValue();
+ MVT::ValueType VT = Val.getValueType();
+ // Get the half-size VT
+ MVT::ValueType NewStoredVT = ST->getStoredVT() - 1;
+ int NumBits = MVT::getSizeInBits(NewStoredVT);
+ int Alignment = ST->getAlignment();
+ int IncrementSize = NumBits / 8;
+
+ // Divide the stored value in two parts.
+ SDOperand ShiftAmount = DAG.getConstant(NumBits, TLI.getShiftAmountTy());
+ SDOperand Lo = Val;
+ SDOperand Hi = DAG.getNode(ISD::SRL, VT, Val, ShiftAmount);
+
+ // Store the two parts
+ SDOperand Store1, Store2;
+ Store1 = DAG.getTruncStore(Chain, TLI.isLittleEndian()?Lo:Hi, Ptr,
+ ST->getSrcValue(), SVOffset, NewStoredVT,
+ ST->isVolatile(), Alignment);
+ Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
+DAG.getConstant(IncrementSize, TLI.getPointerTy()));
+ Store2 = DAG.getTruncStore(Chain, TLI.isLittleEndian()?Hi:Lo, Ptr,
+ ST->getSrcValue(), SVOffset + IncrementSize,
+ NewStoredVT, ST->isVolatile(), Alignment);
+
+ return DAG.getNode(ISD::TokenFactor, MVT::Other, Store1, Store2);
+}
+
+/// ExpandUnalignedLoad - Expands an unaligned load to 2 half-size loads.
+static
+SDOperand ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
+ TargetLowering &TLI) {
+ assert(MVT::isInteger(LD->getLoadedVT()) &&
+ "Non integer unaligned loads not implemented.");
+ int SVOffset = LD->getSrcValueOffset();
+ SDOperand Chain = LD->getChain();
+ SDOperand Ptr = LD->getBasePtr();
+ MVT::ValueType VT = LD->getValueType(0);
+ MVT::ValueType NewLoadedVT = LD->getLoadedVT() - 1;
+ int NumBits = MVT::getSizeInBits(NewLoadedVT);
+ int Alignment = LD->getAlignment();
+ int IncrementSize = NumBits / 8;
+ ISD::LoadExtType HiExtType = LD->getExtensionType();
+
+ // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD.
+ if (HiExtType == ISD::NON_EXTLOAD)
+HiExtType = ISD::ZEXTLOAD;
+
+ // Load the value in two parts
+ SDOperand Lo, Hi;
+ if (TLI.isLittleEndian()) {
+Lo = DAG.getExtLoad(ISD::ZEXTLOAD, VT, Chain, Ptr, LD->getSrcValue(),
+SVOffset, NewLoadedVT, LD->isVolatile(), Alignment);
+Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
+ DAG.getConstant(IncrementSize, TLI.getPointerTy()));
+Hi = DAG.getExtLoad(HiExtType, VT, Chain, Ptr, LD->getSrcValue(),
+SVOffset + IncrementSize, NewLoadedVT,
LD->isVolatile(),
+Alignment);
+ } else {
+Hi = DAG.getExtLoad(HiExtType, VT, Chain, Ptr, LD->getSrcValue(), SVOffset,
+NewLoadedVT,LD->isVolatile(), Alignment);
+Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
+ DAG.getConstant(IncrementSize, TLI.getPointerTy()));
+Lo = DAG.getExtLoad(ISD::ZEXTLOAD, VT, Chain, Ptr, LD->getSrcValue(),
+SVOffset + IncrementSize, NewLoadedVT,
LD->isVolatile(),
+Alignment);
+ }
+
+ // aggregate the two parts
+ SDOperand ShiftAmount = DAG.getConstant(NumBits, TLI.getShiftAmountTy());
+ SDOperand Result = DAG.getNode(ISD::SHL, VT, Hi, ShiftAmount);
+ Result = DAG.getNode(ISD::OR, VT, Result, Lo);
+
+ SDOperand TF = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
+ Hi.getValue(1));
+
+ SDOperand Ops[] = { Result, TF };
+ return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other), Ops, 2);
+}
/// LegalizeOp - We know that the specified value has a legal type, and
/// that its operands are legal. Now ensure that the operation itself
@@ -1507,7 +1594,22 @@
switch (TLI
[llvm-commits] [llvm-gcc-4.2] r40683 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: asl Date: Wed Aug 1 14:58:07 2007 New Revision: 40683 URL: http://llvm.org/viewvc/llvm-project?rev=40683&view=rev Log: Fix fallout from last API change Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=40683&r1=40682&r2=40683&view=diff == --- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original) +++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 1 14:58:07 2007 @@ -4935,7 +4935,7 @@ Function *Intr = Intrinsic::getDeclaration(TheModule, Intrinsic::init_trampoline); - Builder.CreateCall(Intr, Ops, 3); + Builder.CreateCall(Intr, Ops, Ops+3); return true; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r40685 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: asl
Date: Wed Aug 1 15:00:04 2007
New Revision: 40685
URL: http://llvm.org/viewvc/llvm-project?rev=40685&view=rev
Log:
Emit blank ctors (e.g. struct foo = {}) properly.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=40685&r1=40684&r2=40685&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Wed Aug 1 15:00:04 2007
@@ -5521,8 +5521,9 @@
case ARRAY_TYPE:
case RECORD_TYPE:
default:
-if (elt) {
+if (elt && VEC_length(constructor_elt, elt)) {
// We don't handle elements yet.
+
TODO(exp);
}
return 0;
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[llvm-commits] [llvm] r40689 - /llvm/trunk/lib/Target/X86/X86InstrInfo.td
Author: evancheng
Date: Wed Aug 1 15:22:37 2007
New Revision: 40689
URL: http://llvm.org/viewvc/llvm-project?rev=40689&view=rev
Log:
Be more precise.
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=40689&r1=40688&r2=40689&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Aug 1 15:22:37 2007
@@ -548,7 +548,7 @@
// This probably ought to be moved to a def : Pat<> if the
// syntax can be accepted.
[(set AL, (mul AL, GR8:$src))]>,
- Imp<[AL],[AX]>; // AL,AH = AL*GR8
+ Imp<[AL],[AL,AH]>; // AL,AH = AL*GR8
def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src), "mul{w}\t$src", []>,
Imp<[AX],[AX,DX]>, OpSize;// AX,DX = AX*GR16
def MUL32r : I<0xF7, MRM4r, (outs), (ins GR32:$src), "mul{l}\t$src", []>,
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[llvm-commits] [llvm] r40690 - /llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
Author: evancheng
Date: Wed Aug 1 15:26:40 2007
New Revision: 40690
URL: http://llvm.org/viewvc/llvm-project?rev=40690&view=rev
Log:
New test. Bogus implicit-def prevented a copy from being coalesced.
Added:
llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
Added: llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll?rev=40690&view=auto
==
--- llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll Wed Aug 1
15:26:40 2007
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=x86 | not grep movl
+
+define i8 @t(i8 zeroext %x, i8 zeroext %y) zeroext {
+ %tmp2 = add i8 %x, 2
+ %tmp4 = add i8 %y, -2
+ %tmp5 = mul i8 %tmp4, %tmp2
+ ret i8 %tmp5
+}
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[llvm-commits] [llvm] r40691 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td
Author: evancheng Date: Wed Aug 1 16:42:24 2007 New Revision: 40691 URL: http://llvm.org/viewvc/llvm-project?rev=40691&view=rev Log: Missing Requires. Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=40691&r1=40690&r2=40691&view=diff == --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Aug 1 16:42:24 2007 @@ -2618,7 +2618,7 @@ // (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr) def : Pat<(vector_extract (bc_v4i32 (v4f32 (scalar_to_vector (loadf32 addr:$src, (iPTR 0)), - (MOV32rm addr:$src)>; + (MOV32rm addr:$src)>, Requires<[HasSSE2]>; def : Pat<(vector_extract (bc_v2i64 (v2f64 (scalar_to_vector (loadf64 addr:$src, (iPTR 0)), - (MOV64rm addr:$src)>; + (MOV64rm addr:$src)>, Requires<[HasSSE2, In64BitMode]>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40692 - in /llvm/trunk: include/llvm/Analysis/MemoryDependenceAnalysis.h lib/Analysis/MemoryDependenceAnalysis.cpp lib/Transforms/Scalar/GVN.cpp
Author: resistor
Date: Wed Aug 1 17:01:54 2007
New Revision: 40692
URL: http://llvm.org/viewvc/llvm-project?rev=40692&view=rev
Log:
Make non-local memdep not be recursive, and fix a bug on 403.gcc that this
exposed.
Modified:
llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h
llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
llvm/trunk/lib/Transforms/Scalar/GVN.cpp
Modified: llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h?rev=40692&r1=40691&r2=40692&view=diff
==
--- llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h (original)
+++ llvm/trunk/include/llvm/Analysis/MemoryDependenceAnalysis.h Wed Aug 1
17:01:54 2007
@@ -43,9 +43,8 @@
Instruction* getCallSiteDependency(CallSite C, Instruction* start,
bool local = true);
-bool nonLocalHelper(Instruction* query, BasicBlock* block,
-DenseMap& resp,
-SmallPtrSet& visited);
+void nonLocalHelper(Instruction* query, BasicBlock* block,
+DenseMap& resp);
public:
static Instruction* NonLocal;
@@ -74,7 +73,7 @@
Instruction* getDependency(Instruction* query, Instruction* start = 0,
BasicBlock* block = 0);
-bool getNonLocalDependency(Instruction* query,
+void getNonLocalDependency(Instruction* query,
DenseMap& resp);
/// removeInstruction - Remove an instruction from the dependence analysis,
Modified: llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp?rev=40692&r1=40691&r2=40692&view=diff
==
--- llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp Wed Aug 1 17:01:54
2007
@@ -101,63 +101,62 @@
return NonLocal;
}
-bool MemoryDependenceAnalysis::nonLocalHelper(Instruction* query,
+void MemoryDependenceAnalysis::nonLocalHelper(Instruction* query,
BasicBlock* block,
- DenseMap&
resp,
- SmallPtrSet&
visited) {
- if (resp.count(block))
-return resp[block] != None;
+ DenseMap&
resp) {
+ SmallPtrSet visited;
+ SmallVector stack;
+ stack.push_back(block);
- Instruction* localDep = getDependency(query, 0, block);
- if (localDep != NonLocal) {
-resp.insert(std::make_pair(block, localDep));
-return true;
+ while (!stack.empty()) {
+BasicBlock* BB = stack.back();
+
+visited.insert(BB);
+
+if (resp.count(BB)) {
+ stack.pop_back();
+ continue;
+}
+
+if (BB != block) {
+ Instruction* localDep = getDependency(query, 0, BB);
+ if (localDep != NonLocal) {
+resp.insert(std::make_pair(BB, localDep));
+continue;
+ }
+}
+
+bool predOnStack = false;
+bool inserted = false;
+for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
+ PI != PE; ++PI)
+ if (!visited.count(*PI)) {
+stack.push_back(*PI);
+inserted = true;
+ } else
+predOnStack = true;
+
+if (inserted)
+ continue;
+else if (!inserted && !predOnStack) {
+ resp.insert(std::make_pair(BB, None));
+} else if (!inserted && predOnStack){
+ resp.insert(std::make_pair(BB, NonLocal));
+}
+
+stack.pop_back();
}
-
- visited.insert(block);
-
- bool inserted = false;
- bool predOnStack = false;
- for (pred_iterator PI = pred_begin(block), PE = pred_end(block);
- PI != PE; ++PI)
-if (!visited.count(*PI))
- inserted |= nonLocalHelper(query, *PI, resp, visited);
-else
- predOnStack = true;
-
- visited.erase(block);
-
- if (!inserted && !predOnStack)
-resp.insert(std::make_pair(block, None));
- else if (inserted && predOnStack)
-resp.insert(std::make_pair(block, NonLocal));
-
- return inserted;
}
-bool MemoryDependenceAnalysis::getNonLocalDependency(Instruction* query,
+void MemoryDependenceAnalysis::getNonLocalDependency(Instruction* query,
DenseMap& resp) {
Instruction* localDep = getDependency(query);
if (localDep != NonLocal) {
resp.insert(std::make_pair(query->getParent(), localDep));
-return true;
+return;
}
- bool inserted = false;
- SmallPtrSet visited;
- visited.insert(query->getParent());
-
- BasicBlock* parent = query->getParent();
- for (pred_iterator PI = pred_begin(parent), PE = pred_end(parent);
- PI != PE; ++PI)
Re: [llvm-commits] [llvm] r40502 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
On Aug 1, 2007, at 10:22 AM, Chris Lattner wrote:
> Hi Evan,
>
> On Jul 25, 2007, at 11:30 PM, Evan Cheng wrote:
>
>> I do want to support static codegen for JIT. If non-JIT mode silently
>> change it to dynamic-no-pic, then we can't emulate with llc.
>>
>> An alternative is to define a code model that is somewhere between
>> small and medium. It's only used by Mac OS / static though. Not sure
>> if that's cleaner?
>
> Okay, instead of checking for isTargetDarwin() in this low-level
> place, what do you think of adding a new subtarget field, which is
> only set on darwin, and checking that instead? The idea of doing
> this is that instead of checking isTargetDarwin(), you would check ST-
>> hasNoSmallModel() or something, which is more obvious to the reader
> what is going on.
A subtarget field is an acceptable compromise. However, it's not
hasNoSmallModel(). We are still using small code model (i.e.
everything must fit within 4G). It's just the lower 4G is not available.
Evan
>
> What do you think?
>
> -Chris
>
>> Evan
>>
>> Sent from my iPhone
>>
>> On Jul 25, 2007, at 10:47 PM, Chris Lattner <[EMAIL PROTECTED]>
>> wrote:
>>
>>>
>>> On Jul 25, 2007, at 4:41 PM, Evan Cheng wrote:
>>>
Author: evancheng
Date: Wed Jul 25 18:41:36 2007
New Revision: 40502
URL: http://llvm.org/viewvc/llvm-project?rev=40502&view=rev
Log:
Mac OS X x86-64 lower 4G address is not available.
>>>
>>> Hi Evan,
>>>
>>> Would it be better to have the X86 backend change the relo module to
>>> mdynamic-no-pic on darwin? It seems strange to test the os in a
>>> low-
>>> level place like this.
>>>
>>> -Chirs
>>>
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
X86ISelDAGToDAG.cpp?rev=40502&r1=40501&r2=40502&view=diff
===
===
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Jul 25
18:41:36 2007
@@ -615,7 +615,8 @@
SDOperand N0 = N.getOperand(0);
if (GlobalAddressSDNode *G = dyn_cast
(N0)) {
GlobalValue *GV = G->getGlobal();
-bool isAbs32 = !is64Bit || isStatic;
+// Mac OS X X86-64 lower 4G address is not available.
+bool isAbs32 = !is64Bit || (isStatic && !Subtarget-
> isTargetDarwin());
if (isAbs32 || isRoot) {
AM.GV = GV;
AM.Disp += G->getOffset();
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>>>
>>> ___
>>> llvm-commits mailing list
>>> llvm-commits@cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>> ___
>> llvm-commits mailing list
>> llvm-commits@cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> ___
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[llvm-commits] [llvm-gcc-4.0] r40694 - /llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp
Author: lattner
Date: Wed Aug 1 17:21:42 2007
New Revision: 40694
URL: http://llvm.org/viewvc/llvm-project?rev=40694&view=rev
Log:
fix the build with the new llvmbuilder changes.
Modified:
llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp
Modified: llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp?rev=40694&r1=40693&r2=40694&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/config/rs6000/llvm-rs6000.cpp Wed Aug 1 17:21:42
2007
@@ -57,7 +57,7 @@
Ops.erase(Ops.begin() + OpNum);
Ops[OpNum] = Ptr;
- Value *V = Builder.CreateCall(IntFn, &Ops[0], Ops.size());
+ Value *V = Builder.CreateCall(IntFn, &Ops[0], &Ops[0]+Ops.size());
if (V->getType() != Type::VoidTy) {
V->setName("tmp");
@@ -297,7 +297,8 @@
const VectorType *PTy = cast(ResultType);
unsigned N = GetAltivecTypeNumFromType(PTy->getElementType());
Function *smax = Intrinsic::getDeclaration(TheModule, smax_iid[N]);
-Result = Builder.CreateCall(smax, Ops[0], Result, "tmp");
+Value *ActualOps[] = { Ops[0], Result };
+Result = Builder.CreateCall(smax, ActualOps, ActualOps+2, "tmp");
return true;
}
case ALTIVEC_BUILTIN_ABSS_V4SI:
@@ -321,9 +322,11 @@
Function *smax = Intrinsic::getDeclaration(TheModule, smax_iid[N]);
Function *subss = Intrinsic::getDeclaration(TheModule, subss_iid[N]);
-Result = Builder.CreateCall(subss, Constant::getNullValue(ResultType),
-Ops[0], "tmp");
-Result = Builder.CreateCall(smax, Ops[0], Result, "tmp");
+Value *ActualOps[] = { Constant::getNullValue(ResultType), Ops[0] };
+Result = Builder.CreateCall(subss, ActualOps, ActualOps+2, "tmp");
+ActualOps[0] = Ops[0];
+ActualOps[1] = Result;
+Result = Builder.CreateCall(smax, ActualOps, ActualOps+2, "tmp");
return true;
}
}
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[llvm-commits] [llvm] r40695 - in /llvm/trunk: lib/Transforms/Scalar/LoopUnswitch.cpp lib/VMCore/Dominators.cpp test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
Author: dpatel
Date: Wed Aug 1 17:23:50 2007
New Revision: 40695
URL: http://llvm.org/viewvc/llvm-project?rev=40695&view=rev
Log:
Update dominator info for the middle blocks created while spliting
exit edge to preserve LCSSA.
Fix dominance frontier update during loop unswitch. This fixes PR 1589.
Added:
llvm/trunk/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
llvm/trunk/lib/VMCore/Dominators.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=40695&r1=40694&r2=40695&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Wed Aug 1 17:23:50 2007
@@ -543,17 +543,8 @@
std::swap(TrueDest, FalseDest);
// Insert the new branch.
- BranchInst *BRI = new BranchInst(TrueDest, FalseDest, BranchVal, InsertPt);
+ new BranchInst(TrueDest, FalseDest, BranchVal, InsertPt);
- // Update dominator info.
- // BranchVal is a new preheader so it dominates true and false destination
- // loop headers.
- if (DominatorTree *DT = getAnalysisToUpdate()) {
-DT->changeImmediateDominator(TrueDest, BRI->getParent());
-DT->changeImmediateDominator(FalseDest, BRI->getParent());
- }
- // No need to update DominanceFrontier. BRI->getParent() dominated TrueDest
- // and FalseDest anyway. Now it immediately dominates them.
}
@@ -635,12 +626,14 @@
// Split all of the edges from inside the loop to their exit blocks. Update
// the appropriate Phi nodes as we do so.
+ SmallVector MiddleBlocks;
for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) {
BasicBlock *ExitBlock = ExitBlocks[i];
std::vector Preds(pred_begin(ExitBlock), pred_end(ExitBlock));
for (unsigned j = 0, e = Preds.size(); j != e; ++j) {
BasicBlock* MiddleBlock = SplitEdge(Preds[j], ExitBlock, this);
+ MiddleBlocks.push_back(MiddleBlock);
BasicBlock* StartBlock = Preds[j];
BasicBlock* EndBlock;
if (MiddleBlock->getSinglePredecessor() == ExitBlock) {
@@ -685,6 +678,9 @@
// Add exit blocks to the loop blocks.
LoopBlocks.insert(LoopBlocks.end(), ExitBlocks.begin(), ExitBlocks.end());
+ DominanceFrontier *DF = getAnalysisToUpdate();
+ DominatorTree *DT = getAnalysisToUpdate();
+
// Next step, clone all of the basic blocks that make up the loop (including
// the loop preheader and exit blocks), keeping track of the mapping between
// the instructions and blocks.
@@ -698,16 +694,21 @@
LPM->cloneBasicBlockSimpleAnalysis(LoopBlocks[i], New, L);
}
- // Update dominator info
- DominanceFrontier *DF = getAnalysisToUpdate();
- if (DominatorTree *DT = getAnalysisToUpdate())
-for (unsigned i = 0, e = LoopBlocks.size(); i != e; ++i) {
- BasicBlock *LBB = LoopBlocks[i];
- BasicBlock *NBB = NewBlocks[i];
- CloneDomInfo(NBB, LBB, NewPreheader, OrigPreheader,
- OrigHeader, DT, DF, ValueMap);
+ // OutSiders are basic block that are dominated by original header and
+ // at the same time they are not part of loop.
+ SmallPtrSet OutSiders;
+ if (DT) {
+DomTreeNode *OrigHeaderNode = DT->getNode(OrigHeader);
+for(std::vector::iterator DI = OrigHeaderNode->begin(),
+ DE = OrigHeaderNode->end(); DI != DE; ++DI) {
+ BasicBlock *B = (*DI)->getBlock();
+
+ DenseMap::iterator VI = ValueMap.find(B);
+ if (VI == ValueMap.end())
+OutSiders.insert(B);
}
-
+ }
+
// Splice the newly inserted blocks into the function right before the
// original preheader.
F->getBasicBlockList().splice(LoopBlocks[0], F->getBasicBlockList(),
@@ -759,7 +760,61 @@
EmitPreheaderBranchOnCondition(LIC, Val, NewBlocks[0], LoopBlocks[0], OldBR);
OldBR->eraseFromParent();
LPM->deleteSimpleAnalysisValue(OldBR, L);
-
+
+ // Update dominator info
+ if (DF && DT) {
+
+// Clone dominator info for all cloned basic block.
+for (unsigned i = 0, e = LoopBlocks.size(); i != e; ++i) {
+ BasicBlock *LBB = LoopBlocks[i];
+ BasicBlock *NBB = NewBlocks[i];
+ CloneDomInfo(NBB, LBB, NewPreheader, OrigPreheader,
+ OrigHeader, DT, DF, ValueMap);
+
+ // Remove any OutSiders from LBB and NBB's dominance frontier.
+ DominanceFrontier::iterator LBBI = DF->find(LBB);
+ if (LBBI != DF->end()) {
+DominanceFrontier::DomSetType &LBSet = LBBI->second;
+for (DominanceFrontier::DomSetType::iterator LI = LBSet.begin(),
+ LE = LBSet.end(); LI != LE; ++LI) {
+ BasicBlock *B = *LI;
+ if (OutSiders.count(B))
+DF->removeFromFrontier(LBBI, B);
+}
+ }
+
+ // Remove any OutSiders from LBB and NBB's dominance frontier.
+ DominanceFrontier::iterator NBBI = DF->find(NBB);
+
Re: [llvm-commits] [llvm] r40502 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
On Aug 1, 2007, at 3:20 PM, Evan Cheng wrote: >>> I do want to support static codegen for JIT. If non-JIT mode >>> silently >>> change it to dynamic-no-pic, then we can't emulate with llc. >>> >>> An alternative is to define a code model that is somewhere between >>> small and medium. It's only used by Mac OS / static though. Not sure >>> if that's cleaner? >> >> Okay, instead of checking for isTargetDarwin() in this low-level >> place, what do you think of adding a new subtarget field, which is >> only set on darwin, and checking that instead? The idea of doing >> this is that instead of checking isTargetDarwin(), you would check >> ST- >>> hasNoSmallModel() or something, which is more obvious to the reader >> what is going on. > > A subtarget field is an acceptable compromise. However, it's not > hasNoSmallModel(). We are still using small code model (i.e. > everything must fit within 4G). It's just the lower 4G is not > available. Ah, so everything fits in "some" 4g, but just not the "low" 4g? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40502 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
On Aug 1, 2007, at 3:36 PM, Chris Lattner wrote: > > On Aug 1, 2007, at 3:20 PM, Evan Cheng wrote: > I do want to support static codegen for JIT. If non-JIT mode silently change it to dynamic-no-pic, then we can't emulate with llc. An alternative is to define a code model that is somewhere between small and medium. It's only used by Mac OS / static though. Not sure if that's cleaner? >>> >>> Okay, instead of checking for isTargetDarwin() in this low-level >>> place, what do you think of adding a new subtarget field, which is >>> only set on darwin, and checking that instead? The idea of doing >>> this is that instead of checking isTargetDarwin(), you would check >>> ST- hasNoSmallModel() or something, which is more obvious to the reader >>> what is going on. >> >> A subtarget field is an acceptable compromise. However, it's not >> hasNoSmallModel(). We are still using small code model (i.e. >> everything must fit within 4G). It's just the lower 4G is not >> available. > > Ah, so everything fits in "some" 4g, but just not the "low" 4g? Yep. Evan > > -Chris > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40697 - in /llvm/trunk/lib/Target/PowerPC: PPCInstr64Bit.td PPCInstrInfo.td
Author: evancheng Date: Wed Aug 1 18:07:38 2007 New Revision: 40697 URL: http://llvm.org/viewvc/llvm-project?rev=40697&view=rev Log: Some out operands were incorrectly specified as input operands. Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=40697&r1=40696&r2=40697&view=diff == --- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Wed Aug 1 18:07:38 2007 @@ -272,13 +272,13 @@ "mulhdu $rT, $rA, $rB", IntMulHWU, [(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>; -def CMPD : XForm_16_ext<31, 0, (outs), (ins CRRC:$crD, G8RC:$rA, G8RC:$rB), +def CMPD : XForm_16_ext<31, 0, (outs CRRC:$crD), (ins G8RC:$rA, G8RC:$rB), "cmpd $crD, $rA, $rB", IntCompare>, isPPC64; -def CMPLD : XForm_16_ext<31, 32, (outs), (ins CRRC:$crD, G8RC:$rA, G8RC:$rB), +def CMPLD : XForm_16_ext<31, 32, (outs CRRC:$crD), (ins G8RC:$rA, G8RC:$rB), "cmpld $crD, $rA, $rB", IntCompare>, isPPC64; -def CMPDI : DForm_5_ext<11, (outs), (ins CRRC:$crD, G8RC:$rA, s16imm:$imm), +def CMPDI : DForm_5_ext<11, (outs CRRC:$crD), (ins G8RC:$rA, s16imm:$imm), "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64; -def CMPLDI : DForm_6_ext<10, (outs), (ins CRRC:$dst, G8RC:$src1, u16imm:$src2), +def CMPLDI : DForm_6_ext<10, (outs CRRC:$dst), (ins G8RC:$src1, u16imm:$src2), "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64; def SLD : XForm_6<31, 27, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), @@ -374,7 +374,7 @@ PPC970_DGroup_Cracked; // Update forms. -def LHAU8 : DForm_1<43, (outs G8RC:$rD), (ins ptr_rc:$ea_result, symbolLo:$disp, +def LHAU8 : DForm_1<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp, ptr_rc:$rA), "lhau $rD, $disp($rA)", LdStGeneral, []>, RegConstraint<"$rA = $ea_result">, @@ -407,15 +407,15 @@ // Update forms. -def LBZU8 : DForm_1<35, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), +def LBZU8 : DForm_1<35, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lbzu $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; -def LHZU8 : DForm_1<41, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), +def LHZU8 : DForm_1<41, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lhzu $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; -def LWZU8 : DForm_1<33, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), +def LWZU8 : DForm_1<33, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lwzu $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; @@ -431,7 +431,7 @@ "ldx $rD, $src", LdStLD, [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64; -def LDU : DSForm_1<58, 1, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memrix:$addr), +def LDU : DSForm_1<58, 1, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memrix:$addr), "ldu $rD, $addr", LdStLD, []>, RegConstraint<"$addr.reg = $ea_result">, isPPC64, NoEncode<"$ea_result">; Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=40697&r1=40696&r2=40697&view=diff == --- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original) +++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Wed Aug 1 18:07:38 2007 @@ -472,32 +472,32 @@ // Unindexed (r+i) Loads with Update (preinc). -def LBZU : DForm_1<35, (outs GPRC:$rD), (ins ptr_rc:$ea_result, memri:$addr), +def LBZU : DForm_1<35, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lbzu $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; -def LHAU : DForm_1<43, (outs GPRC:$rD), (ins ptr_rc:$ea_result, memri:$addr), +def LHAU : DForm_1<43, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lhau $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; -def LHZU : DForm_1<41, (outs GPRC:$rD), (ins ptr_rc:$ea_re
[llvm-commits] [llvm] r40696 - in /llvm/trunk/test/Verifier: invoke-1.ll invoke-2.ll
Author: reid
Date: Wed Aug 1 18:07:36 2007
New Revision: 40696
URL: http://llvm.org/viewvc/llvm-project?rev=40696&view=rev
Log:
Make sure these tests pass for the right reasons (verifier error, rather than
failure to assemble).
Modified:
llvm/trunk/test/Verifier/invoke-1.ll
llvm/trunk/test/Verifier/invoke-2.ll
Modified: llvm/trunk/test/Verifier/invoke-1.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Verifier/invoke-1.ll?rev=40696&r1=40695&r2=40696&view=diff
==
--- llvm/trunk/test/Verifier/invoke-1.ll (original)
+++ llvm/trunk/test/Verifier/invoke-1.ll Wed Aug 1 18:07:36 2007
@@ -1,10 +1,10 @@
-; RUN: not llvm-as < %s -o /dev/null -f
+; RUN: llvm-upgrade < %s | not llvm-as &| grep {not verify as correct}
; PR1042
int %foo() {
-%A = invoke int %foo( )
-to label %L unwind label %L ;
[#uses=1]
+ %A = invoke int %foo( )
+to label %L unwind label %L ; [#uses=1]
-L: ; preds = %0, %0
-ret int %A
+L: ; preds = %0, %0
+ ret int %A
}
Modified: llvm/trunk/test/Verifier/invoke-2.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Verifier/invoke-2.ll?rev=40696&r1=40695&r2=40696&view=diff
==
--- llvm/trunk/test/Verifier/invoke-2.ll (original)
+++ llvm/trunk/test/Verifier/invoke-2.ll Wed Aug 1 18:07:36 2007
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s -o /dev/null -f
+; RUN: llvm-upgrade < %s | not llvm-as -f &| grep {not verify as correct}
; PR1042
int %foo() {
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[llvm-commits] [llvm] r40698 - in /llvm/trunk/lib: Transforms/Scalar/LoopUnswitch.cpp VMCore/Dominators.cpp
Author: dpatel
Date: Wed Aug 1 18:24:50 2007
New Revision: 40698
URL: http://llvm.org/viewvc/llvm-project?rev=40698&view=rev
Log:
Undo previous check-in.
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
llvm/trunk/lib/VMCore/Dominators.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp?rev=40698&r1=40697&r2=40698&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnswitch.cpp Wed Aug 1 18:24:50 2007
@@ -543,8 +543,17 @@
std::swap(TrueDest, FalseDest);
// Insert the new branch.
- new BranchInst(TrueDest, FalseDest, BranchVal, InsertPt);
+ BranchInst *BRI = new BranchInst(TrueDest, FalseDest, BranchVal, InsertPt);
+ // Update dominator info.
+ // BranchVal is a new preheader so it dominates true and false destination
+ // loop headers.
+ if (DominatorTree *DT = getAnalysisToUpdate()) {
+DT->changeImmediateDominator(TrueDest, BRI->getParent());
+DT->changeImmediateDominator(FalseDest, BRI->getParent());
+ }
+ // No need to update DominanceFrontier. BRI->getParent() dominated TrueDest
+ // and FalseDest anyway. Now it immediately dominates them.
}
@@ -626,14 +635,12 @@
// Split all of the edges from inside the loop to their exit blocks. Update
// the appropriate Phi nodes as we do so.
- SmallVector MiddleBlocks;
for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i) {
BasicBlock *ExitBlock = ExitBlocks[i];
std::vector Preds(pred_begin(ExitBlock), pred_end(ExitBlock));
for (unsigned j = 0, e = Preds.size(); j != e; ++j) {
BasicBlock* MiddleBlock = SplitEdge(Preds[j], ExitBlock, this);
- MiddleBlocks.push_back(MiddleBlock);
BasicBlock* StartBlock = Preds[j];
BasicBlock* EndBlock;
if (MiddleBlock->getSinglePredecessor() == ExitBlock) {
@@ -678,9 +685,6 @@
// Add exit blocks to the loop blocks.
LoopBlocks.insert(LoopBlocks.end(), ExitBlocks.begin(), ExitBlocks.end());
- DominanceFrontier *DF = getAnalysisToUpdate();
- DominatorTree *DT = getAnalysisToUpdate();
-
// Next step, clone all of the basic blocks that make up the loop (including
// the loop preheader and exit blocks), keeping track of the mapping between
// the instructions and blocks.
@@ -694,21 +698,16 @@
LPM->cloneBasicBlockSimpleAnalysis(LoopBlocks[i], New, L);
}
- // OutSiders are basic block that are dominated by original header and
- // at the same time they are not part of loop.
- SmallPtrSet OutSiders;
- if (DT) {
-DomTreeNode *OrigHeaderNode = DT->getNode(OrigHeader);
-for(std::vector::iterator DI = OrigHeaderNode->begin(),
- DE = OrigHeaderNode->end(); DI != DE; ++DI) {
- BasicBlock *B = (*DI)->getBlock();
-
- DenseMap::iterator VI = ValueMap.find(B);
- if (VI == ValueMap.end())
-OutSiders.insert(B);
+ // Update dominator info
+ DominanceFrontier *DF = getAnalysisToUpdate();
+ if (DominatorTree *DT = getAnalysisToUpdate())
+for (unsigned i = 0, e = LoopBlocks.size(); i != e; ++i) {
+ BasicBlock *LBB = LoopBlocks[i];
+ BasicBlock *NBB = NewBlocks[i];
+ CloneDomInfo(NBB, LBB, NewPreheader, OrigPreheader,
+ OrigHeader, DT, DF, ValueMap);
}
- }
-
+
// Splice the newly inserted blocks into the function right before the
// original preheader.
F->getBasicBlockList().splice(LoopBlocks[0], F->getBasicBlockList(),
@@ -760,61 +759,7 @@
EmitPreheaderBranchOnCondition(LIC, Val, NewBlocks[0], LoopBlocks[0], OldBR);
OldBR->eraseFromParent();
LPM->deleteSimpleAnalysisValue(OldBR, L);
-
- // Update dominator info
- if (DF && DT) {
-
-// Clone dominator info for all cloned basic block.
-for (unsigned i = 0, e = LoopBlocks.size(); i != e; ++i) {
- BasicBlock *LBB = LoopBlocks[i];
- BasicBlock *NBB = NewBlocks[i];
- CloneDomInfo(NBB, LBB, NewPreheader, OrigPreheader,
- OrigHeader, DT, DF, ValueMap);
-
- // Remove any OutSiders from LBB and NBB's dominance frontier.
- DominanceFrontier::iterator LBBI = DF->find(LBB);
- if (LBBI != DF->end()) {
-DominanceFrontier::DomSetType &LBSet = LBBI->second;
-for (DominanceFrontier::DomSetType::iterator LI = LBSet.begin(),
- LE = LBSet.end(); LI != LE; ++LI) {
- BasicBlock *B = *LI;
- if (OutSiders.count(B))
-DF->removeFromFrontier(LBBI, B);
-}
- }
-
- // Remove any OutSiders from LBB and NBB's dominance frontier.
- DominanceFrontier::iterator NBBI = DF->find(NBB);
- if (NBBI != DF->end()) {
-DominanceFrontier::DomSetType NBSet = NBBI->second;
-for (DominanceFrontier::DomSetType::iterator NI = NBSet.begin(),
- NE = NBSet.end(); NI != NE; ++NI) {
[llvm-commits] [llvm-gcc-4.2] r40699 - /llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp
Author: lattner
Date: Wed Aug 1 18:32:32 2007
New Revision: 40699
URL: http://llvm.org/viewvc/llvm-project?rev=40699&view=rev
Log:
fix the build on PPC with the latest llvmbuilder changes.
Modified:
llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp
Modified: llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp?rev=40699&r1=40698&r2=40699&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/config/rs6000/llvm-rs6000.cpp Wed Aug 1 18:32:32
2007
@@ -57,7 +57,7 @@
Ops.erase(Ops.begin() + OpNum);
Ops[OpNum] = Ptr;
- Value *V = Builder.CreateCall(IntFn, &Ops[0], Ops.size());
+ Value *V = Builder.CreateCall(IntFn, &Ops[0], &Ops[0]+Ops.size());
if (V->getType() != Type::VoidTy) {
V->setName("tmp");
@@ -297,7 +297,8 @@
const VectorType *PTy = cast(ResultType);
unsigned N = GetAltivecTypeNumFromType(PTy->getElementType());
Function *smax = Intrinsic::getDeclaration(TheModule, smax_iid[N]);
-Result = Builder.CreateCall(smax, Ops[0], Result, "tmp");
+Value *ActualOps[] = { Ops[0], Result };
+Result = Builder.CreateCall(smax, ActualOps, ActualOps+2, "tmp");
return true;
}
case ALTIVEC_BUILTIN_ABSS_V4SI:
@@ -321,9 +322,11 @@
Function *smax = Intrinsic::getDeclaration(TheModule, smax_iid[N]);
Function *subss = Intrinsic::getDeclaration(TheModule, subss_iid[N]);
-Result = Builder.CreateCall(subss, Constant::getNullValue(ResultType),
-Ops[0], "tmp");
-Result = Builder.CreateCall(smax, Ops[0], Result, "tmp");
+Value *ActualOps[] = { Constant::getNullValue(ResultType), Ops[0] };
+Result = Builder.CreateCall(subss, ActualOps, ActualOps+2, "tmp");
+ActualOps[0] = Ops[0];
+ActualOps[1] = Result;
+Result = Builder.CreateCall(smax, ActualOps, ActualOps+2, "tmp");
return true;
}
}
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[llvm-commits] [llvm] r40703 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Author: evancheng
Date: Wed Aug 1 18:46:47 2007
New Revision: 40703
URL: http://llvm.org/viewvc/llvm-project?rev=40703&view=rev
Log:
Can't handle offset and scale if rip-relative addressing is to be used.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=40703&r1=40702&r2=40703&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Aug 1 18:46:47 2007
@@ -4449,14 +4449,18 @@
return false;
if (AM.BaseGV) {
-// X86-64 only supports addr of globals in small code model.
-if (Subtarget->is64Bit() &&
-getTargetMachine().getCodeModel() != CodeModel::Small)
- return false;
-
-// We can only fold this if we don't need a load either.
+// We can only fold this if we don't need an extra load.
if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine(), false))
return false;
+
+// X86-64 only supports addr of globals in small code model.
+if (Subtarget->is64Bit()) {
+ if (getTargetMachine().getCodeModel() != CodeModel::Small)
+return false;
+ // If lower 4G is not available, then we must use rip-relative
addressing.
+ if (AM.BaseOffs || AM.Scale > 1)
+return false;
+}
}
switch (AM.Scale) {
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Re: [llvm-commits] [llvm] r40502 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
On Aug 1, 2007, at 3:46 PM, Evan Cheng wrote: >>> A subtarget field is an acceptable compromise. However, it's not >>> hasNoSmallModel(). We are still using small code model (i.e. >>> everything must fit within 4G). It's just the lower 4G is not >>> available. >> >> Ah, so everything fits in "some" 4g, but just not the "low" 4g? > > Yep. Ok, can you please add the subtarget flag when convenient? Thanks, -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40660 - in /llvm/trunk: include/llvm/ include/llvm/Support/ lib/AsmParser/ lib/Bitcode/Reader/ lib/CodeGen/ lib/ExecutionEngine/JIT/ lib/Transforms/IPO/ lib/Transforms/Instr
You missed one client, the indirect usage by llvm2cpp, which _generates_
calls to CallInst, but doesn't make them directly. It is currently
generating calls to the old API, and causes test/Feature/llvm2cpp to fail.
-Chandler
David Greene wrote:
> Author: greened
> Date: Tue Jul 31 22:43:44 2007
> New Revision: 40660
>
> URL: http://llvm.org/viewvc/llvm-project?rev=40660&view=rev
> Log:
>
> New CallInst interface to address GLIBCXX_DEBUG errors caused by
> indexing an empty std::vector.
>
> Updates to all clients.
>
> Modified:
> llvm/trunk/include/llvm/Instructions.h
> llvm/trunk/include/llvm/Support/LLVMBuilder.h
> llvm/trunk/lib/AsmParser/llvmAsmParser.y
> llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
> llvm/trunk/lib/CodeGen/IntrinsicLowering.cpp
> llvm/trunk/lib/ExecutionEngine/JIT/JIT.cpp
> llvm/trunk/lib/Transforms/IPO/ArgumentPromotion.cpp
> llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
> llvm/trunk/lib/Transforms/IPO/LowerSetJmp.cpp
> llvm/trunk/lib/Transforms/IPO/PruneEH.cpp
> llvm/trunk/lib/Transforms/IPO/SimplifyLibCalls.cpp
> llvm/trunk/lib/Transforms/Instrumentation/ProfilingUtils.cpp
> llvm/trunk/lib/Transforms/Scalar/ADCE.cpp
> llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
> llvm/trunk/lib/Transforms/Scalar/LowerGC.cpp
> llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
> llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp
> llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
> llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp
> llvm/trunk/lib/VMCore/Instructions.cpp
> llvm/trunk/tools/bugpoint/Miscompilation.cpp
> llvm/trunk/tools/llvm-upgrade/UpgradeParser.y
>
> Modified: llvm/trunk/include/llvm/Instructions.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=40660&r1=40659&r2=40660&view=diff
>
> ==
> --- llvm/trunk/include/llvm/Instructions.h (original)
> +++ llvm/trunk/include/llvm/Instructions.h Tue Jul 31 22:43:44 2007
> @@ -16,7 +16,10 @@
> #ifndef LLVM_INSTRUCTIONS_H
> #define LLVM_INSTRUCTIONS_H
>
> +#include
> +
> #include "llvm/InstrTypes.h"
> +#include "llvm/DerivedTypes.h"
>
> namespace llvm {
>
> @@ -735,12 +738,12 @@
>
> //===--===//
> // CallInst Class
>
> //===--===//
> -
> /// CallInst - This class represents a function call, abstracting a target
> /// machine's calling convention. This class uses low bit of the
> SubClassData
> /// field to indicate whether or not this is a tail call. The rest of the
> bits
> /// hold the calling convention of the call.
> ///
> +
> class CallInst : public Instruction {
>ParamAttrsList *ParamAttrs; ///< parameter attributes for call
>CallInst(const CallInst &CI);
> @@ -749,18 +752,73 @@
>void init(Value *Func, Value *Actual);
>void init(Value *Func);
>
> + template
> + void init(Value *Func, InputIterator ArgBegin, InputIterator ArgEnd,
> +const std::string &Name,
> +// This argument ensures that we have an iterator we can
> +// do arithmetic on in constant time
> +std::random_access_iterator_tag) {
> +typename std::iterator_traits::difference_type NumArgs =
> + std::distance(ArgBegin, ArgEnd);
> +
> +if (NumArgs > 0) {
> + // This requires that the iterator points to contiguous memory.
> + init(Func, &*ArgBegin, NumArgs);
> +}
> +else {
> + init(Func, 0, NumArgs);
> +}
> +
> +setName(Name);
> + }
> +
> public:
> + /// Construct a CallInst given a range of arguments. InputIterator
> + /// must be a random-access iterator pointing to contiguous storage
> + /// (e.g. a std::vector<>::iterator). Checks are made for
> + /// random-accessness but not for contiguous storage as that would
> + /// incur runtime overhead.
> + /// @brief Construct a CallInst from a range of arguments
> + template
> + CallInst(Value *Func, InputIterator ArgBegin, InputIterator ArgEnd,
> + const std::string &Name = "", Instruction *InsertBefore = 0)
> + : Instruction(cast(cast(Func->getType())
> + ->getElementType())->getReturnType(),
> +Instruction::Call, 0, 0, InsertBefore) {
> +init(Func, ArgBegin, ArgEnd, Name,
> + typename std::iterator_traits::iterator_category());
> + }
> +
> + /// Construct a CallInst given a range of arguments. InputIterator
> + /// must be a random-access iterator pointing to contiguous storage
> + /// (e.g. a std::vector<>::iterator). Checks are made for
> + /// random-accessness but not for contiguous storage as that would
> + /// incur runtime overhead.
> + /// @brief Construct a CallInst from
[llvm-commits] [llvm] r40701 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86InstrInfo.td X86Subtarget.cpp X86Subtarget.h
Author: evancheng
Date: Wed Aug 1 18:45:51 2007
New Revision: 40701
URL: http://llvm.org/viewvc/llvm-project?rev=40701&view=rev
Log:
Mac OS X X86-64 low 4G address not available.
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.h
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=40701&r1=40700&r2=40701&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Aug 1 18:45:51 2007
@@ -614,7 +614,8 @@
bool isStatic = TM.getRelocationModel() == Reloc::Static;
SDOperand N0 = N.getOperand(0);
// Mac OS X X86-64 lower 4G address is not available.
- bool isAbs32 = !is64Bit || (isStatic && !Subtarget->isTargetDarwin());
+ bool isAbs32 = !is64Bit ||
+(isStatic && Subtarget->hasLow4GUserSpaceAddress());
if (GlobalAddressSDNode *G = dyn_cast(N0)) {
GlobalValue *GV = G->getGlobal();
if (isAbs32 || isRoot) {
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=40701&r1=40700&r2=40701&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Aug 1 18:45:51 2007
@@ -162,6 +162,7 @@
def FPStack : Predicate<"!Subtarget->hasSSE2()">;
def In32BitMode : Predicate<"!Subtarget->is64Bit()">;
def In64BitMode : Predicate<"Subtarget->is64Bit()">;
+def HasLow4G : Predicate<"Subtarget->hasLow4GUserSpaceAddress()">;
def SmallCode: Predicate<"TM.getCodeModel() == CodeModel::Small">;
def NotSmallCode : Predicate<"TM.getCodeModel() != CodeModel::Small">;
def IsStatic : Predicate<"TM.getRelocationModel() == Reloc::Static">;
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=40701&r1=40700&r2=40701&view=diff
==
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Wed Aug 1 18:45:51 2007
@@ -225,6 +225,7 @@
// FIXME: this is a known good value for Yonah. How about others?
, MinRepStrSizeThreshold(128)
, Is64Bit(is64Bit)
+ , HasLow4GUserAddress(true)
, TargetType(isELF) { // Default to ELF unless otherwise specified.
// Determine default and user specified characteristics
@@ -285,6 +286,9 @@
}
}
+ if (TargetType == isDarwin && Is64Bit)
+HasLow4GUserAddress = false;
+
if (TargetType == isDarwin ||
TargetType == isCygwin ||
TargetType == isMingw ||
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=40701&r1=40700&r2=40701&view=diff
==
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Wed Aug 1 18:45:51 2007
@@ -46,18 +46,23 @@
};
/// AsmFlavor - Which x86 asm dialect to use.
+ ///
AsmWriterFlavorTy AsmFlavor;
/// PICStyle - Which PIC style to use
+ ///
PICStyle::Style PICStyle;
/// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, or none supported.
+ ///
X86SSEEnum X86SSELevel;
/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
+ ///
X863DNowEnum X863DNowLevel;
/// HasX86_64 - True if the processor supports X86-64 instructions.
+ ///
bool HasX86_64;
/// stackAlignment - The minimum alignment known to hold of the stack frame
on
@@ -65,6 +70,7 @@
unsigned stackAlignment;
/// Min. memset / memcpy size that is turned into rep/movs, rep/stos ops.
+ ///
unsigned MinRepStrSizeThreshold;
private:
@@ -72,6 +78,10 @@
/// pointer size is 64 bit.
bool Is64Bit;
+ /// HasLow4GUserAddress - True if the low 4G user-space address is available.
+ ///
+ bool HasLow4GUserAddress;
+
public:
enum {
isELF, isCygwin, isDarwin, isWindows, isMingw
@@ -103,6 +113,10 @@
bool is64Bit() const { return Is64Bit; }
+ /// hasLow4GUserSpaceAddress - True if lower 4G user-space address is
+ /// available.
+ bool hasLow4GUserSpaceAddress() const { return HasLow4GUserAddress; }
+
PICStyle::Style getPICStyle() const { return PICStyle; }
void setPICStyle(PICStyle::Style Style) { PICStyle = Style; }
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[llvm-commits] [llvm] r40702 - /llvm/trunk/lib/Target/X86/X86InstrX86-64.td
Author: evancheng Date: Wed Aug 1 18:46:10 2007 New Revision: 40702 URL: http://llvm.org/viewvc/llvm-project?rev=40702&view=rev Log: Mac OS X X86-64 low 4G address not available. Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrX86-64.td?rev=40702&r1=40701&r2=40702&view=diff == --- llvm/trunk/lib/Target/X86/X86InstrX86-64.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrX86-64.td Wed Aug 1 18:46:10 2007 @@ -1016,16 +1016,16 @@ def : Pat<(store (i64 (X86Wrapper tconstpool:$src)), addr:$dst), (MOV64mi32 addr:$dst, tconstpool:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, HasLow4G, IsStatic]>; def : Pat<(store (i64 (X86Wrapper tjumptable:$src)), addr:$dst), (MOV64mi32 addr:$dst, tjumptable:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, HasLow4G, IsStatic]>; def : Pat<(store (i64 (X86Wrapper tglobaladdr:$src)), addr:$dst), (MOV64mi32 addr:$dst, tglobaladdr:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, HasLow4G, IsStatic]>; def : Pat<(store (i64 (X86Wrapper texternalsym:$src)), addr:$dst), (MOV64mi32 addr:$dst, texternalsym:$src)>, - Requires<[SmallCode, IsStatic]>; + Requires<[SmallCode, HasLow4G, IsStatic]>; // Calls // Direct PC relative function call for small code model. 32-bit displacement ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [test-suite] r40704 - /test-suite/trunk/Makefile.programs
Author: evancheng Date: Wed Aug 1 18:48:43 2007 New Revision: 40704 URL: http://llvm.org/viewvc/llvm-project?rev=40704&view=rev Log: x86 llcbeta back to -regalloc=local -fast. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=40704&r1=40703&r2=40704&view=diff == --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Wed Aug 1 18:48:43 2007 @@ -237,8 +237,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -disable-fp-elim -#-regalloc=bigblock -fast +LLCBETAOPTION := -regalloc=local -fast endif ifeq ($(ARCH),Sparc) LLCBETAOPTION := -enable-sparc-v9-insts ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40701 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86InstrInfo.td X86Subtarget.cpp X86Subtarget.h
Nice, thanks Evan!
-Chris
On Aug 1, 2007, at 4:45 PM, Evan Cheng wrote:
> Author: evancheng
> Date: Wed Aug 1 18:45:51 2007
> New Revision: 40701
>
> URL: http://llvm.org/viewvc/llvm-project?rev=40701&view=rev
> Log:
> Mac OS X X86-64 low 4G address not available.
>
> Modified:
> llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
> llvm/trunk/lib/Target/X86/X86InstrInfo.td
> llvm/trunk/lib/Target/X86/X86Subtarget.cpp
> llvm/trunk/lib/Target/X86/X86Subtarget.h
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
> X86ISelDAGToDAG.cpp?rev=40701&r1=40700&r2=40701&view=diff
>
> ==
>
> --- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Aug 1
> 18:45:51 2007
> @@ -614,7 +614,8 @@
>bool isStatic = TM.getRelocationModel() == Reloc::Static;
>SDOperand N0 = N.getOperand(0);
>// Mac OS X X86-64 lower 4G address is not available.
> - bool isAbs32 = !is64Bit || (isStatic && !Subtarget-
> >isTargetDarwin());
> + bool isAbs32 = !is64Bit ||
> +(isStatic && Subtarget->hasLow4GUserSpaceAddress());
>if (GlobalAddressSDNode *G = dyn_cast
> (N0)) {
> GlobalValue *GV = G->getGlobal();
> if (isAbs32 || isRoot) {
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
> X86InstrInfo.td?rev=40701&r1=40700&r2=40701&view=diff
>
> ==
>
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Aug 1 18:45:51 2007
> @@ -162,6 +162,7 @@
> def FPStack : Predicate<"!Subtarget->hasSSE2()">;
> def In32BitMode : Predicate<"!Subtarget->is64Bit()">;
> def In64BitMode : Predicate<"Subtarget->is64Bit()">;
> +def HasLow4G : Predicate<"Subtarget->hasLow4GUserSpaceAddress
> ()">;
> def SmallCode: Predicate<"TM.getCodeModel() ==
> CodeModel::Small">;
> def NotSmallCode : Predicate<"TM.getCodeModel() !=
> CodeModel::Small">;
> def IsStatic : Predicate<"TM.getRelocationModel() ==
> Reloc::Static">;
>
> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
> X86Subtarget.cpp?rev=40701&r1=40700&r2=40701&view=diff
>
> ==
>
> --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Wed Aug 1 18:45:51
> 2007
> @@ -225,6 +225,7 @@
>// FIXME: this is a known good value for Yonah. How about others?
>, MinRepStrSizeThreshold(128)
>, Is64Bit(is64Bit)
> + , HasLow4GUserAddress(true)
>, TargetType(isELF) { // Default to ELF unless otherwise specified.
>
>// Determine default and user specified characteristics
> @@ -285,6 +286,9 @@
> }
>}
>
> + if (TargetType == isDarwin && Is64Bit)
> +HasLow4GUserAddress = false;
> +
>if (TargetType == isDarwin ||
>TargetType == isCygwin ||
>TargetType == isMingw ||
>
> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
> X86Subtarget.h?rev=40701&r1=40700&r2=40701&view=diff
>
> ==
>
> --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
> +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Wed Aug 1 18:45:51 2007
> @@ -46,18 +46,23 @@
>};
>
>/// AsmFlavor - Which x86 asm dialect to use.
> + ///
>AsmWriterFlavorTy AsmFlavor;
>
>/// PICStyle - Which PIC style to use
> + ///
>PICStyle::Style PICStyle;
>
>/// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, or none supported.
> + ///
>X86SSEEnum X86SSELevel;
>
>/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
> + ///
>X863DNowEnum X863DNowLevel;
>
>/// HasX86_64 - True if the processor supports X86-64 instructions.
> + ///
>bool HasX86_64;
>
>/// stackAlignment - The minimum alignment known to hold of the
> stack frame on
> @@ -65,6 +70,7 @@
>unsigned stackAlignment;
>
>/// Min. memset / memcpy size that is turned into rep/movs, rep/
> stos ops.
> + ///
>unsigned MinRepStrSizeThreshold;
>
> private:
> @@ -72,6 +78,10 @@
>/// pointer size is 64 bit.
>bool Is64Bit;
>
> + /// HasLow4GUserAddress - True if the low 4G user-space address
> is available.
> + ///
> + bool HasLow4GUserAddress;
> +
> public:
>enum {
> isELF, isCygwin, isDarwin, isWindows, isMingw
> @@ -103,6 +113,10 @@
>
>bool is64Bit() const { return Is64Bit; }
>
> + /// hasLow4GUserSpaceAddress - True if lower 4G user-space
> address is
> + /// available.
> + bool hasLow4GUserSpaceAddre
[llvm-commits] [llvm] r40709 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h utils/TableGen/InstrInfoEmitter.cpp
Author: evancheng
Date: Wed Aug 1 19:20:17 2007
New Revision: 40709
URL: http://llvm.org/viewvc/llvm-project?rev=40709&view=rev
Log:
Added TargetInstrDescriptor::numDefs - num of results.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=40709&r1=40708&r2=40709&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Wed Aug 1 19:20:17 2007
@@ -130,6 +130,7 @@
public:
MachineOpCode Opcode;// The opcode.
unsigned short numOperands; // Num of args (may be more if variable_ops).
+ unsigned short numDefs; // Num of args that are definitions.
const char *Name; // Assembly language mnemonic for the opcode.
InstrSchedClass schedClass;// enum identifying instr sched class
unsignedFlags; // flags identifying machine instr class
Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=40709&r1=40708&r2=40709&view=diff
==
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Wed Aug 1 19:20:17 2007
@@ -203,7 +203,8 @@
MinOperands = 0;
OS << " { ";
- OS << Num << ",\t" << MinOperands << ",\t\"";
+ OS << Num << ",\t" << MinOperands << ",\t"
+ << Inst.NumDefs << ",\t\"";
if (Inst.Name.empty())
OS << Inst.TheDef->getName();
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[llvm-commits] [llvm-gcc-4.0] r40706 - /llvm-gcc-4.0/tags/llvm-gcc-1200-05/
Author: void Date: Wed Aug 1 19:14:16 2007 New Revision: 40706 URL: http://llvm.org/viewvc/llvm-project?rev=40706&view=rev Log: Creating llvm-gcc-1200-05 branch Added: llvm-gcc-4.0/tags/llvm-gcc-1200-05/ - copied from r40705, llvm-gcc-4.0/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40707 - /llvm/tags/Apple/llvm-1200-05/
Author: void Date: Wed Aug 1 19:14:22 2007 New Revision: 40707 URL: http://llvm.org/viewvc/llvm-project?rev=40707&view=rev Log: Creating llvm-1200-05 branch Added: llvm/tags/Apple/llvm-1200-05/ - copied from r40706, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40666 - /llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cpp
On Jul 31, 2007, at 11:30 PM, Owen Anderson wrote: > Author: resistor > Date: Wed Aug 1 01:30:10 2007 > New Revision: 40666 > > URL: http://llvm.org/viewvc/llvm-project?rev=40666&view=rev > Log: > Remove old DSE. I'll put flowers on DSE's coffin at its funeral :). Nice work Owen, -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40710 - in /llvm/trunk: include/llvm/CodeGen/ScheduleDAG.h lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Author: evancheng
Date: Wed Aug 1 19:28:15 2007
New Revision: 40710
URL: http://llvm.org/viewvc/llvm-project?rev=40710&view=rev
Log:
Instead of adding copyfromreg's to handle physical definitions. Now isel can
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)
Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)
And let scheduledag emit the move from X86::EAX to a virtual register.
Modified:
llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=40710&r1=40709&r2=40710&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Wed Aug 1 19:28:15 2007
@@ -245,7 +245,16 @@
/// EmitNoop - Emit a noop instruction.
///
void EmitNoop();
+
+/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
+/// implicit physical register output.
+void EmitCopyFromReg(SDNode *Node, unsigned ResNo, unsigned SrcReg,
+ DenseMap &VRBaseMap);
+void CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
+const TargetInstrDescriptor &II,
+DenseMap &VRBaseMap);
+
void EmitSchedule();
void dumpSchedule() const;
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=40710&r1=40709&r2=40710&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Wed Aug 1 19:28:15 2007
@@ -254,15 +254,69 @@
? TII->getPointerRegClass() : MRI->getRegClass(toi.RegClass);
}
-static void CreateVirtualRegisters(SDNode *Node,
- unsigned NumResults,
- const MRegisterInfo *MRI,
- MachineInstr *MI,
- SSARegMap *RegMap,
- const TargetInstrInfo *TII,
- const TargetInstrDescriptor &II,
- DenseMap &VRBaseMap) {
- for (unsigned i = 0; i < NumResults; ++i) {
+// Returns the Register Class of a physical register
+static const TargetRegisterClass *getPhysicalRegisterRegClass(
+const MRegisterInfo *MRI,
+MVT::ValueType VT,
+unsigned reg) {
+ assert(MRegisterInfo::isPhysicalRegister(reg) &&
+ "reg must be a physical register");
+ // Pick the register class of the right type that contains this physreg.
+ for (MRegisterInfo::regclass_iterator I = MRI->regclass_begin(),
+ E = MRI->regclass_end(); I != E; ++I)
+if ((*I)->hasType(VT) && (*I)->contains(reg))
+ return *I;
+ assert(false && "Couldn't find the register class");
+ return 0;
+}
+
+void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo, unsigned
SrcReg,
+ DenseMap &VRBaseMap) {
+ unsigned VRBase = 0;
+ if (MRegisterInfo::isVirtualRegister(SrcReg)) {
+// Just use the input register directly!
+bool isNew =
VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg));
+assert(isNew && "Node emitted out of order - early");
+return;
+ }
+
+ // If the node is only used by a CopyToReg and the dest reg is a vreg, use
+ // the CopyToReg'd destination register instead of creating a new vreg.
+ for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end();
+ UI != E; ++UI) {
+SDNode *Use = *UI;
+if (Use->getOpcode() == ISD::CopyToReg &&
+Use->getOperand(2).Val == Node &&
+Use->getOperand(2).ResNo == ResNo) {
+ unsigned DestReg = cast(Use->getOperand(1))->getReg();
+ if (MRegisterInfo::isVirtualRegister(DestReg)) {
+VRBase = DestReg;
+break;
+ }
+}
+ }
+
+ // Figure out the register class to create for the destreg.
+ const TargetRegisterClass *TRC = 0;
+ if (VRBase) {
+TRC = RegMap->getRegClass(VRBase);
+ } else {
+TRC = getPhysicalRegisterRegClass(MRI, Node->getValueType(ResNo), SrcReg);
+
+// Create the reg, emit the copy.
+VRBase = RegMap->createVirtualRegister(TRC);
+ }
+ MRI->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC);
+
+ bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase));
+ assert(isNew && "Node emitted out of order - early");
+}
+
+void ScheduleDAG::CreateVirtualRegisters(SDNode *
Re: [llvm-commits] [llvm] r40605 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
On Jul 30, 2007, at 2:00 PM, Scott Michel wrote:
> Author: pingbak
> Date: Mon Jul 30 16:00:31 2007
> New Revision: 40605
>
> URL: http://llvm.org/viewvc/llvm-project?rev=40605&view=rev
> Log:
> - Allow custom lowering for CTPOP, CTTZ, CTLZ.
> - Fixed an existing unexpanded tab.
> ==
>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jul 30
> 16:00:31 2007
> @@ -2738,9 +2738,16 @@
>case ISD::CTLZ:
> Tmp1 = LegalizeOp(Node->getOperand(0)); // Op
> switch (TLI.getOperationAction(Node->getOpcode(), Node-
> >getValueType(0))) {
> -case TargetLowering::Custom: assert(0 && "Cannot custom handle
> this yet!");
> +case TargetLowering::Custom:
> case TargetLowering::Legal:
>Result = DAG.UpdateNodeOperands(Result, Tmp1);
> + if (TLI.getOperationAction(Node->getOpcode(), Node-
> >getValueType(0)) ==
> + TargetLowering::Custom) {
> + Tmp1 = TLI.LowerOperation(Result, DAG);
> + if (Tmp1.Val) {
> + Result = Tmp1;
> + }
Hi Scott, speaking of tabs, it looks like some snuck in here. Can
you please replace them with spaces? Thanks,
-Chris
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Re: [llvm-commits] [llvm] r40641 - /llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
On Jul 31, 2007, at 10:22 AM, Dan Gohman wrote: > Author: djg > Date: Tue Jul 31 12:22:27 2007 > New Revision: 40641 > > URL: http://llvm.org/viewvc/llvm-project?rev=40641&view=rev > Log: > Use SCEVExpander::InsertCastOfTo instead of calling new IntToPtrInst > directly, because the insert point used by the SCEVExpander may vary > from what LSR originally computes. Did this cause a bug? If so, can you please commit a regtest? Thanks, -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] Trampoline support (pointers nested funtions)
On Jul 31, 2007, at 3:08 PM, Evan Cheng wrote: >>> Also, isn't the static chain register described in >>> X86CallingConv.td? >> >> It is, but it's hard to use here. The problem is that when >> lowering the >> init.trampoline intrinsic you only have a pointer to the target >> function. >> From this pointer you would like to find out which register a certain >> parameter will be passed in for that function. Not so easy! It's >> like >> having a call instruction without having the arguments. In order to >> exploit X86CallingConv.td, you have to use all the lowering >> machinery, >> which isn't adapted to this case. For example, you could try to >> synthesize >> a fake call. Or you could pretend to be lowering the target >> function. I >> tried it, and it can be done with a lot of horrible hacking. But >> it's not >> worth it. It's much simpler to simply grab the calling convention >> and use >> that, which unfortunately means keeping LowerTRAMPOLINE and >> X86CallingConv.td in sync. Personally I can live with that, >> especially since >> I've seen the alternative and it still wakes me up screaming at >> night :) >> But maybe you can see a reasonable way of doing it? > > Seems like a deficiency in CCState class. Chris, your thoughts? Isn't the argument always a pointer, and thus always the same thing for a particular calling conv? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40628 - in /llvm/trunk: lib/Target/X86/X86InstrFPStack.td lib/Target/X86/X86InstrFormats.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrMMX.td lib/Target/X86/X86In
On Jul 31, 2007, at 1:04 AM, Evan Cheng wrote: > Author: evancheng > Date: Tue Jul 31 03:04:03 2007 > New Revision: 40628 > > URL: http://llvm.org/viewvc/llvm-project?rev=40628&view=rev > Log: > Redo and generalize previously removed opt for pinsrw: (vextract > (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) > + > +// (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 > load $addr) > +def : Pat<(vector_extract > + (bc_v4i32 (v4f32 (scalar_to_vector (loadf32 addr: > $src, (iPTR 0)), > + (MOV32rm addr:$src)>; > +def : Pat<(vector_extract > + (bc_v2i64 (v2f64 (scalar_to_vector (loadf64 addr: > $src, (iPTR 0)), > + (MOV64rm addr:$src)>; Would it be possible (and would it make sense) to do this in the dag combiner rather than as a target-specific pattern? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40610 - in /llvm/trunk: lib/AsmParser/Lexer.l lib/AsmParser/llvmAsmParser.y test/Assembler/2007-07-30-AutoUpgradeZextSext.ll
On Jul 30, 2007, at 7:57 PM, Reid Spencer wrote:
> Make the AsmParser auto-upgrade the old zext and sext
> keywords for parameter attributes and handle the
> end-of-line ambiguity.
> +sext{WSNL} { // For auto-upgrade only, drop in LLVM 3.0
> + return SIGNEXT; }
> +zext{WSNL} { // For auto-upgrade only, drop in LLVM 3.0
> + return ZEROEXT; }
Wow, very clever Reid. Thanks for tackling this!
-Chris
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[llvm-commits] [llvm] r40711 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll
Author: clamb
Date: Wed Aug 1 20:18:14 2007
New Revision: 40711
URL: http://llvm.org/viewvc/llvm-project?rev=40711&view=rev
Log:
Teach BasicAA about noalias parameter attributes, but do it correctly this time.
Added:
llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll
llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll
Modified:
llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=40711&r1=40710&r2=40711&view=diff
==
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Wed Aug 1 20:18:14 2007
@@ -18,6 +18,7 @@
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
+#include "llvm/ParameterAttributes.h"
#include "llvm/GlobalVariable.h"
#include "llvm/Instructions.h"
#include "llvm/Pass.h"
@@ -260,6 +261,21 @@
return AliasAnalysis::getModRefInfo(CS, P, Size);
}
+static bool isNoAliasArgument(const Argument *Arg) {
+ const Function *Func = Arg->getParent();
+ const ParamAttrsList *Attr = Func->getFunctionType()->getParamAttrs();
+ if (Attr) {
+unsigned Idx = 1;
+for (Function::const_arg_iterator I = Func->arg_begin(),
+ E = Func->arg_end(); I != E; ++I, ++Idx) {
+ if (&(*I) == Arg &&
+ Attr->paramHasAttr(Idx, ParamAttr::NoAlias))
+return true;
+}
+ }
+ return false;
+}
+
// alias - Provide a bunch of ad-hoc rules to disambiguate in common cases,
such
// as array references. Note that this function is heavily tail recursive.
// Hopefully we have a smart C++ compiler. :)
@@ -298,10 +314,24 @@
if (isa(O1)) {
// Incoming argument cannot alias locally allocated object!
if (isa(O2)) return NoAlias;
+
+// If they are two different objects, and one is a noalias argument
+// then they do not alias.
+if (O1 != O2 && isNoAliasArgument(cast(O1)))
+ return NoAlias;
+
// Otherwise, nothing is known...
- } else if (isa(O2)) {
+ }
+
+ if (isa(O2)) {
// Incoming argument cannot alias locally allocated object!
if (isa(O1)) return NoAlias;
+
+// If they are two different objects, and one is a noalias argument
+// then they do not alias.
+if (O1 != O2 && isNoAliasArgument(cast(O2)))
+ return NoAlias;
+
// Otherwise, nothing is known...
} else if (O1 != O2) {
// If they are two different objects, we know that we have no alias...
Added: llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll?rev=40711&view=auto
==
--- llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll (added)
+++ llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll Wed Aug 1
20:18:14 2007
@@ -0,0 +1,10 @@
+; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info
-disable-output &| grep 'MayAlias: i32* %y, i32* %x'
+
+declare i32* @unclear(i32* %a)
+
+define void @foo(i32* noalias %x) {
+ %y = call i32* @unclear(i32* %x)
+ store i32 0, i32* %x
+ store i32 0, i32* %y
+ ret void
+}
Added: llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll?rev=40711&view=auto
==
--- llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll (added)
+++ llvm/trunk/test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll Wed Aug 1
20:18:14 2007
@@ -0,0 +1,17 @@
+; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info
-disable-output &| grep '9 no alias'
+; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info
-disable-output &| grep '6 may alias'
+; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info
-disable-output &| grep 'MayAlias: i32* %pj, i32* %pi'
+
+define void @foo(i32* noalias %p, i32* noalias %q, i32 %i, i32 %j) {
+ %pi = getelementptr i32* %p, i32 %i
+ %qi = getelementptr i32* %q, i32 %i
+ %pj = getelementptr i32* %p, i32 %j
+ %qj = getelementptr i32* %q, i32 %j
+ store i32 0, i32* %p
+ store i32 0, i32* %pi
+ store i32 0, i32* %pj
+ store i32 0, i32* %q
+ store i32 0, i32* %qi
+ store i32 0, i32* %qj
+ ret void
+}
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Re: [llvm-commits] [llvm] r40660 - in /llvm/trunk: include/llvm/ include/llvm/Support/ lib/AsmParser/ lib/Bitcode/Reader/ lib/CodeGen/ lib/ExecutionEngine/JIT/ lib/Transforms/IPO/ lib/Transforms/Instr
> New CallInst interface to address GLIBCXX_DEBUG errors caused by
> indexing an empty std::vector.
Cool. This broke an llvm2cpp dejagnu test. Please investigate it.
Also:
> ==
>
> --- llvm/trunk/include/llvm/Instructions.h (original)
> +++ llvm/trunk/include/llvm/Instructions.h Tue Jul 31 22:43:44 2007
> @@ -16,7 +16,10 @@
> #ifndef LLVM_INSTRUCTIONS_H
> #define LLVM_INSTRUCTIONS_H
>
> +#include
> +
> #include "llvm/InstrTypes.h"
> +#include "llvm/DerivedTypes.h"
Please try to find some way to do this without bringing in
DerivedTypes.h. What do you need this for?
> +#if 0
> + // Leave these here for llvm-gcc
>CallInst(Value *F, Value* const *Args, unsigned NumArgs,
> const std::string &Name = "", Instruction *InsertBefore
> = 0);
>CallInst(Value *F, Value *const *Args, unsigned NumArgs,
> const std::string &Name, BasicBlock *InsertAtEnd);
> -
> +
>// Alternate CallInst ctors w/ two actuals, w/ one actual and no
>// actuals, respectively.
>CallInst(Value *F, Value *Actual1, Value *Actual2,
> const std::string& Name = "", Instruction *InsertBefore
> = 0);
>CallInst(Value *F, Value *Actual1, Value *Actual2,
> const std::string& Name, BasicBlock *InsertAtEnd);
> +#endif
Please remove the #ifdef'd out code.
> ==
>
> --- llvm/trunk/include/llvm/Support/LLVMBuilder.h (original)
> +++ llvm/trunk/include/llvm/Support/LLVMBuilder.h Tue Jul 31
> 22:43:44 2007
> +#if 0
> + CallInst *CreateCall(Value *Callee, Value *Arg0, Value *Arg1,
> +const char *Name = "") {
> + Value *Args[] = { Arg0, Arg1 };
> + return Insert(new CallInst(Callee, Args, Args+2, Name));
> + }
> +
> + // Leave this here for llvm-gcc
>CallInst *CreateCall(Value *Callee, Value* const *Args, unsigned
> NumArgs,
> const char *Name = "") {
> -return Insert(new CallInst(Callee, Args, NumArgs, Name));
> +return Insert(new CallInst(Callee, Args, Args+NumArgs, Name));
>}
> +#endif
Likewise.
-Chris
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[llvm-commits] [llvm] r40712 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Author: pingbak
Date: Wed Aug 1 21:22:46 2007
New Revision: 40712
URL: http://llvm.org/viewvc/llvm-project?rev=40712&view=rev
Log:
Style police: Expand the tabs to spaces!
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=40712&r1=40711&r2=40712&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Aug 1 21:22:46 2007
@@ -2879,11 +2879,11 @@
case TargetLowering::Legal:
Result = DAG.UpdateNodeOperands(Result, Tmp1);
if (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0)) ==
- TargetLowering::Custom) {
- Tmp1 = TLI.LowerOperation(Result, DAG);
- if (Tmp1.Val) {
- Result = Tmp1;
- }
+ TargetLowering::Custom) {
+Tmp1 = TLI.LowerOperation(Result, DAG);
+if (Tmp1.Val) {
+ Result = Tmp1;
+}
}
break;
case TargetLowering::Promote: {
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[llvm-commits] [llvm] r40714 - /llvm/trunk/tools/llvm2cpp/CppWriter.cpp
Author: reid
Date: Wed Aug 1 22:30:26 2007
New Revision: 40714
URL: http://llvm.org/viewvc/llvm-project?rev=40714&view=rev
Log:
Adjust for new CallInst constructor interface.
This fixes test/Feature/llvm2cpp.ll
Modified:
llvm/trunk/tools/llvm2cpp/CppWriter.cpp
Modified: llvm/trunk/tools/llvm2cpp/CppWriter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm2cpp/CppWriter.cpp?rev=40714&r1=40713&r2=40714&view=diff
==
--- llvm/trunk/tools/llvm2cpp/CppWriter.cpp (original)
+++ llvm/trunk/tools/llvm2cpp/CppWriter.cpp Wed Aug 1 22:30:26 2007
@@ -1325,7 +1325,7 @@
<< (ila->hasSideEffects() ? "true" : "false") << ");";
nl(Out);
}
- if (call->getNumOperands() > 3) {
+ if (call->getNumOperands() > 2) {
Out << "std::vector " << iName << "_params;";
nl(Out);
for (unsigned i = 1; i < call->getNumOperands(); ++i) {
@@ -1333,11 +1333,8 @@
nl(Out);
}
Out << "CallInst* " << iName << " = new CallInst("
-<< opNames[0] << ", &" << iName << "_params[0], "
-<< call->getNumOperands() - 1 << ", \"";
- } else if (call->getNumOperands() == 3) {
-Out << "CallInst* " << iName << " = new CallInst("
-<< opNames[0] << ", " << opNames[1] << ", " << opNames[2] << ",
\"";
+<< opNames[0] << ", " << iName << "_params.begin(), "
+<< iName << "_params.end(), \"";
} else if (call->getNumOperands() == 2) {
Out << "CallInst* " << iName << " = new CallInst("
<< opNames[0] << ", " << opNames[1] << ", \"";
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[llvm-commits] Trunk Regressions
Trunk as of right now is giving the following regressions: > Running /proj/llvm/head/llvm/test/CodeGen/X86/dg.exp ... > FAIL: /proj/llvm/head/llvm/test/CodeGen/X86/x86-64-mem.ll > Failed with exit(1) at line 7 > while running: grep rip x86-64-mem.ll.tmp2 | wc -l | grep 4 > child process exited abnormally Looks like Evan. > Running /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/dg.exp ... > FAIL: /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll > Failed with signal(SIGSEGV) at line 1 > while running: llvm-as < > /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll | opt > -licm -loop-unswitch -disable-output > opt[0x8572508] > opt[0x85727ce] > [0x7c2420] > opt[0x83eede7] > opt[0x83eee18] > opt[0x83eefa9] > opt[0x83eefa9] > opt[0x83eefa9] > opt[0x83eefa9] > opt[0x83eefa9] > opt[0x83ef590] > opt[0x83ef7b6] > opt(llvm::LPPassManager::runOnFunction(llvm::Function&)+0x3d9)[0x8454575] > opt(llvm::FPPassManager::runOnFunction(llvm::Function&)+0x132)[0x850e21c] > opt(llvm::FPPassManager::runOnModule(llvm::Module&)+0x62)[0x850e3ec] > opt(llvm::MPPassManager::runOnModule(llvm::Module&)+0x115)[0x850deb1] > opt(llvm::PassManagerImpl::run(llvm::Module&)+0x6e)[0x850e092] > opt(llvm::PassManager::run(llvm::Module&)+0x1a)[0x850e0e4] > opt(main+0xa95)[0x82a73c9] Looks like Devang. The good news is that the rest of the tests pass. Reid. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40720 - in /llvm/trunk: lib/Transforms/Scalar/CondPropagate.cpp test/Transforms/CondProp/2007-08-01-InvalidRead.ll
Author: lattner
Date: Wed Aug 1 23:47:05 2007
New Revision: 40720
URL: http://llvm.org/viewvc/llvm-project?rev=40720&view=rev
Log:
Fix PR1575 and test/Transforms/CondProp/2007-08-01-InvalidRead.ll
Added:
llvm/trunk/test/Transforms/CondProp/2007-08-01-InvalidRead.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/CondPropagate.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/CondPropagate.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CondPropagate.cpp?rev=40720&r1=40719&r2=40720&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/CondPropagate.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/CondPropagate.cpp Wed Aug 1 23:47:05 2007
@@ -142,14 +142,15 @@
if (ConstantInt *CB = dyn_cast(PN->getIncomingValue(i-1))) {
// If we have a constant, forward the edge from its current to its
// ultimate destination.
- bool PHIGone = PN->getNumIncomingValues() == 2;
RevectorBlockTo(PN->getIncomingBlock(i-1),
BI->getSuccessor(CB->isZero()));
++NumBrThread;
- // If there were two predecessors before this simplification, the PHI
node
- // will be deleted. Don't iterate through it the last time.
- if (PHIGone) return;
+ // If there were two predecessors before this simplification, or if the
+ // PHI node contained all the same value except for the one we just
+ // substituted, the PHI node may be deleted. Don't iterate through it
the
+ // last time.
+ if (BI->getCondition() != PN) return;
}
}
@@ -177,16 +178,17 @@
if (ConstantInt *CI = dyn_cast(PN->getIncomingValue(i-1))) {
// If we have a constant, forward the edge from its current to its
// ultimate destination.
- bool PHIGone = PN->getNumIncomingValues() == 2;
unsigned DestCase = SI->findCaseValue(CI);
RevectorBlockTo(PN->getIncomingBlock(i-1),
SI->getSuccessor(DestCase));
++NumSwThread;
RemovedPreds = true;
- // If there were two predecessors before this simplification, the PHI
node
- // will be deleted. Don't iterate through it the last time.
- if (PHIGone) return;
+ // If there were two predecessors before this simplification, or if the
+ // PHI node contained all the same value except for the one we just
+ // substituted, the PHI node may be deleted. Don't iterate through it
the
+ // last time.
+ if (SI->getCondition() != PN) return;
}
}
Added: llvm/trunk/test/Transforms/CondProp/2007-08-01-InvalidRead.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/CondProp/2007-08-01-InvalidRead.ll?rev=40720&view=auto
==
--- llvm/trunk/test/Transforms/CondProp/2007-08-01-InvalidRead.ll (added)
+++ llvm/trunk/test/Transforms/CondProp/2007-08-01-InvalidRead.ll Wed Aug 1
23:47:05 2007
@@ -0,0 +1,814 @@
+; RUN: llvm-as < %s | opt -inline -tailduplicate -condprop -simplifycfg
-disable-output
+; PR1575
+target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-pc-linux-gnu"
+ %struct.DCTtab = type { i8, i8, i8 }
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*,
i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8],
i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct.VLCtab = type { i8, i8 }
+ %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*,
i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x
i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+ %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+ %struct.layer_data = type { i32, [2048 x i8], i8*, [16 x i8], i32, i8*,
i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
[EMAIL PROTECTED] = external global %struct.layer_data* ;
<%struct.layer_data**> [#uses=1]
[EMAIL PROTECTED] = external global i32 ; [#uses=0]
[EMAIL PROTECTED] = external global i32 ; [#uses=2]
[EMAIL PROTECTED] = external global i32 ; [#uses=1]
[EMAIL PROTECTED] = external global [12 x %struct.DCTtab] ; <[12
x %struct.DCTtab]*> [#uses=0]
[EMAIL PROTECTED] = external global [60 x %struct.DCTtab] ; <[60
x %struct.DCTtab]*> [#uses=0]
[EMAIL PROTECTED] = external global [8 x %struct.DCTtab]; <[8 x
%struct.DCTtab]*> [#uses=0]
[EMAIL PROTECTED] = external global [16 x %struct.DCTtab] ; <[16
x %struct.DCTtab]*> [#uses=0]
[EMAIL PROTECTED] = external global [16 x %struct.DCTtab] ; <[16
x %struct.DCTtab]*> [#uses=0]
[EMAIL PROTECTED] = external global [16 x %stru
Re: [llvm-commits] Trunk Regressions
On Aug 1, 2007, at 9:16 PM, Reid Spencer wrote: > Trunk as of right now is giving the following regressions: > > >> Running /proj/llvm/head/llvm/test/CodeGen/X86/dg.exp ... >> FAIL: /proj/llvm/head/llvm/test/CodeGen/X86/x86-64-mem.ll >> Failed with exit(1) at line 7 >> while running: grep rip x86-64-mem.ll.tmp2 | wc -l | grep 4 >> child process exited abnormally > > Looks like Evan. Seriously, I don't look like this. I AM flesh and blood even if you don't think so. Fixed. :-) Evan > >> Running /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/dg.exp ... >> FAIL: /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/2007-08-01- >> Dom.ll >> Failed with signal(SIGSEGV) at line 1 >> while running: llvm-as < /proj/llvm/head/llvm/test/Transforms/ >> LoopUnswitch/2007-08-01-Dom.ll | opt -licm -loop-unswitch -disable- >> output >> opt[0x8572508] >> opt[0x85727ce] >> [0x7c2420] >> opt[0x83eede7] >> opt[0x83eee18] >> opt[0x83eefa9] >> opt[0x83eefa9] >> opt[0x83eefa9] >> opt[0x83eefa9] >> opt[0x83eefa9] >> opt[0x83ef590] >> opt[0x83ef7b6] >> opt(llvm::LPPassManager::runOnFunction(llvm::Function&)+0x3d9) >> [0x8454575] >> opt(llvm::FPPassManager::runOnFunction(llvm::Function&)+0x132) >> [0x850e21c] >> opt(llvm::FPPassManager::runOnModule(llvm::Module&)+0x62)[0x850e3ec] >> opt(llvm::MPPassManager::runOnModule(llvm::Module&)+0x115)[0x850deb1] >> opt(llvm::PassManagerImpl::run(llvm::Module&)+0x6e)[0x850e092] >> opt(llvm::PassManager::run(llvm::Module&)+0x1a)[0x850e0e4] >> opt(main+0xa95)[0x82a73c9] > > Looks like Devang. > > The good news is that the rest of the tests pass. > > Reid. > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40721 - /llvm/trunk/test/CodeGen/X86/x86-64-mem.ll
Author: evancheng Date: Thu Aug 2 00:04:16 2007 New Revision: 40721 URL: http://llvm.org/viewvc/llvm-project?rev=40721&view=rev Log: Fix test. Modified: llvm/trunk/test/CodeGen/X86/x86-64-mem.ll Modified: llvm/trunk/test/CodeGen/X86/x86-64-mem.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-mem.ll?rev=40721&r1=40720&r2=40721&view=diff == --- llvm/trunk/test/CodeGen/X86/x86-64-mem.ll (original) +++ llvm/trunk/test/CodeGen/X86/x86-64-mem.ll Thu Aug 2 00:04:16 2007 @@ -4,7 +4,7 @@ ; RUN: grep movq %t1 | wc -l | grep 6 ; RUN: grep leaq %t1 | wc -l | grep 1 ; RUN: llvm-upgrade < %s | llvm-as | \ -; RUN: llc -mtriple=x86_64-apple-darwin -relocation-model=static -o %t2 -f +; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=static -o %t2 -f ; RUN: grep rip %t2 | wc -l | grep 4 ; RUN: grep movl %t2 | wc -l | grep 2 ; RUN: grep movq %t2 | wc -l | grep 2 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40723 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86InstrInfo.td
Author: evancheng
Date: Thu Aug 2 00:48:35 2007
New Revision: 40723
URL: http://llvm.org/viewvc/llvm-project?rev=40723&view=rev
Log:
Switch some multiplication instructions over to the new scheme for testing.
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=40723&r1=40722&r2=40723&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Thu Aug 2 00:48:35 2007
@@ -1045,6 +1045,50 @@
break;
}
+case ISD::MUL: {
+ if (NVT == MVT::i8) {
+SDOperand N0 = Node->getOperand(0);
+SDOperand N1 = Node->getOperand(1);
+SDOperand Tmp0, Tmp1, Tmp2, Tmp3;
+bool foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3);
+if (!foldedLoad) {
+ foldedLoad = TryFoldLoad(N, N0, Tmp0, Tmp1, Tmp2, Tmp3);
+ if (foldedLoad)
+std::swap(N0, N1);
+}
+
+SDNode *ResNode;
+if (foldedLoad) {
+ SDOperand Chain = N1.getOperand(0);
+ AddToISelQueue(N0);
+ AddToISelQueue(Chain);
+ AddToISelQueue(Tmp0);
+ AddToISelQueue(Tmp1);
+ AddToISelQueue(Tmp2);
+ AddToISelQueue(Tmp3);
+ SDOperand InFlag(0, 0);
+ Chain = CurDAG->getCopyToReg(Chain, X86::AL, N0, InFlag);
+ InFlag = Chain.getValue(1);
+ SDOperand Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Chain, InFlag };
+ ResNode = CurDAG->getTargetNode(X86::MUL8m, MVT::i8, MVT::i8,
+ MVT::Other, Ops, 6);
+ ReplaceUses(N1.getValue(1), SDOperand(ResNode, 2));
+} else {
+ SDOperand Chain = CurDAG->getEntryNode();
+ AddToISelQueue(N0);
+ AddToISelQueue(N1);
+ SDOperand InFlag(0, 0);
+ InFlag = CurDAG->getCopyToReg(Chain, X86::AL, N0,
InFlag).getValue(1);
+ ResNode = CurDAG->getTargetNode(X86::MUL8r, MVT::i8, MVT::i8,
+ N1, InFlag);
+}
+
+ReplaceUses(N.getValue(0), SDOperand(ResNode, 0));
+return NULL;
+ }
+ break;
+}
+
case ISD::MULHU:
case ISD::MULHS: {
if (Opcode == ISD::MULHU)
@@ -1076,16 +1120,13 @@
SDOperand N0 = Node->getOperand(0);
SDOperand N1 = Node->getOperand(1);
- bool foldedLoad = false;
SDOperand Tmp0, Tmp1, Tmp2, Tmp3;
- foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3);
+ bool foldedLoad = TryFoldLoad(N, N1, Tmp0, Tmp1, Tmp2, Tmp3);
// MULHU and MULHS are commmutative
if (!foldedLoad) {
foldedLoad = TryFoldLoad(N, N0, Tmp0, Tmp1, Tmp2, Tmp3);
-if (foldedLoad) {
- N0 = Node->getOperand(1);
- N1 = Node->getOperand(0);
-}
+if (foldedLoad)
+ std::swap(N0, N1);
}
SDOperand Chain;
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=40723&r1=40722&r2=40723&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Aug 2 00:48:35 2007
@@ -548,7 +548,7 @@
// FIXME: Used for 8-bit mul, ignore result upper 8 bits.
// This probably ought to be moved to a def : Pat<> if the
// syntax can be accepted.
- [(set AL, (mul AL, GR8:$src))]>,
+ []>,
Imp<[AL],[AL,AH]>; // AL,AH = AL*GR8
def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src), "mul{w}\t$src", []>,
Imp<[AX],[AX,DX]>, OpSize;// AX,DX = AX*GR16
@@ -559,22 +559,22 @@
// FIXME: Used for 8-bit mul, ignore result upper 8 bits.
// This probably ought to be moved to a def : Pat<> if the
// syntax can be accepted.
- [(set AL, (mul AL, (loadi8 addr:$src)))]>,
- Imp<[AL],[AX]>; // AL,AH = AL*[mem8]
+ []>,
+ Imp<[AL],[AL,AH]>; // AL,AH = AL*[mem8]
def MUL16m : I<0xF7, MRM4m, (outs), (ins i16mem:$src),
"mul{w}\t$src", []>, Imp<[AX],[AX,DX]>,
OpSize; // AX,DX = AX*[mem16]
def MUL32m : I<0xF7, MRM4m, (outs), (ins i32mem:$src),
- "mul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>;// EAX,EDX =
EAX*[mem32]
+ "mul{l}\t$src", []>, Imp<[EAX],[EAX,EDX]>;// EAX,EDX =
EAX*[mem32]
def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", []>,
- Imp<[AL],[AX]>; // AL,AH = AL*GR8
+ Imp<[AL],[AL,AH]>; //
[llvm-commits] [llvm] r40722 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Author: evancheng
Date: Thu Aug 2 00:29:38 2007
New Revision: 40722
URL: http://llvm.org/viewvc/llvm-project?rev=40722&view=rev
Log:
Do not emit copies for physical register output if it's not used.
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=40722&r1=40721&r2=40722&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Aug 2 00:29:38 2007
@@ -858,6 +858,10 @@
/// operation.
bool hasNUsesOfValue(unsigned NUses, unsigned Value) const;
+ /// hasAnyUseOfValue - Return true if there are any use of the indicated
+ /// value. This method ignores uses of other values defined by this
operation.
+ bool hasAnyUseOfValue(unsigned Value) const;
+
/// isOnlyUse - Return true if this node is the only use of N.
///
bool isOnlyUse(SDNode *N) const;
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=40722&r1=40721&r2=40722&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Thu Aug 2 00:29:38 2007
@@ -676,7 +676,8 @@
if (HasPhysRegOuts) {
for (unsigned i = II.numDefs; i < NumResults; ++i) {
unsigned Reg = II.ImplicitDefs[i - II.numDefs];
-EmitCopyFromReg(Node, i, Reg, VRBaseMap);
+if (Node->hasAnyUseOfValue(i))
+ EmitCopyFromReg(Node, i, Reg, VRBaseMap);
}
}
} else {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=40722&r1=40721&r2=40722&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Aug 2 00:29:38
2007
@@ -3242,7 +3242,7 @@
// If there is only one value, this is easy.
if (getNumValues() == 1)
return use_size() == NUses;
- if (Uses.size() < NUses) return false;
+ if (use_size() < NUses) return false;
SDOperand TheValue(const_cast(this), Value);
@@ -3265,6 +3265,31 @@
}
+/// hasAnyUseOfValue - Return true if there are any use of the indicated
+/// value. This method ignores uses of other values defined by this operation.
+bool SDNode::hasAnyUseOfValue(unsigned Value) const {
+ assert(Value < getNumValues() && "Bad value!");
+
+ if (use_size() == 0) return false;
+
+ SDOperand TheValue(const_cast(this), Value);
+
+ SmallPtrSet UsersHandled;
+
+ for (SDNode::use_iterator UI = Uses.begin(), E = Uses.end(); UI != E; ++UI) {
+SDNode *User = *UI;
+if (User->getNumOperands() == 1 ||
+UsersHandled.insert(User)) // First time we've seen this?
+ for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
+if (User->getOperand(i) == TheValue) {
+ return true;
+}
+ }
+
+ return false;
+}
+
+
/// isOnlyUse - Return true if this node is the only use of N.
///
bool SDNode::isOnlyUse(SDNode *N) const {
___
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Re: [llvm-commits] Trunk Regressions
Running /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/dg.exp ... FAIL: /proj/llvm/head/llvm/test/Transforms/LoopUnswitch/2007-08-01- Dom.ll Failed with signal(SIGSEGV) at line 1 while running: llvm-as < /proj/llvm/head/llvm/test/Transforms/ LoopUnswitch/2007-08-01-Dom.ll | opt -licm -loop-unswitch -disable- output opt[0x8572508] opt[0x85727ce] [0x7c2420] opt[0x83eede7] opt[0x83eee18] opt[0x83eefa9] opt[0x83eefa9] opt[0x83eefa9] opt[0x83eefa9] opt[0x83eefa9] opt[0x83ef590] opt[0x83ef7b6] opt(llvm::LPPassManager::runOnFunction(llvm::Function&)+0x3d9) [0x8454575] opt(llvm::FPPassManager::runOnFunction(llvm::Function&)+0x132) [0x850e21c] opt(llvm::FPPassManager::runOnModule(llvm::Module&)+0x62)[0x850e3ec] opt(llvm::MPPassManager::runOnModule(llvm::Module&)+0x115) [0x850deb1] opt(llvm::PassManagerImpl::run(llvm::Module&)+0x6e)[0x850e092] opt(llvm::PassManager::run(llvm::Module&)+0x1a)[0x850e0e4] opt(main+0xa95)[0x82a73c9] I reverted a patch to fix this new test case today because it caused other regression reported by aKor. I am testing a patch to both. - Devang___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r40723 - in /llvm/trunk/lib/Target/X86: X86ISelDAGToDAG.cpp X86InstrInfo.td
On Aug 1, 2007, at 10:48 PM, Evan Cheng wrote: > Author: evancheng > Date: Thu Aug 2 00:48:35 2007 > New Revision: 40723 > > URL: http://llvm.org/viewvc/llvm-project?rev=40723&view=rev > Log: > Switch some multiplication instructions over to the new scheme for > testing. Do you plan to eventually allow writing the pattern for these instructions? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r40724 - /llvm/trunk/include/llvm/ADT/APSInt.h
Author: andersca
Date: Thu Aug 2 01:00:13 2007
New Revision: 40724
URL: http://llvm.org/viewvc/llvm-project?rev=40724&view=rev
Log:
Add extend and extOrTrunc methods that do sign or zero extension depending on
whether the integer is signed or not
Modified:
llvm/trunk/include/llvm/ADT/APSInt.h
Modified: llvm/trunk/include/llvm/ADT/APSInt.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APSInt.h?rev=40724&r1=40723&r2=40724&view=diff
==
--- llvm/trunk/include/llvm/ADT/APSInt.h (original)
+++ llvm/trunk/include/llvm/ADT/APSInt.h Thu Aug 2 01:00:13 2007
@@ -83,6 +83,22 @@
return *this;
}
+ APSInt& extend(uint32_t width) {
+if (IsUnsigned)
+ *this = zext(width);
+else
+ *this = sext(width);
+return *this;
+ }
+
+ APSInt& extOrTrunc(uint32_t width) {
+ if (IsUnsigned)
+*this = zextOrTrunc(width);
+ else
+*this = sextOrTrunc(width);
+ return *this;
+ }
+
APSInt operator>>(unsigned Amt) const {
return IsUnsigned ? lshr(Amt) : ashr(Amt);
}
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[llvm-commits] [llvm] r40725 - /llvm/trunk/include/llvm/ADT/APSInt.h
Author: andersca
Date: Thu Aug 2 01:05:19 2007
New Revision: 40725
URL: http://llvm.org/viewvc/llvm-project?rev=40725&view=rev
Log:
Fix bug spotted by Chris.
Modified:
llvm/trunk/include/llvm/ADT/APSInt.h
Modified: llvm/trunk/include/llvm/ADT/APSInt.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/APSInt.h?rev=40725&r1=40724&r2=40725&view=diff
==
--- llvm/trunk/include/llvm/ADT/APSInt.h (original)
+++ llvm/trunk/include/llvm/ADT/APSInt.h Thu Aug 2 01:05:19 2007
@@ -85,17 +85,17 @@
APSInt& extend(uint32_t width) {
if (IsUnsigned)
- *this = zext(width);
+ zext(width);
else
- *this = sext(width);
+ sext(width);
return *this;
}
APSInt& extOrTrunc(uint32_t width) {
if (IsUnsigned)
-*this = zextOrTrunc(width);
+zextOrTrunc(width);
else
-*this = sextOrTrunc(width);
+sextOrTrunc(width);
return *this;
}
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[llvm-commits] [llvm] r40726 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/zext-fold.ll
Author: lattner
Date: Thu Aug 2 01:11:14 2007
New Revision: 40726
URL: http://llvm.org/viewvc/llvm-project?rev=40726&view=rev
Log:
Enhance instcombine to be more aggressive about folding casts of
operations of casts. This implements InstCombine/zext-fold.ll
Added:
llvm/trunk/test/Transforms/InstCombine/zext-fold.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=40726&r1=40725&r2=40726&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Aug 2
01:11:14 2007
@@ -6313,7 +6313,7 @@
/// This is a truncation operation if Ty is smaller than V->getType(), or an
/// extension operation if Ty is larger.
static bool CanEvaluateInDifferentType(Value *V, const IntegerType *Ty,
- int &NumCastsRemoved) {
+ unsigned CastOpc, int &NumCastsRemoved)
{
// We can always evaluate constants in another type.
if (isa(V))
return true;
@@ -6323,30 +6323,48 @@
const IntegerType *OrigTy = cast(V->getType());
+ // If this is an extension or truncate, we can often eliminate it.
+ if (isa(I) || isa(I) || isa(I)) {
+// If this is a cast from the destination type, we can trivially eliminate
+// it, and this will remove a cast overall.
+if (I->getOperand(0)->getType() == Ty) {
+ // If the first operand is itself a cast, and is eliminable, do not count
+ // this as an eliminable cast. We would prefer to eliminate those two
+ // casts first.
+ if (!isa(I->getOperand(0)))
+++NumCastsRemoved;
+ return true;
+}
+ }
+
+ // We can't extend or shrink something that has multiple uses: doing so would
+ // require duplicating the instruction in general, which isn't profitable.
+ if (!I->hasOneUse()) return false;
+
switch (I->getOpcode()) {
case Instruction::Add:
case Instruction::Sub:
case Instruction::And:
case Instruction::Or:
case Instruction::Xor:
-if (!I->hasOneUse()) return false;
// These operators can all arbitrarily be extended or truncated.
-return CanEvaluateInDifferentType(I->getOperand(0), Ty, NumCastsRemoved) &&
- CanEvaluateInDifferentType(I->getOperand(1), Ty, NumCastsRemoved);
+return CanEvaluateInDifferentType(I->getOperand(0), Ty, CastOpc,
+ NumCastsRemoved) &&
+ CanEvaluateInDifferentType(I->getOperand(1), Ty, CastOpc,
+ NumCastsRemoved);
case Instruction::Shl:
-if (!I->hasOneUse()) return false;
// If we are truncating the result of this SHL, and if it's a shift of a
// constant amount, we can always perform a SHL in a smaller type.
if (ConstantInt *CI = dyn_cast(I->getOperand(1))) {
uint32_t BitWidth = Ty->getBitWidth();
if (BitWidth < OrigTy->getBitWidth() &&
CI->getLimitedValue(BitWidth) < BitWidth)
-return CanEvaluateInDifferentType(I->getOperand(0),
Ty,NumCastsRemoved);
+return CanEvaluateInDifferentType(I->getOperand(0), Ty, CastOpc,
+ NumCastsRemoved);
}
break;
case Instruction::LShr:
-if (!I->hasOneUse()) return false;
// If this is a truncate of a logical shr, we can truncate it to a smaller
// lshr iff we know that the bits we would otherwise be shifting in are
// already zeros.
@@ -6357,22 +6375,17 @@
MaskedValueIsZero(I->getOperand(0),
APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) &&
CI->getLimitedValue(BitWidth) < BitWidth) {
-return CanEvaluateInDifferentType(I->getOperand(0),
Ty,NumCastsRemoved);
+return CanEvaluateInDifferentType(I->getOperand(0), Ty, CastOpc,
+ NumCastsRemoved);
}
}
break;
- case Instruction::Trunc:
case Instruction::ZExt:
case Instruction::SExt:
-// If this is a cast from the destination type, we can trivially eliminate
-// it, and this will remove a cast overall.
-if (I->getOperand(0)->getType() == Ty) {
- // If the first operand is itself a cast, and is eliminable, do not count
- // this as an eliminable cast. We would prefer to eliminate those two
- // casts first.
- if (isa(I->getOperand(0)))
-return true;
-
+ case Instruction::Trunc:
+// If this is the same kind of case as our original (e.g. zext+zext), we
+// can safely eliminate it.
+if (I->getOpcode() == CastOpc) {
++NumCastsRemoved;
return true;
}
@@ -6414,14 +6427,16 @@
case Instruction::Trunc:
case Instruction::ZExt:
case In
