Author: evancheng
Date: Wed Aug 1 16:42:24 2007
New Revision: 40691
URL: http://llvm.org/viewvc/llvm-project?rev=40691&view=rev
Log:
Missing Requires.
Modified:
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=40691&r1=40690&r2=40691&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Wed Aug 1 16:42:24 2007
@@ -2618,7 +2618,7 @@
// (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
def : Pat<(vector_extract
(bc_v4i32 (v4f32 (scalar_to_vector (loadf32 addr:$src)))), (iPTR
0)),
- (MOV32rm addr:$src)>;
+ (MOV32rm addr:$src)>, Requires<[HasSSE2]>;
def : Pat<(vector_extract
(bc_v2i64 (v2f64 (scalar_to_vector (loadf64 addr:$src)))), (iPTR
0)),
- (MOV64rm addr:$src)>;
+ (MOV64rm addr:$src)>, Requires<[HasSSE2, In64BitMode]>;
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