On Jul 31, 2007, at 1:04 AM, Evan Cheng wrote: > Author: evancheng > Date: Tue Jul 31 03:04:03 2007 > New Revision: 40628 > > URL: http://llvm.org/viewvc/llvm-project?rev=40628&view=rev > Log: > Redo and generalize previously removed opt for pinsrw: (vextract > (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load )
> + > +// (vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 > load $addr) > +def : Pat<(vector_extract > + (bc_v4i32 (v4f32 (scalar_to_vector (loadf32 addr: > $src)))), (iPTR 0)), > + (MOV32rm addr:$src)>; > +def : Pat<(vector_extract > + (bc_v2i64 (v2f64 (scalar_to_vector (loadf64 addr: > $src)))), (iPTR 0)), > + (MOV64rm addr:$src)>; Would it be possible (and would it make sense) to do this in the dag combiner rather than as a target-specific pattern? -Chris _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
