[edk2-devel] [PATCH 1/1] UefiPayloadPkg/PayloadLoaderPeim: Replace Delta type INTN with UINTN

2022-01-29 Thread Guomin Jiang
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3818

ProcessRelocation64 use INTN  Delta. However it force it to UINTN when
call it.

It will have some potential issue when memory larger than 2G because
the high memory address will be fill with 0x if use INTN.

Cc: Guo Dong 
Cc: Ray Ni 
Cc: Maurice Ma 
Cc: Benjamin You 
Signed-off-by: Guomin Jiang 
---
 UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c 
b/UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c
index dc47a05c6e4a..ee530322d7ed 100644
--- a/UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c
+++ b/UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c
@@ -108,7 +108,7 @@ ProcessRelocation64 (
   IN  UINT64  RelaSize,
   IN  UINT64  RelaEntrySize,
   IN  UINT64  RelaType,
-  IN  INTNDelta,
+  IN  UINTN   Delta,
   IN  BOOLEAN DynamicLinking
   )
 {
-- 
2.30.0.windows.2



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Re: [edk2-devel] [PATCH 32/32] UefiPayloadPkg: Add build option for Above 4G Memory

2022-01-29 Thread Sean Rhodes
When build option ABOVE_4G_MEMORY is set to true, nothing will change
and EDKII will use all available memory.

Setting it to false will create memory type information HOB in
payload entry, so that EDKII will reserve enough memory below 4G
for EDKII modules. This option is useful for bootloaders that are not
fully 64-bit aware such as Qubes R4.0.4 bootloader, Zorin and Proxmox.

Signed-off-by: Sean Rhodes 
---
.../UefiPayloadEntry/UefiPayloadEntry.c       | 41 +++
.../UefiPayloadEntry/UefiPayloadEntry.inf     |  7 
UefiPayloadPkg/UefiPayloadPkg.dec             |  3 ++
UefiPayloadPkg/UefiPayloadPkg.dsc             |  7 
4 files changed, 58 insertions(+)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c 
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 0fed1e3691..e343956a1a 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -5,10 +5,46 @@

**/

+#include 
#include "UefiPayloadEntry.h"

STATIC UINT32  mTopOfLowerUsableDram = 0;

+/**
+   Function to reserve memory below 4GB for EDKII Modules.
+
+   This causes the DXE to dispatch everything under 4GB and allows Operating
+   System's that require EFI_LOADED_IMAGE to be under 4GB to start.
+   e.g. Xen hypervisor used in Qubes
+
+   @param  None
+
+  @retval None
+**/
+VOID
+ForceModulesBelow4G (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_INFO, "Building hob to restrict memory resorces to below 
4G.\n"));
+  EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
+    { EfiACPIReclaimMemory,   FixedPcdGet32 
(PcdMemoryTypeEfiACPIReclaimMemory) },
+    { EfiACPIMemoryNVS,       FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) },
+    { EfiReservedMemoryType,  FixedPcdGet32 
(PcdMemoryTypeEfiReservedMemoryType) },
+    { EfiRuntimeServicesData, FixedPcdGet32 
(PcdMemoryTypeEfiRuntimeServicesData) },
+    { EfiRuntimeServicesCode, FixedPcdGet32 
(PcdMemoryTypeEfiRuntimeServicesCode) },
+    { EfiMaxMemoryType,       0     }
+  };
+  //
+  // Create Memory Type Information HOB
+  //
+  BuildGuidDataHob (
+    &gEfiMemoryTypeInformationGuid,
+    mDefaultMemoryTypeInformation,
+    sizeof(mDefaultMemoryTypeInformation)
+  );
+}
+
/**
Callback function to build resource descriptor HOB

@@ -438,6 +474,11 @@ _ModuleEntryPoint (
// Build other HOBs required by DXE
BuildGenericHob ();

+  // Create a HOB to make resources for EDKII modules below 4G
+  if (FixedPcdGetBool (PcdAbove4GMemory) == FALSE) {
+    ForceModulesBelow4G ();
+  }
+
// Load the DXE Core
Status = LoadDxeCore (&DxeCoreEntryPoint);
ASSERT_EFI_ERROR (Status);
diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf 
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
index 1847d6481a..2ca47e3bb5 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
@@ -86,8 +86,15 @@
gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize
gUefiPayloadPkgTokenSpaceGuid.PcdBootloaderParameter
gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode

gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack               ## 
SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy ## 
SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy       ## 
SOMETIMES_CONSUMES

+  gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory
+
diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec 
b/UefiPayloadPkg/UefiPayloadPkg.dec
index 551f0a4915..3915a0579b 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dec
+++ b/UefiPayloadPkg/UefiPayloadPkg.dec
@@ -83,6 +83,9 @@ 
gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x0400|UINT32|0x

gUefiPayloadPkgTokenSpaceGuid.PcdPcdDriverFile|{ 0x57, 0x72, 0xcf, 0x80, 0xab, 
0x87, 0xf9, 0x47, 0xa3, 0xfe, 0xD5, 0x0B, 0x76, 0xd8, 0x95, 0x41 
}|VOID*|0x0018

+# Above 4G Memory
+gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|1|UINT32|0x0019
+
## FFS filename to find the default variable initial data file.
# @Prompt FFS Name of variable initial data file
gUefiPayloadPkgTokenSpaceGuid.PcdNvsDataFile |{ 0x1a, 0xf1, 0xb1, 0xae, 0x42, 
0xcc, 0xcf, 0x4e, 0xac, 0x60, 0xdb, 0xab, 0xf6, 0xca, 0x69, 0xe6 
}|VOID*|0x0025
diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc 
b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 3d08edfe31..4bb160acd5 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -33,6 +33,7 @@
DEFINE UNIVERSAL_PAYLOAD            = FALSE
DEFINE SECURITY_STUB_ENABLE         = TRUE
DEFINE SMM_SUPPORT                  = FALSE
+  DEFINE ABOVE_4G_MEMORY              = TRUE
#
# SBL:      UEFI payload for Slim Bootloa

Re: [edk2-devel] [PATCH 32/32] UefiPayloadPkg: Add build option for Above 4G Memory

2022-01-29 Thread Sean Rhodes
Thanks :)

I've updated the PR. Do I need to resend the new patch again?

[PATCH 33/33] UefiPayloadPkg: Add build option for Above 4G Memory

When build option ABOVE_4G_MEMORY is set to true, nothing will change
and EDKII will use all available memory.

Setting it to false will create memory type information HOB in
payload entry, so that EDKII will reserve enough memory below 4G
for EDKII modules. This option is useful for bootloaders that are not
fully 64-bit aware such as Qubes R4.0.4 bootloader, Zorin and Proxmox.

Signed-off-by: Sean Rhodes 
---
.../UefiPayloadEntry/UefiPayloadEntry.c       | 41 +++
.../UefiPayloadEntry/UefiPayloadEntry.inf     |  7 
UefiPayloadPkg/UefiPayloadPkg.dec             |  3 ++
UefiPayloadPkg/UefiPayloadPkg.dsc             |  3 ++
4 files changed, 54 insertions(+)

diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c 
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 0fed1e3691..d5c18dc343 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -5,10 +5,46 @@

**/

+#include 
#include "UefiPayloadEntry.h"

STATIC UINT32  mTopOfLowerUsableDram = 0;

+/**
+   Function to reserve memory below 4GB for EDKII Modules.
+
+   This causes the DXE to dispatch everything under 4GB and allows Operating
+   System's that require EFI_LOADED_IMAGE to be under 4GB to start.
+   e.g. Xen hypervisor used in Qubes
+
+   @param  None
+
+  @retval None
+**/
+VOID
+ForceModulesBelow4G (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_INFO, "Building hob to restrict memory resorces to below 
4G.\n"));
+  EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
+    { EfiACPIReclaimMemory,   FixedPcdGet32 
(PcdMemoryTypeEfiACPIReclaimMemory) },
+    { EfiACPIMemoryNVS,       FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) },
+    { EfiReservedMemoryType,  FixedPcdGet32 
(PcdMemoryTypeEfiReservedMemoryType) },
+    { EfiRuntimeServicesData, FixedPcdGet32 
(PcdMemoryTypeEfiRuntimeServicesData) },
+    { EfiRuntimeServicesCode, FixedPcdGet32 
(PcdMemoryTypeEfiRuntimeServicesCode) },
+    { EfiMaxMemoryType,       0     }
+  };
+  //
+  // Create Memory Type Information HOB
+  //
+  BuildGuidDataHob (
+    &gEfiMemoryTypeInformationGuid,
+    mDefaultMemoryTypeInformation,
+    sizeof(mDefaultMemoryTypeInformation)
+  );
+}
+
/**
Callback function to build resource descriptor HOB

@@ -438,6 +474,11 @@ _ModuleEntryPoint (
// Build other HOBs required by DXE
BuildGenericHob ();

+  // Create a HOB to make resources for EDKII modules below 4G
+  if (!FixedPcdGetBool (PcdAbove4GMemory) ) {
+    ForceModulesBelow4G ();
+  }
+
// Load the DXE Core
Status = LoadDxeCore (&DxeCoreEntryPoint);
ASSERT_EFI_ERROR (Status);
diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf 
b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
index 1847d6481a..2ca47e3bb5 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf
@@ -86,8 +86,15 @@
gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize
gUefiPayloadPkgTokenSpaceGuid.PcdBootloaderParameter
gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
+  gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode

gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack               ## 
SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy ## 
SOMETIMES_CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy       ## 
SOMETIMES_CONSUMES

+  gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory
+
diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec 
b/UefiPayloadPkg/UefiPayloadPkg.dec
index 551f0a4915..653a52b5a7 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dec
+++ b/UefiPayloadPkg/UefiPayloadPkg.dec
@@ -83,6 +83,9 @@ 
gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x0400|UINT32|0x

gUefiPayloadPkgTokenSpaceGuid.PcdPcdDriverFile|{ 0x57, 0x72, 0xcf, 0x80, 0xab, 
0x87, 0xf9, 0x47, 0xa3, 0xfe, 0xD5, 0x0B, 0x76, 0xd8, 0x95, 0x41 
}|VOID*|0x0018

+# Above 4G Memory
+gUefiPayloadPkgTokenSpaceGuid.PcdAbove4GMemory|TRUE|BOOLEAN|0x0019
+
## FFS filename to find the default variable initial data file.
# @Prompt FFS Name of variable initial data file
gUefiPayloadPkgTokenSpaceGuid.PcdNvsDataFile |{ 0x1a, 0xf1, 0xb1, 0xae, 0x42, 
0xcc, 0xcf, 0x4e, 0xac, 0x60, 0xdb, 0xab, 0xf6, 0xca, 0x69, 0xe6 
}|VOID*|0x0025
diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc 
b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 1ce96a51c1..dad14be343 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -33,6 +33,7 @@
DEFINE UNIVERSAL_PAYLOAD            = FALSE
DEFINE SECURITY_STUB_ENABLE         = T

Re: [edk2-devel] [PATCH] UefiPayloadPkg: Add support for logging to CBMEM console

2022-01-29 Thread Sean Rhodes
Hey Benjamin

The commit has been around for a while now and is perfectly functional. Why 
don't we upstream it and then `FindCbTag()` and `CopyMem()` can be a follow-up 
patch when/if time allows?

Cheers
Sean

Squashing that commit in:
[PATCH] UefiPayloadPkg: Add support for logging to CBMEM console

Tested on QEMU, dumping the appropriate memory region in UEFI shell
shows the TianoCore log. `find_cb_subtable` is sourced from STM/SeaBIOS.

Signed-off-by: Benjamin Doron 
---
UefiPayloadPkg/Include/Coreboot.h             |  14 +
.../Library/CbSerialPortLib/CbSerialPortLib.c | 272 ++
.../CbSerialPortLib/CbSerialPortLib.inf       |  27 ++
UefiPayloadPkg/UefiPayloadPkg.dsc             |   5 +
UefiPayloadPkg/UefiPayloadPkg.fdf             |   6 +-
5 files changed, 323 insertions(+), 1 deletion(-)
create mode 100644 UefiPayloadPkg/Library/CbSerialPortLib/CbSerialPortLib.c
create mode 100644 UefiPayloadPkg/Library/CbSerialPortLib/CbSerialPortLib.inf

diff --git a/UefiPayloadPkg/Include/Coreboot.h 
b/UefiPayloadPkg/Include/Coreboot.h
index a3e1109fe8..f2f577a02e 100644
--- a/UefiPayloadPkg/Include/Coreboot.h
+++ b/UefiPayloadPkg/Include/Coreboot.h
@@ -199,7 +199,14 @@ struct cb_forward {
UINT64    forward;
};

+struct cb_cbmem_ref {
+  UINT32 tag;
+  UINT32 size;
+  UINT64 cbmem_addr;
+};
+
#define CB_TAG_FRAMEBUFFER  0x0012
+
struct cb_framebuffer {
UINT32    tag;
UINT32    size;
@@ -230,6 +237,13 @@ struct cb_vdat {
#define CB_TAG_TIMESTAMPS     0x0016
#define CB_TAG_CBMEM_CONSOLE  0x0017
#define CB_TAG_MRC_CACHE      0x0018
+
+struct cbmem_console {
+  UINT32 size;
+  UINT32 cursor;
+  UINT8  body[0];
+} __attribute__((packed));
+
struct cb_cbmem_tab {
UINT32    tag;
UINT32    size;
diff --git a/UefiPayloadPkg/Library/CbSerialPortLib/CbSerialPortLib.c 
b/UefiPayloadPkg/Library/CbSerialPortLib/CbSerialPortLib.c
new file mode 100644
index 00..7b26c08dd7
--- /dev/null
+++ b/UefiPayloadPkg/Library/CbSerialPortLib/CbSerialPortLib.c
@@ -0,0 +1,272 @@
+/** @file
+  CBMEM console SerialPortLib instance
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+//
+// We can't use DebugLib due to a constructor dependency cycle between DebugLib
+// and ourselves.
+//
+#define ASSERT(Expression)      \
+  do {                          \
+    if (!(Expression)) {        \
+      CpuDeadLoop ();           \
+    }                           \
+  } while (FALSE)
+
+#define CBMC_CURSOR_MASK ((1 << 28) - 1)
+#define CBMC_OVERFLOW (1 << 31)
+
+STATIC struct cbmem_console  *gCbConsole = NULL;
+STATIC UINT32 STM_cursor = 0;
+
+// Try to find the coreboot memory table in the given coreboot table.
+static void *
+find_cb_subtable(struct cb_header *cbh, UINT32 tag)
+{
+  char *tbl = (char *)cbh + sizeof(*cbh);
+  UINT32 count = cbh->table_entries;
+  int i;
+  for (i=0; isize;
+    if (cbm->tag == tag)
+      return cbm;
+  }
+    return NULL;
+}
+
+/**
+  Initialize the serial device hardware.
+
+  If no initialization is required, then return RETURN_SUCCESS.
+  If the serial device was successfully initialized, then return 
RETURN_SUCCESS.
+  If the serial device could not be initialized, then return 
RETURN_DEVICE_ERROR.
+
+  @retval RETURN_SUCCESS        The serial device was initialized.
+  @retval RETURN_DEVICE_ERROR   The serial device could not be initialized.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+  VOID
+  )
+{
+  /* `FindCbTag` doesn't work because we need direct access to the memory 
addresses? */
+  struct cb_header *cbh = GetParameterBase();
+  if (!cbh) {
+    return RETURN_DEVICE_ERROR;
+  }
+
+  struct cb_cbmem_ref *cbref = find_cb_subtable(cbh, CB_TAG_CBMEM_CONSOLE);
+  if (!cbref) {
+    return RETURN_DEVICE_ERROR;
+  }
+
+  gCbConsole = (void *)(UINTN)cbref->cbmem_addr; // Support PEI and DXE
+  if (gCbConsole == NULL) {
+    return RETURN_DEVICE_ERROR;
+  }
+
+  // set the cursor such that the STM console will not overwrite the
+  // coreboot console output
+  STM_cursor = gCbConsole->cursor & CBMC_CURSOR_MASK;
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Write data from buffer to serial device.
+
+  Writes NumberOfBytes data bytes from Buffer to the serial device.
+  The number of bytes actually written to the serial device is returned.
+  If the return value is less than NumberOfBytes, then the write operation 
failed.
+  If Buffer is NULL, then ASSERT().
+  If NumberOfBytes is zero, then return 0.
+
+  @param  Buffer           Pointer to the data buffer to be written.
+  @param  NumberOfBytes    Number of bytes to written to the serial device.
+
+  @retval 0                NumberOfBytes is 0.
+  @retval >0               The number of bytes written to the serial device.
+                           If this value is less than NumberOfBytes, then the 
write operation failed.
+
+**/
+UINTN
+EFIAPI
+SerialPortWrite (
+  IN UINT8     *Buffer,
+  IN UINTN     NumberOfBytes
+  )
+{
+  UINTN             Sent;
+  UINT32      

[edk2-devel] [PATCH 33/33] BlSupportSmm: fix definition of SetSmrr()

2022-01-29 Thread Sean Rhodes
From: Matt DeVillier 

Signed-off-by: Matt DeVillier 
Change-Id: Id5b077ad6c79717a9d97d4228145791ef062962c
---
 UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c 
b/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c
index dcc4d60bb2..0d16aec8ef 100644
--- a/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c
+++ b/UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c
@@ -191,6 +191,7 @@ SmmFeatureLockOnS3 (
   @param[in] ProcedureArgument  Pointer to SMRR_BASE_MASK structure.
 **/
 VOID
+EFIAPI
 SetSmrr (
   IN VOID  *ProcedureArgument
   )
-- 
2.32.0



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[edk2-devel] [PATCH] ArmVirtPkg/ArmVirtMemoryInitPeiLib: avoid redundant cache invalidation

2022-01-29 Thread Ard Biesheuvel
Alex reports that the cache invalidation performed by
ArmVirtMemoryInitPeiLib takes a non-negligible amount of time at boot.
This cache invalidation used to be necessary to avoid inconsistencies
between the CPU's cached and uncached views of the permanent PEI memory
region, given that the PEI phase is where the MMU gets enabled.

The only allocations done from permanent PEI memory with the MMU off are
pages used for page tables, and since commit 748fea6279ef
("ArmPkg/ArmMmuLib AARCH64: invalidate page tables before populating
them"), each of those is invalidated in the caches explicitly, for
reasons described in the patch's commit log. All other allocations done
in PEI are either from temporary PEI memory, which includes the stack,
or from permanent PEI memory but after the MMU has been enabled.

This means that the cache invalidation in ArmVirtMemoryInitPeiLib is no
longer necessary, and can simply be dropped.

Cc: Alexander Graf 
Signed-off-by: Ard Biesheuvel 
---
 .../ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c| 9 -
 1 file changed, 9 deletions(-)

diff --git 
a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c 
b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
index 022e13e762b6..98d90ad4200d 100644
--- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
+++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c
@@ -91,15 +91,6 @@ MemoryPeim (
   );
   }
 
-  //
-  // When running under virtualization, the PI/UEFI memory region may be
-  // clean but not invalidated in system caches or in lower level caches
-  // on other CPUs. So invalidate the region by virtual address, to ensure
-  // that the contents we put there with the caches and MMU off will still
-  // be visible after turning them on.
-  //
-  InvalidateDataCacheRange ((VOID *)(UINTN)UefiMemoryBase, UefiMemorySize);
-
   // Build Memory Allocation Hob
   InitMmu ();
 
-- 
2.30.2



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Re: [edk2-devel] [edk2-platforms PATCH] Platform/RaspberryPi: Add 'clock-frequency' property for miniuart

2022-01-29 Thread Ard Biesheuvel
(+ Jeremy)

On Fri, 28 Jan 2022 at 16:40, Adrien Thierry  wrote:
>
> Describe the miniuart clock frequency in a _DSD property, so that it can
> be read from the Linux driver.
>
> The miniuart clock frequency is the core clock frequency on the
> Raspberry Pi. It can be modified by the user using the 'core_freq'
> property in the config.txt file. So, we fetch it from the underlying
> Raspberry Pi firmware.
>
> Signed-off-by: Adrien Thierry 
> ---
>  Platform/RaspberryPi/AcpiTables/Uart.asl   | 14 ++
>  Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c |  9 +
>  .../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf|  1 +
>  Platform/RaspberryPi/RPi3/RPi3.dsc |  5 +
>  Platform/RaspberryPi/RPi4/RPi4.dsc |  5 +
>  Platform/RaspberryPi/RaspberryPi.dec   |  1 +
>  6 files changed, 35 insertions(+)
>
> diff --git a/Platform/RaspberryPi/AcpiTables/Uart.asl 
> b/Platform/RaspberryPi/AcpiTables/Uart.asl
> index 974f06d3bc..ef5165be98 100644
> --- a/Platform/RaspberryPi/AcpiTables/Uart.asl
> +++ b/Platform/RaspberryPi/AcpiTables/Uart.asl
> @@ -77,6 +77,20 @@ Device (URTM)
>  MEMORY32SETBASE (RBUF, RMEM, RBAS, BCM2836_MINI_UART_OFFSET)
>
>  Return (^RBUF)
>
>}
>
> +
>
> +  //
>
> +  // Mini Uart Clock Rate will be dynamically updated during boot
>
> +  // 0x4D 0x55 0x43 0x52 0xC 0x100 (Value must be > 16777215)
>
> +  //
>
> +  Name (MUCR, 0x100)
>
> +
>
> +  Name (_DSD, Package ()
>
> +  {
>
> +ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package ()
>
> +{
>
> +  Package (2) { "clock-frequency", MUCR },
>
> +}
>
> +  })
>
>  }
>
>
>
>  //
>
> diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c 
> b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> index 415d99fadb..3dcf2bac0d 100644
> --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
> @@ -44,6 +44,7 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
>  STATIC UINT32 mModelFamily = 0;
>
>  STATIC UINT32 mModelInstalledMB = 0;
>
>  STATIC UINT32 mModelRevision = 0;
>
> +STATIC UINT32 mCoreClockRate = 0;
>
>
>
>  STATIC EFI_MAC_ADDRESS  mMacAddress;
>
>
>
> @@ -798,6 +799,7 @@ STATIC CONST AML_NAME_OP_REPLACE SsdtEmmcNameOpReplace[] 
> = {
>
>
>  STATIC CONST AML_NAME_OP_REPLACE DsdtNameOpReplace[] = {
>
>{ "URIU", PcdToken (PcdUartInUse) },
>
> +  { "MUCR", PcdToken (PcdMiniUartClockRate) },
>
>{ }
>
>  };
>
>
>
> @@ -944,6 +946,13 @@ ConfigInitialize (
>  DEBUG ((DEBUG_INFO, "Current Raspberry Pi revision %x\n", 
> mModelRevision));
>
>}
>
>
>
> +  Status = mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_CORE, 
> &mCoreClockRate);
>
> +  if (Status != EFI_SUCCESS) {
>
> +DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi core clock rate: 
> %r\n", Status));
>
> +  } else {
>
> +PcdSet32S (PcdMiniUartClockRate, mCoreClockRate);
>
> +  }
>
> +
>
>Status = SetupVariables ();
>
>if (Status != EFI_SUCCESS) {
>
>  DEBUG ((DEBUG_ERROR, "Couldn't not setup NV vars: %r\n", Status));
>
> diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf 
> b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
> index e6e22ad82e..6f6e8f42ac 100644
> --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
> +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
> @@ -95,6 +95,7 @@
>gRaspberryPiTokenSpaceGuid.PcdFanTemp
>
>gRaspberryPiTokenSpaceGuid.PcdUartInUse
>
>gRaspberryPiTokenSpaceGuid.PcdXhciPci
>
> +  gRaspberryPiTokenSpaceGuid.PcdMiniUartClockRate
>
>
>
>  [Depex]
>
>gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid
>
> diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc 
> b/Platform/RaspberryPi/RPi3/RPi3.dsc
> index 6ab5d1ae6d..6dc48dc233 100644
> --- a/Platform/RaspberryPi/RPi3/RPi3.dsc
> +++ b/Platform/RaspberryPi/RPi3/RPi3.dsc
> @@ -561,6 +561,11 @@
>#
>
>gRaspberryPiTokenSpaceGuid.PcdUartInUse|1
>
>
>
> +  #
>
> +  # Mini-UART clock rate
>
> +  #
>
> +  gRaspberryPiTokenSpaceGuid.PcdMiniUartClockRate|25000
>
> +
>
>  
> 
>
>  #
>
>  # Components Section - list of all EDK II Modules needed by this Platform
>
> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc 
> b/Platform/RaspberryPi/RPi4/RPi4.dsc
> index 44ed60ab2f..a9c0c36bb1 100644
> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
> @@ -580,6 +580,11 @@
>#
>
>gRaspberryPiTokenSpaceGuid.PcdUartInUse|0
>
>
>
> +  #
>
> +  # Mini-UART clock rate
>
> +  #
>
> +  gRaspberryPiTokenSpaceGuid.PcdMiniUartClockRate|5
>
> +
>
>  
> 
>
>  #
>
>  # Components Section - list of all EDK II Modules needed by this Platform
>
> diff --git a/Platform/RaspberryPi/RaspberryPi.dec 
> b/Platform/RaspberryPi/RaspberryPi.dec
> index 797be59274..17b6061a05 100644

Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib

2022-01-29 Thread Abner Chang
Thanks for the reminder. Apparently, I missed Gerd's feedback. His reply is 
buried with another patch set he sent in my mailbox.

Abner

From: Ard Biesheuvel 
Sent: Saturday, January 29, 2022 2:06 AM
To: edk2-devel-groups-io ; Chang, Abner (HPS SW/FW 
Technologist) 
Cc: Schaefer, Daniel (ROM Janitor) ; Sunil V L 
; Ard Biesheuvel ; Jiewen 
Yao ; Jordan Justen ; Gerd 
Hoffmann ; Leif Lindholm ; Sami Mujawar 

Subject: Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg 
BaseCachingPciExpressLib

On Fri, 28 Jan 2022 at 17:14, Abner Chang  wrote:
>
> Hi package owners,
> Please take a look at this patch, this patch moves ArmVirtPkg 
> BaseCachingPciExpressLib to OvmfPkg for OvmfRiscV64.
>

Do you intend to incorporate Gerd's feedback?

>
> 
> From: devel@edk2.groups.io  on behalf of Abner Chang 
> 
> Sent: Monday, January 24, 2022 9:52 PM
> To: devel@edk2.groups.io 
> Cc: Chang, Abner (HPS SW/FW Technologist) ; Schaefer, 
> Daniel (ROM Janitor) ; Sunil V L 
> ; Ard Biesheuvel ; 
> Jiewen Yao ; Jordan Justen ; 
> Gerd Hoffmann ; Leif Lindholm ; Sami 
> Mujawar 
> Subject: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib
>
> Clone BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
> RISC-V Virt platform can leverage the same library to access PCI Express
> registers through PCI Express base address set in PcdPciExpressBaseAddress
> and cached in a global variable. Also remove the one under ArmVirtPkg.
>
> Signed-off-by: Abner Chang 
> Cc: Daniel Schaefer 
> Cc: Sunil V L 
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Cc: Jordan Justen 
> Cc: Gerd Hoffmann 
> Cc: Leif Lindholm 
> Cc: Sami Mujawar 
>
> Abner Chang (2):
>   OvmfPkg/BaseCachingPciExpressLib: Clone ArmVirtPkg
> BaseCachingPciExpressLib
>   ArmVirtPkg/BaseCachingPciExpressLib: Remove BaseCachingPciExpressLib
>
>  ArmVirtPkg/ArmVirt.dsc.inc  | 2 +-
>  ArmVirtPkg/ArmVirtKvmTool.dsc   | 6 +++---
>  .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf   | 5 +++--
>  .../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
>  4 files changed, 7 insertions(+), 6 deletions(-)
>  rename {ArmVirtPkg => 
> OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (87%)
>  rename {ArmVirtPkg => 
> OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
>
> --
> 2.31.1
>
>
>
>
>
>
> 


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Re: [edk2-devel] [PATCH v1 1/1] Maintainers.txt: Add Sami Mujawar as reviewer for ArmPkg

2022-01-29 Thread Ard Biesheuvel
On Wed, 19 Jan 2022 at 11:20, Sami Mujawar  wrote:
>
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
> Signed-off-by: Sami Mujawar 

Excellent idea!

Merged as #2453

Thanks,

> ---
>
> Notes:
> v1:
>  - Add Sami as the reviewer for ArmPkg[SAMI]
>Ref: https://edk2.groups.io/g/devel/message/82219
>
>  Maintainers.txt | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 
> 3bda97ef258318a52d632f7425bfe51b65debc57..4c5d3111c2ecdec00f6444884e6ba65211e5a2b3
>  100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -132,6 +132,7 @@ F: ArmPkg/
>  W: https://github.com/tianocore/tianocore.github.io/wiki/ArmPkg
>  M: Leif Lindholm  [leiflindholm]
>  M: Ard Biesheuvel  [ardbiesheuvel]
> +R: Sami Mujawar  [samimujawar]
>
>  ArmPlatformPkg
>  F: ArmPlatformPkg/
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>


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Re: [edk2-devel] [PATCH v3 2/8] DynamicTablesPkg: FdtHwInfoParserLib: Parse Pmu info

2022-01-29 Thread Ard Biesheuvel
On Fri, 28 Jan 2022 at 16:41, PierreGondois  wrote:
>
> From: Pierre Gondois 
>
> Parse the Pmu interrupts if a pmu compatible node is present,
> and populate the MADT GicC structure accordingly.
>
> Signed-off-by: Pierre Gondois 
> ---
>
> Notes:
> v3:
>  - New patch. [Pierre]
>
>  .../FdtHwInfoParserLib/Gic/ArmGicCParser.c| 131 +-
>  .../FdtHwInfoParserLib/Gic/ArmGicCParser.h|   8 +-
>  2 files changed, 135 insertions(+), 4 deletions(-)
>
> diff --git a/DynamicTablesPkg/Library/FdtHwInfoParserLib/Gic/ArmGicCParser.c 
> b/DynamicTablesPkg/Library/FdtHwInfoParserLib/Gic/ArmGicCParser.c
> index b4e6729a4ab2..961607378449 100644
> --- a/DynamicTablesPkg/Library/FdtHwInfoParserLib/Gic/ArmGicCParser.c
> +++ b/DynamicTablesPkg/Library/FdtHwInfoParserLib/Gic/ArmGicCParser.c
> @@ -1,13 +1,14 @@
>  /** @file
>Arm Gic cpu parser.
>
> -  Copyright (c) 2021, ARM Limited. All rights reserved.
> +  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
>SPDX-License-Identifier: BSD-2-Clause-Patent
>
>@par Reference(s):
>- linux/Documentation/devicetree/bindings/arm/cpus.yaml
>- linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
>- 
> linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> +  - linux/Documentation/devicetree/bindings/arm/pmu.yaml
>  **/
>
>  #include "FdtHwInfoParser.h"
> @@ -34,6 +35,21 @@ STATIC CONST COMPATIBILITY_INFO  CpuCompatibleInfo = {
>CpuCompatibleStr
>  };
>
> +/** Pmu compatible strings.
> +
> +  Any other "compatible" value is not supported by this module.
> +*/
> +STATIC CONST COMPATIBILITY_STR  PmuCompatibleStr[] = {
> +  { "arm,armv8-pmuv3" }
> +};
> +
> +/** COMPATIBILITY_INFO structure for the PmuCompatibleStr.
> +*/
> +CONST COMPATIBILITY_INFO  PmuCompatibleInfo = {
> +  ARRAY_SIZE (PmuCompatibleStr),
> +  PmuCompatibleStr
> +};
> +
>  /** Parse a "cpu" node.
>
>@param [in]  Fdt  Pointer to a Flattened Device Tree (Fdt).
> @@ -639,6 +655,110 @@ GicCv3IntcNodeParser (
>return EFI_SUCCESS;
>  }
>
> +/** Parse a Pmu compatible node, extracting Pmu information.
> +
> +  This function modifies a CM_OBJ_DESCRIPTOR object.
> +  The following CM_ARM_GICC_INFO fields are patched:
> +- PerformanceInterruptGsiv;
> +
> +  @param [in]   Fdt  Pointer to a Flattened Device Tree 
> (Fdt).
> +  @param [in]   GicIntcNode  Offset of a Gic compatible
> + interrupt-controller node.
> +  @param [in, out]  GicCCmObjDescThe CM_ARM_GICC_INFO to patch.
> +
> +  @retval EFI_SUCCESS The function completed successfully.
> +  @retval EFI_ABORTED An error occurred.
> +  @retval EFI_INVALID_PARAMETER   Invalid parameter.
> +**/
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +GicCPmuNodeParser (
> +  IN  CONST VOID   *Fdt,
> +  ININT32  GicIntcNode,
> +  IN  OUT   CM_OBJ_DESCRIPTOR  *GicCCmObjDesc
> +  )
> +{
> +  EFI_STATUSStatus;
> +  INT32 IntCells;
> +  INT32 PmuNode;
> +  UINT32PmuNodeCount;
> +  UINT32PmuIrq;
> +  UINT32Index;
> +  CM_ARM_GICC_INFO  *GicCInfo;
> +  CONST UINT8   *Data;
> +  INT32 DataSize;
> +
> +  if (GicCCmObjDesc == NULL) {
> +ASSERT (0);
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  GicCInfo = (CM_ARM_GICC_INFO *)GicCCmObjDesc->Data;
> +  PmuNode  = 0;
> +
> +  // Count the number of pmu nodes.
> +  Status = FdtCountCompatNodeInBranch (
> + Fdt,
> + 0,
> + &PmuCompatibleInfo,
> + &PmuNodeCount
> + );
> +  if (EFI_ERROR (Status)) {
> +ASSERT (0);

If you use ASSERT_EFI_ERROR() here, you at least get the type of error
as DEBUG output, whereas ASSERT(0) does not give any context
whatsoever.

> +return Status;
> +  }
> +
> +  if (PmuNodeCount == 0) {
> +return EFI_NOT_FOUND;
> +  }
> +
> +  Status = FdtGetNextCompatNodeInBranch (
> + Fdt,
> + 0,
> + &PmuCompatibleInfo,
> + &PmuNode
> + );
> +  if (EFI_ERROR (Status)) {
> +ASSERT (0);

Same here

> +if (Status == EFI_NOT_FOUND) {
> +  // Should have found the node.
> +  Status = EFI_ABORTED;
> +}
> +  }
> +
> +  // Get the number of cells used to encode an interrupt.
> +  Status = FdtGetInterruptCellsInfo (Fdt, GicIntcNode, &IntCells);
> +  if (EFI_ERROR (Status)) {
> +ASSERT (0);

and here

> +return Status;
> +  }
> +
> +  Data = fdt_getprop (Fdt, PmuNode, "interrupts", &DataSize);
> +  if ((Data == NULL) || (DataSize != (IntCells * sizeof (UINT32 {
> +// If error or not 1 interrupt.
> +ASSERT (0);
> +return EFI_ABORTED;
> +  }
> +
> +  PmuIrq = FdtGetInterruptId ((CONST UINT32 *)Data);
> +
> +  // Only supports PPI 23 for now.
> +  // According to BSA 1.0 s3.6 PPI assignments, PMU IRQ ID is 23. A non BSA
> +  // compliant s

Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib

2022-01-29 Thread Abner Chang



> -Original Message-
> From: Gerd Hoffmann 
> Sent: Thursday, January 27, 2022 9:20 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> 
> Cc: Schaefer, Daniel (ROM Janitor) ; Sunil V L
> ; Ard Biesheuvel ;
> Jiewen Yao ; Jordan Justen
> ; Leif Lindholm ; Sami
> Mujawar 
> Subject: Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg
> BaseCachingPciExpressLib
> 
> On Mon, Jan 24, 2022 at 09:52:07PM +0800, Abner Chang wrote:
> > Clone BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
> > RISC-V Virt platform can leverage the same library to access PCI Express
> > registers through PCI Express base address set in
> PcdPciExpressBaseAddress
> > and cached in a global variable. Also remove the one under ArmVirtPkg.
> >
> > Signed-off-by: Abner Chang 
> > Cc: Daniel Schaefer 
> > Cc: Sunil V L 
> > Cc: Ard Biesheuvel 
> > Cc: Jiewen Yao 
> > Cc: Jordan Justen 
> > Cc: Gerd Hoffmann 
> > Cc: Leif Lindholm 
> > Cc: Sami Mujawar 
> 
> Given you are mostly moving code around as git noticed ...
> 
> >  rename {ArmVirtPkg =>
> OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> (87%)
> >  rename {ArmVirtPkg =>
> OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
> 
> ... it doesn't make sense to split that into two patches.
Hi Gerd,
I missed this message.
Because the movement impacts two packages thus I split this change into two 
patches. I just realized that you are the reviewer of these two packages, I 
will send the v2 that keeps the git history.

Thanks
Abner

> 
> Just using "git mv" instead has the additional advantage to keep the git
> history intact (using 'git log --follow').
> 
> take care,
>   Gerd



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Re: [edk2-devel] [PATCH v3 3/8] DynamicTablesPkg: AcpiSsdtPcieLibArm: Fix _PRT description

2022-01-29 Thread Ard Biesheuvel
(+ Marc)

On Fri, 28 Jan 2022 at 16:41,  wrote:
>
> From: Pierre Gondois 
>
> In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts
> can be defined following 2 models.
> In the first model, a _SRS object must be described to modify the PCI
> interrupt. The _CRS and _PRS object allows to describe the PCI
> interrupt (level/edge triggered, active high/low).
> In the second model, the PCI interrupt cannot be described with a
> similar granularity. PCI interrupts are by default level triggered,
> active low.
>
> GicV2 SPI interrupts are level or edge triggered, active high. To
> correctly describe PCI interrupts, the first model is used, even though
> Arm Base Boot Requirements v1.0 requires to use the second mode.
>

There are two different issues here:

- using separate 'interrupt link' device objects with an Interrupt()
resource rather than a simple GSIV number
- whether _PRS and _SRS need to be implemented on those link objects.

The latter is simply not true - _PRS and _SRS are optional, and
pointless if there is only a single possible value, so there is really
no need to add them here.

As for the choice between the link object or the GSIV number: I don't
think INTx interrupts on ARM systems are actually level low, and the
GSIV option is widely used, also in platforms that exist in
edk2-platforms, without any reported issues.

I've cc'ed Marc, perhaps he can shed some light on this, but I'd
prefer to stick to the GSIV approach if we can, as it is much simpler.



> Signed-off-by: Pierre Gondois 
> ---
>
> Notes:
> v3:
>  - New patch. [Pierre]
>
>  .../AcpiSsdtPcieLibArm/SsdtPcieGenerator.c| 47 +--
>  1 file changed, 44 insertions(+), 3 deletions(-)
>
> diff --git 
> a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c 
> b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
> index 3e22587d4a25..6823a98795c8 100644
> --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
> +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
> @@ -1,7 +1,7 @@
>  /** @file
>SSDT Pcie Table Generator.
>
> -  Copyright (c) 2021, Arm Limited. All rights reserved.
> +  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
>
>SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -295,6 +295,10 @@ GeneratePciDeviceInfo (
>  Method (_CRS, 0) {
>Return CRS0
>})
> +Method (_PRS, 0) {
> +  Return CRS0
> +  })
> +Method (_SRS, 1) { }
>  Method (_DIS) { }
>}
>
> @@ -302,9 +306,12 @@ GeneratePciDeviceInfo (
>PCI Firmware Specification - Revision 3.3,
>s3.5. "Device State at Firmware/Operating System Handoff"
>
> -  The _PRS and _SRS are not supported, cf Arm Base Boot Requirements v1.0:
> +  Warning: The Arm Base Boot Requirements v1.0 states the following:
>"The _PRS (Possible Resource Settings) and _SRS (Set Resource Settings)
>are not supported."
> +  However, the first model to describe PCI legacy interrupts is used (cf. 
> ACPI
> +  6.4 s6.2.13) as PCI defaults (Level Triggered, Active Low) are not 
> compatible
> +  with GICv2 (must be Active High).
>
>@param [in]   Irq Interrupt controller interrupt.
>@param [in]   IrqFlagsInterrupt flags.
> @@ -416,7 +423,41 @@ GenerateLinkDevice (
>  return Status;
>}
>
> -  // ASL:Method (_DIS, 1) {}
> +  // ASL:
> +  // Method (_PRS, 0) {
> +  //   Return (CRS0)
> +  // }
> +  Status = AmlCodeGenMethodRetNameString (
> + "_PRS",
> + "CRS0",
> + 0,
> + FALSE,
> + 0,
> + LinkNode,
> + NULL
> + );
> +  if (EFI_ERROR (Status)) {
> +ASSERT (0);
> +return Status;
> +  }
> +
> +  // ASL:Method (_SRS, 1) {}
> +  // Not possible to disable interrupts.
> +  Status = AmlCodeGenMethodRetNameString (
> + "_SRS",
> + NULL,
> + 1,
> + FALSE,
> + 0,
> + LinkNode,
> + NULL
> + );
> +  if (EFI_ERROR (Status)) {
> +ASSERT (0);
> +return Status;
> +  }
> +
> +  // ASL:Method (_DIS, 0) {}
>// Not possible to disable interrupts.
>Status = AmlCodeGenMethodRetNameString (
>   "_DIS",
> --
> 2.25.1
>


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Re: [edk2-devel] [PATCH 0/2] change qemu default resolution to 1280x800

2022-01-29 Thread Ard Biesheuvel
On Fri, 21 Jan 2022 at 14:01, Gerd Hoffmann  wrote:
>
>
>
> Gerd Hoffmann (2):
>   OvmfPkg: change qemu default resolution to 1280x800
>   ArmVirtPkg: change qemu default resolution to 1280x800
>

Acked-by: Ard Biesheuvel 

Merged as #2454

Thanks,

>  ArmVirtPkg/ArmVirtQemu.dsc   | 4 ++--
>  ArmVirtPkg/ArmVirtQemuKernel.dsc | 4 ++--
>  OvmfPkg/AmdSev/AmdSevX64.dsc | 4 ++--
>  OvmfPkg/Microvm/MicrovmX64.dsc   | 4 ++--
>  OvmfPkg/OvmfPkgIa32.dsc  | 4 ++--
>  OvmfPkg/OvmfPkgIa32X64.dsc   | 4 ++--
>  OvmfPkg/OvmfPkgX64.dsc   | 4 ++--
>  OvmfPkg/OvmfXen.dsc  | 4 ++--
>  8 files changed, 16 insertions(+), 16 deletions(-)
>
> --
> 2.34.1
>


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Re: [edk2-devel] [PATCH 02/11] ArmVirtPkg: Remove All UGA Support

2022-01-29 Thread Ard Biesheuvel
On Fri, 14 Jan 2022 at 01:51, Guomin Jiang  wrote:
>
> From: GuoMinJ 
>
> REF: https//bugzilla.tianocore.org/show_bug.cgi?id=2368
>
> Remove PcdConOutGopSupport, it is unnecessary any more.
> Remove All UGA Support in ArmVirtPkg
>
> Signed-off-by: Guomin Jiang 
> Cc: Ard Biesheuvel 
> Cc: Leif Lindholm 
> Cc: Sami Mujawar 
> Cc: Gerd Hoffmann 

As I was not cc'ed on the cover letter,

Acked-by: Ard Biesheuvel 

for the three patches I was cc'ed on.


> ---
>  ArmVirtPkg/ArmVirtQemu.dsc   | 5 -
>  ArmVirtPkg/ArmVirtQemuKernel.dsc | 5 -
>  2 files changed, 10 deletions(-)
>
> diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
> index 84c28b0c1df4..d18ad9c26672 100644
> --- a/ArmVirtPkg/ArmVirtQemu.dsc
> +++ b/ArmVirtPkg/ArmVirtQemu.dsc
> @@ -124,11 +124,6 @@ [PcdsFeatureFlag.common]
>gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE
>gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE
>
> -  ## If TRUE, Graphics Output Protocol will be installed on virtual handle 
> created by ConsplitterDxe.
> -  #  It could be set FALSE to save size.
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
> -
>gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
>
>gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|$(TPM2_ENABLE)
> diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc 
> b/ArmVirtPkg/ArmVirtQemuKernel.dsc
> index 8e82c5050f6b..c8af8cefc2c5 100644
> --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
> +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
> @@ -107,11 +107,6 @@ [PcdsFeatureFlag.common]
>gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE
>gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|TRUE
>
> -  ## If TRUE, Graphics Output Protocol will be installed on virtual handle 
> created by ConsplitterDxe.
> -  #  It could be set FALSE to save size.
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
> -
>gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
>
>  [PcdsFixedAtBuild.common]
> --
> 2.30.0.windows.2
>


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[edk2-devel] [PATCH v2 1/2] OvmfPkg/BaseCachingPciExpressLib: Migrate BaseCachingPciExpressLib

2022-01-29 Thread Abner Chang
Move BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
RISC-V Virt platform can leverage the same library to access PCI Express
registers through PCI Express base address set in PcdPciExpressBaseAddress
and cached in a global variable.

Signed-off-by: Abner Chang 
Cc: Daniel Schaefer 
Cc: Sunil V L 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
---
 ArmVirtPkg/ArmVirt.dsc.inc  | 2 +-
 ArmVirtPkg/ArmVirtKvmTool.dsc   | 6 +++---
 .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf   | 0
 .../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
 4 files changed, 4 insertions(+), 4 deletions(-)
 rename {ArmVirtPkg => 
OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (100%)
 rename {ArmVirtPkg => 
OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)

diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index 5a1598d90c..4db8ad5a79 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -141,7 +141,7 @@
 
   # PCI Libraries
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
-  
PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+  
PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
   PciCapLib|OvmfPkg/Library/BasePciCapLib/BasePciCapLib.inf
   
PciCapPciSegmentLib|OvmfPkg/Library/BasePciCapPciSegmentLib/BasePciCapPciSegmentLib.inf
   PciCapPciIoLib|OvmfPkg/Library/UefiPciCapPciIoLib/UefiPciCapPciIoLib.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 9d23072d8f..4a54d13735 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -339,17 +339,17 @@
   ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
-  
NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+  
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
   }
   MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
-  
NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+  
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
   }
   MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf {
 
   NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
-  
NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+  
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
   }
   OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
   OvmfPkg/Virtio10Dxe/Virtio10.inf
diff --git 
a/ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf 
b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
similarity index 100%
rename from 
ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
rename to OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
diff --git a/ArmVirtPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c 
b/OvmfPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
similarity index 100%
rename from ArmVirtPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
rename to OvmfPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
-- 
2.31.1



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[edk2-devel] [PATCH v2 0/2] Migrate BaseCachingPciExpressLib

2022-01-29 Thread Abner Chang
Move BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
RISC-V Virt platform can leverage the same library to access PCI Express
registers through PCI Express base address set in PcdPciExpressBaseAddress
and cached in a global variable.

In V2: One patch for movement and ArmVirtPkg DSC file changes.
   The patch [2/2] updates BaseCachingPciExpressLib.inf. Remove the
   dependency with ArmVirtPkg.

Signed-off-by: Abner Chang 
Cc: Daniel Schaefer 
Cc: Sunil V L 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 

Abner Chang (2):
  OvmfPkg/BaseCachingPciExpressLib: Migrate BaseCachingPciExpressLib
  OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf

 ArmVirtPkg/ArmVirt.dsc.inc  | 2 +-
 ArmVirtPkg/ArmVirtKvmTool.dsc   | 6 +++---
 .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf   | 4 ++--
 .../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
 4 files changed, 6 insertions(+), 6 deletions(-)
 rename {ArmVirtPkg => 
OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (89%)
 rename {ArmVirtPkg => 
OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)

-- 
2.31.1



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[edk2-devel] [PATCH v2 2/2] OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf

2022-01-29 Thread Abner Chang
Remove the dependency with ArmVirtPkg and add RISCV64 in VALID_ARCHITECTURES.

Signed-off-by: Abner Chang 
Cc: Daniel Schaefer 
Cc: Sunil V L 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
---
 .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git 
a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf 
b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
index 33568f568f..0383a37cbf 100644
--- a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+++ b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
@@ -21,15 +21,15 @@
   CONSTRUCTOR= PciExpressLibInitialize
 
 #
-#  VALID_ARCHITECTURES   = ARM AARCH64
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64
 #
 
 [Sources]
   PciExpressLib.c
 
 [Packages]
-  ArmVirtPkg/ArmVirtPkg.dec
   MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
 
 [LibraryClasses]
   BaseLib
-- 
2.31.1



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Re: [edk2-devel] [PATCH v2 0/5] OvmfPkg/QemuVideoDxe: pick up display resolution settings from the host

2022-01-29 Thread Ard Biesheuvel
On Mon, 17 Jan 2022 at 10:58, Gerd Hoffmann  wrote:
>
> See last patch in the series for details.
>
> v2:
>  - rebase to latest master
>  - more verbose commit message explaining the
>motivation for the new PCD (see patch #1).
>
> Gerd Hoffmann (5):
>   OvmfPkg: add PcdVideoResolutionSource
>   OvmfPkg/QemuVideoDxe: simplify InitializeBochsGraphicsMode
>   OvmfPkg/QemuVideoDxe: drop QEMU_VIDEO_BOCHS_MODES->ColorDepth
>   OvmfPkg/QemuVideoDxe: factor out QemuVideoBochsAddMode
>   OvmfPkg/QemuVideoDxe: parse edid blob, detect display resolution
>

Acked-by: Ard Biesheuvel 

Pushed as #2455

Thanks,

>  OvmfPkg/OvmfPkg.dec   |   7 +
>  OvmfPkg/AmdSev/AmdSevX64.dsc  |   1 +
>  OvmfPkg/Microvm/MicrovmX64.dsc|   1 +
>  OvmfPkg/OvmfPkgIa32.dsc   |   1 +
>  OvmfPkg/OvmfPkgIa32X64.dsc|   1 +
>  OvmfPkg/OvmfPkgX64.dsc|   1 +
>  OvmfPkg/OvmfXen.dsc   |   1 +
>  OvmfPkg/PlatformDxe/Platform.inf  |   1 +
>  OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf |   3 +
>  OvmfPkg/QemuVideoDxe/Qemu.h   |   6 +-
>  OvmfPkg/PlatformDxe/Platform.c|   3 +
>  OvmfPkg/QemuVideoDxe/Driver.c |  14 +-
>  OvmfPkg/QemuVideoDxe/Gop.c|   2 +-
>  OvmfPkg/QemuVideoDxe/Initialize.c | 251 +++---
>  14 files changed, 213 insertions(+), 80 deletions(-)
>
> --
> 2.34.1
>


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Re: [edk2-devel] [PATCH v2 2/2] OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf

2022-01-29 Thread Ard Biesheuvel
On Sat, 29 Jan 2022 at 18:05, Abner Chang  wrote:
>
> Remove the dependency with ArmVirtPkg and add RISCV64 in VALID_ARCHITECTURES.
>
> Signed-off-by: Abner Chang 
> Cc: Daniel Schaefer 
> Cc: Sunil V L 
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Cc: Jordan Justen 
> Cc: Gerd Hoffmann 
> Cc: Leif Lindholm 
> Cc: Sami Mujawar 
> ---
>  .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git 
> a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf 
> b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> index 33568f568f..0383a37cbf 100644
> --- a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> +++ b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> @@ -21,15 +21,15 @@
>CONSTRUCTOR= PciExpressLibInitialize
>
>  #
> -#  VALID_ARCHITECTURES   = ARM AARCH64
> +#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64
>  #
>

I am going to fold the above hunk into patch #1, given that

>  [Sources]
>PciExpressLib.c
>
>  [Packages]
> -  ArmVirtPkg/ArmVirtPkg.dec
>MdePkg/MdePkg.dec
> +  OvmfPkg/OvmfPkg.dec
>

this change is unnecessary - either package reference is unnecessary
so I will just drop the reference to ArmVirtPkg/ArmVirtPkg.dec when
moving it.

>  [LibraryClasses]
>BaseLib
> --
> 2.31.1
>
>
>
> 
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>


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Re: [edk2-devel] [PATCH v2 1/2] OvmfPkg/BaseCachingPciExpressLib: Migrate BaseCachingPciExpressLib

2022-01-29 Thread Ard Biesheuvel
On Sat, 29 Jan 2022 at 18:05, Abner Chang  wrote:
>
> Move BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
> RISC-V Virt platform can leverage the same library to access PCI Express
> registers through PCI Express base address set in PcdPciExpressBaseAddress
> and cached in a global variable.
>
> Signed-off-by: Abner Chang 
> Cc: Daniel Schaefer 
> Cc: Sunil V L 
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Cc: Jordan Justen 
> Cc: Gerd Hoffmann 
> ---
>  ArmVirtPkg/ArmVirt.dsc.inc  | 2 +-
>  ArmVirtPkg/ArmVirtKvmTool.dsc   | 6 +++---
>  .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf   | 0
>  .../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
>  4 files changed, 4 insertions(+), 4 deletions(-)
>  rename {ArmVirtPkg => 
> OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (100%)
>  rename {ArmVirtPkg => 
> OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)

Acked-by: Ard Biesheuvel 

Pushed as #2456

with the INF [Packages] reference to ArmVirtPkg.dec dropped, and
RISCV64 added to the INF VALID_ARCHITECTURES declaration.


>
> diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
> index 5a1598d90c..4db8ad5a79 100644
> --- a/ArmVirtPkg/ArmVirt.dsc.inc
> +++ b/ArmVirtPkg/ArmVirt.dsc.inc
> @@ -141,7 +141,7 @@
>
># PCI Libraries
>PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
> -  
> PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> +  
> PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
>PciCapLib|OvmfPkg/Library/BasePciCapLib/BasePciCapLib.inf
>
> PciCapPciSegmentLib|OvmfPkg/Library/BasePciCapPciSegmentLib/BasePciCapPciSegmentLib.inf
>PciCapPciIoLib|OvmfPkg/Library/UefiPciCapPciIoLib/UefiPciCapPciIoLib.inf
> diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
> index 9d23072d8f..4a54d13735 100644
> --- a/ArmVirtPkg/ArmVirtKvmTool.dsc
> +++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
> @@ -339,17 +339,17 @@
>ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
>  
>NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
> -  
> NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> +  
> NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
>}
>MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
>  
>NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
> -  
> NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> +  
> NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
>}
>MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf {
>  
>NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
> -  
> NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> +  
> NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
>}
>OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
>OvmfPkg/Virtio10Dxe/Virtio10.inf
> diff --git 
> a/ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf 
> b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> similarity index 100%
> rename from 
> ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> rename to 
> OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> diff --git a/ArmVirtPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c 
> b/OvmfPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
> similarity index 100%
> rename from ArmVirtPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
> rename to OvmfPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
> --
> 2.31.1
>
>
>
> 
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[edk2-devel] [PATCH 0/2] CryptoPkg: Add BigNum support

2022-01-29 Thread yi1 li
This patch series is used to add CryptBn library, which is wrapped
over OpenSSL. The implementation provides CryptBn library functions
for EFI BaseCrypt protocol and EFI BaseCrypt Configuration Protocol.

yi1 li (2):
  CryptoPkg: Add BigNum support
  CryptoPkg: Add BigNum NullLib

 CryptoPkg/CryptoPkg.dsc   |   1 +
 CryptoPkg/Driver/Crypto.c | 522 ++-
 CryptoPkg/Include/Library/BaseCryptLib.h  | 423 +
 .../Pcd/PcdCryptoServiceFamilyEnable.h|  30 +
 .../Library/BaseCryptLib/BaseCryptLib.inf |   1 +
 CryptoPkg/Library/BaseCryptLib/Bn/CryptBn.c   | 594 ++
 .../Library/BaseCryptLib/Bn/CryptBnNull.c | 525 
 .../Library/BaseCryptLib/PeiCryptLib.inf  |   1 +
 .../Library/BaseCryptLib/SmmCryptLib.inf  |   2 +-
 .../BaseCryptLibNull/BaseCryptLibNull.inf |   1 +
 .../Library/BaseCryptLibNull/Bn/CryptBnNull.c | 525 
 .../BaseCryptLibOnProtocolPpi/CryptLib.c  | 497 +++
 CryptoPkg/Private/Protocol/Crypto.h   | 434 +
 13 files changed, 3554 insertions(+), 2 deletions(-)
 create mode 100644 CryptoPkg/Library/BaseCryptLib/Bn/CryptBn.c
 create mode 100644 CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
 create mode 100644 CryptoPkg/Library/BaseCryptLibNull/Bn/CryptBnNull.c

-- 
2.33.0.windows.2



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[edk2-devel] [PATCH 1/2] CryptoPkg: Add BigNum support

2022-01-29 Thread yi1 li
This patch is used to add CryptBn library, which is wrapped
over OpenSSL. The implementation provides CryptBn library functions
for EFI BaseCrypt protocol and EFI BaseCrypt Configuration Protocol.

Signed-off-by: yi1 li 

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 
---
 CryptoPkg/CryptoPkg.dsc   |   1 +
 CryptoPkg/Driver/Crypto.c | 522 ++-
 CryptoPkg/Include/Library/BaseCryptLib.h  | 423 +
 .../Pcd/PcdCryptoServiceFamilyEnable.h|  30 +
 .../Library/BaseCryptLib/BaseCryptLib.inf |   1 +
 CryptoPkg/Library/BaseCryptLib/Bn/CryptBn.c   | 594 ++
 .../Library/BaseCryptLib/PeiCryptLib.inf  |   1 +
 .../Library/BaseCryptLib/SmmCryptLib.inf  |   2 +-
 .../BaseCryptLibOnProtocolPpi/CryptLib.c  | 497 +++
 CryptoPkg/Private/Protocol/Crypto.h   | 434 +
 10 files changed, 2503 insertions(+), 2 deletions(-)
 create mode 100644 CryptoPkg/Library/BaseCryptLib/Bn/CryptBn.c

diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
index 0aa72ed87846..4b14db884078 100644
--- a/CryptoPkg/CryptoPkg.dsc
+++ b/CryptoPkg/CryptoPkg.dsc
@@ -165,6 +165,7 @@
   gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Tls.Family  
 | PCD_CRYPTO_SERVICE_ENABLE_FAMILY
   gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.TlsSet.Family   
 | PCD_CRYPTO_SERVICE_ENABLE_FAMILY
   gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.TlsGet.Family   
 | PCD_CRYPTO_SERVICE_ENABLE_FAMILY
+  gEfiCryptoPkgTokenSpaceGuid.PcdCryptoServiceFamilyEnable.Bn.Family   
 | PCD_CRYPTO_SERVICE_ENABLE_FAMILY
 !endif
 
 !if $(CRYPTO_SERVICES) == MIN_PEI
diff --git a/CryptoPkg/Driver/Crypto.c b/CryptoPkg/Driver/Crypto.c
index d5d6aa8e5820..a5b3a2f46fbb 100644
--- a/CryptoPkg/Driver/Crypto.c
+++ b/CryptoPkg/Driver/Crypto.c
@@ -4470,6 +4470,499 @@ CryptoServiceTlsGetCertRevocationList (
   return CALL_BASECRYPTLIB (TlsGet.Services.CertRevocationList, 
TlsGetCertRevocationList, (Data, DataSize), EFI_UNSUPPORTED);
 }
 
+/**
+  Allocate new Big Number.
+
+  @retval New BigNum opaque structure or NULL on failure.
+**/
+VOID *
+EFIAPI
+CryptoServiceBigNumInit (
+  VOID
+  )
+{
+  return CALL_BASECRYPTLIB (Bn.Services.Init, BigNumInit, (), NULL);
+}
+
+/**
+  Allocate new Big Number and assign the provided value to it.
+
+  @param[in]   BufBig endian encoded buffer.
+  @param[in]   LenBuffer length.
+
+  @retval New BigNum opaque structure or NULL on failure.
+**/
+VOID *
+EFIAPI
+CryptoServiceBigNumFromBin (
+  IN CONST UINT8  *Buf,
+  IN UINTNLen
+  )
+{
+  return CALL_BASECRYPTLIB (Bn.Services.FromBin, BigNumFromBin, (Buf, Len), 
NULL);
+}
+
+/**
+  Convert the absolute value of Bn into big-endian form and store it at Buf.
+  The Buf array should have at least BigNumBytes() in it.
+
+  @param[in]   Bn Big number to convert.
+  @param[out]  BufOutput buffer.
+
+  @retval The length of the big-endian number placed at Buf or -1 on error.
+**/
+INTN
+EFIAPI
+CryptoServiceBigNumToBin (
+  IN VOID*Bn,
+  OUT UINT8  *Buf
+  )
+{
+  return CALL_BASECRYPTLIB (Bn.Services.ToBin, BigNumToBin, (Bn, Buf), -1);
+}
+
+/**
+  Free the Big Number.
+
+  @param[in]   Bn  Big number to free.
+  @param[in]   Clear   TRUE if the buffer should be cleared.
+**/
+VOID
+EFIAPI
+CryptoServiceBigNumFree (
+  IN VOID *Bn,
+  IN BOOLEAN  Clear
+  )
+{
+  CALL_VOID_BASECRYPTLIB (Bn.Services.Free, BigNumFree, (Bn, Clear));
+}
+
+/**
+  Calculate the sum of two Big Numbers.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling to BigNumInit() or BigNumFromBin() functions.
+
+  @param[in]   BnA Big number.
+  @param[in]   BnB Big number.
+  @param[out]  BnRes   The result of BnA + BnB.
+
+  @retval EFI_SUCCESS  On success.
+  @retval EFI_PROTOCOL_ERROR   Otherwise.
+**/
+EFI_STATUS
+EFIAPI
+CryptoServiceBigNumAdd (
+  IN CONST VOID  *BnA,
+  IN CONST VOID  *BnB,
+  OUT VOID   *BnRes
+  )
+{
+  return CALL_BASECRYPTLIB (Bn.Services.Add, BigNumAdd, (BnA, BnB, BnRes), 
EFI_UNSUPPORTED);
+}
+
+/**
+  Subtract two Big Numbers.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling to BigNumInit() or BigNumFromBin() functions.
+
+  @param[in]   BnA Big number.
+  @param[in]   BnB Big number.
+  @param[out]  BnRes   The result of BnA - BnB.
+
+  @retval EFI_SUCCESS  On success.
+  @retval EFI_PROTOCOL_ERROR   Otherwise.
+**/
+EFI_STATUS
+EFIAPI
+CryptoServiceBigNumSub (
+  IN CONST VOID  *BnA,
+  IN CONST VOID  *BnB,
+  OUT VOID   *BnRes
+  )
+{
+  return CALL_BASECRYPTLIB (Bn.Services.Sub, BigNumSub, (BnA, BnB, BnRes), 
EFI_UNSUPPORTED);
+}
+
+/**
+  Calculate remainder: BnRes = BnA % BnB.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling 

[edk2-devel] [PATCH 2/2] CryptoPkg: Add BigNum NullLib

2022-01-29 Thread yi1 li
This patch is used to add CryptBnNull library, which is used to
optimize code size.

Signed-off-by: yi1 li 

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 
---
 .../Library/BaseCryptLib/Bn/CryptBnNull.c | 525 ++
 .../Library/BaseCryptLib/PeiCryptLib.inf  |   2 +-
 .../Library/BaseCryptLib/SmmCryptLib.inf  |   2 +-
 .../BaseCryptLibNull/BaseCryptLibNull.inf |   1 +
 .../Library/BaseCryptLibNull/Bn/CryptBnNull.c | 525 ++
 5 files changed, 1053 insertions(+), 2 deletions(-)
 create mode 100644 CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
 create mode 100644 CryptoPkg/Library/BaseCryptLibNull/Bn/CryptBnNull.c

diff --git a/CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c 
b/CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
new file mode 100644
index ..9f220ba41058
--- /dev/null
+++ b/CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
@@ -0,0 +1,525 @@
+/** @file
+  Big number API implementation based on OpenSSL
+
+  Copyright (c) 2022, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+/**
+  Allocate new Big Number.
+
+  @retval New BigNum opaque structure or NULL on failure.
+**/
+VOID *
+EFIAPI
+BigNumInit (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return NULL;
+}
+
+/**
+  Allocate new Big Number and assign the provided value to it.
+
+  @param[in]   BufBig endian encoded buffer.
+  @param[in]   LenBuffer length.
+
+  @retval New BigNum opaque structure or NULL on failure.
+**/
+VOID *
+EFIAPI
+BigNumFromBin (
+  IN CONST UINT8  *Buf,
+  IN UINTNLen
+  )
+{
+  ASSERT (FALSE);
+  return NULL;
+}
+
+/**
+  Convert the absolute value of Bn into big-endian form and store it at Buf.
+  The Buf array should have at least BigNumBytes() in it.
+
+  @param[in]   Bn Big number to convert.
+  @param[out]  BufOutput buffer.
+
+  @retval The length of the big-endian number placed at Buf or -1 on error.
+**/
+INTN
+EFIAPI
+BigNumToBin (
+  IN VOID*Bn,
+  OUT UINT8  *Buf
+  )
+{
+  ASSERT (FALSE);
+  return -1;
+}
+
+/**
+  Free the Big Number.
+
+  @param[in]   Bn  Big number to free.
+  @param[in]   Clear   TRUE if the buffer should be cleared.
+**/
+VOID
+EFIAPI
+BigNumFree (
+  IN VOID *Bn,
+  IN BOOLEAN  Clear
+  )
+{
+  ASSERT (FALSE);
+}
+
+/**
+  Calculate the sum of two Big Numbers.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling to BigNumInit() or BigNumFromBin() functions.
+
+  @param[in]   BnA Big number.
+  @param[in]   BnB Big number.
+  @param[out]  BnRes   The result of BnA + BnB.
+
+  @retval EFI_SUCCESS  On success.
+  @retval EFI_PROTOCOL_ERROR   Otherwise.
+**/
+EFI_STATUS
+EFIAPI
+BigNumAdd (
+  IN CONST VOID  *BnA,
+  IN CONST VOID  *BnB,
+  OUT VOID   *BnRes
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Subtract two Big Numbers.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling to BigNumInit() or BigNumFromBin() functions.
+
+  @param[in]   BnA Big number.
+  @param[in]   BnB Big number.
+  @param[out]  BnRes   The result of BnA - BnB.
+
+  @retval EFI_SUCCESS  On success.
+  @retval EFI_PROTOCOL_ERROR   Otherwise.
+**/
+EFI_STATUS
+EFIAPI
+BigNumSub (
+  IN CONST VOID  *BnA,
+  IN CONST VOID  *BnB,
+  OUT VOID   *BnRes
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Calculate remainder: BnRes = BnA % BnB.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling to BigNumInit() or BigNumFromBin() functions.
+
+  @param[in]   BnA Big number.
+  @param[in]   BnB Big number.
+  @param[out]  BnRes   The result of BnA % BnB.
+
+  @retval EFI_SUCCESS  On success.
+  @retval EFI_OUT_OF_RESOURCES In case of internal allocation failures.
+  @retval EFI_PROTOCOL_ERROR   Otherwise.
+**/
+EFI_STATUS
+EFIAPI
+BigNumMod (
+  IN CONST VOID  *BnA,
+  IN CONST VOID  *BnB,
+  OUT VOID   *BnRes
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Compute BnA to the BnP-th power modulo BnM.
+  Please note, all "out" Big number arguments should be properly initialized.
+  by calling to BigNumInit() or BigNumFromBin() functions.
+
+  @param[in]   BnA Big number.
+  @param[in]   BnP Big number (power).
+  @param[in]   BnM Big number (modulo).
+  @param[out]  BnRes   The result of (BnA ^ BnP) % BnM.
+
+  @retval EFI_SUCCESS  On success.
+  @retval EFI_OUT_OF_RESOURCES In case of internal allocation failures.
+  @retval EFI_PROTOCOL_ERROR   Otherwise.
+**/
+EFI_STATUS
+EFIAPI
+BigNumExpMod (
+  IN VOID   *BnA,
+  IN VOID   *BnP,
+  IN VOID   *BnM,
+  OUT VOID  *BnRes
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Compute BnA inverse modulo BnM.
+  Please note, all "out" Big number arguments should be properly initialized
+  by calling to BigNumInit() or BigNumFromBin() functio

Re: [edk2-devel] [PATCH 2/2] CryptoPkg: Add BigNum NullLib

2022-01-29 Thread Yao, Jiewen
thank you
since you are talking about size optimization, would you please share the 
result?

thank you!
Yao, Jiewen


> 在 2022年1月30日,上午6:10,Li, Yi1  写道:
> 
> This patch is used to add CryptBnNull library, which is used to
> optimize code size.
> 
> Signed-off-by: yi1 li 
> 
> Cc: Jiewen Yao 
> Cc: Jian J Wang 
> Cc: Xiaoyu Lu 
> Cc: Guomin Jiang 
> ---
> .../Library/BaseCryptLib/Bn/CryptBnNull.c | 525 ++
> .../Library/BaseCryptLib/PeiCryptLib.inf  |   2 +-
> .../Library/BaseCryptLib/SmmCryptLib.inf  |   2 +-
> .../BaseCryptLibNull/BaseCryptLibNull.inf |   1 +
> .../Library/BaseCryptLibNull/Bn/CryptBnNull.c | 525 ++
> 5 files changed, 1053 insertions(+), 2 deletions(-)
> create mode 100644 CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
> create mode 100644 CryptoPkg/Library/BaseCryptLibNull/Bn/CryptBnNull.c
> 
> diff --git a/CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c 
> b/CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
> new file mode 100644
> index ..9f220ba41058
> --- /dev/null
> +++ b/CryptoPkg/Library/BaseCryptLib/Bn/CryptBnNull.c
> @@ -0,0 +1,525 @@
> +/** @file
> +  Big number API implementation based on OpenSSL
> +
> +  Copyright (c) 2022, Intel Corporation. All rights reserved.
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +
> +/**
> +  Allocate new Big Number.
> +
> +  @retval New BigNum opaque structure or NULL on failure.
> +**/
> +VOID *
> +EFIAPI
> +BigNumInit (
> +  VOID
> +  )
> +{
> +  ASSERT (FALSE);
> +  return NULL;
> +}
> +
> +/**
> +  Allocate new Big Number and assign the provided value to it.
> +
> +  @param[in]   BufBig endian encoded buffer.
> +  @param[in]   LenBuffer length.
> +
> +  @retval New BigNum opaque structure or NULL on failure.
> +**/
> +VOID *
> +EFIAPI
> +BigNumFromBin (
> +  IN CONST UINT8  *Buf,
> +  IN UINTNLen
> +  )
> +{
> +  ASSERT (FALSE);
> +  return NULL;
> +}
> +
> +/**
> +  Convert the absolute value of Bn into big-endian form and store it at Buf.
> +  The Buf array should have at least BigNumBytes() in it.
> +
> +  @param[in]   Bn Big number to convert.
> +  @param[out]  BufOutput buffer.
> +
> +  @retval The length of the big-endian number placed at Buf or -1 on error.
> +**/
> +INTN
> +EFIAPI
> +BigNumToBin (
> +  IN VOID*Bn,
> +  OUT UINT8  *Buf
> +  )
> +{
> +  ASSERT (FALSE);
> +  return -1;
> +}
> +
> +/**
> +  Free the Big Number.
> +
> +  @param[in]   Bn  Big number to free.
> +  @param[in]   Clear   TRUE if the buffer should be cleared.
> +**/
> +VOID
> +EFIAPI
> +BigNumFree (
> +  IN VOID *Bn,
> +  IN BOOLEAN  Clear
> +  )
> +{
> +  ASSERT (FALSE);
> +}
> +
> +/**
> +  Calculate the sum of two Big Numbers.
> +  Please note, all "out" Big number arguments should be properly initialized
> +  by calling to BigNumInit() or BigNumFromBin() functions.
> +
> +  @param[in]   BnA Big number.
> +  @param[in]   BnB Big number.
> +  @param[out]  BnRes   The result of BnA + BnB.
> +
> +  @retval EFI_SUCCESS  On success.
> +  @retval EFI_PROTOCOL_ERROR   Otherwise.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BigNumAdd (
> +  IN CONST VOID  *BnA,
> +  IN CONST VOID  *BnB,
> +  OUT VOID   *BnRes
> +  )
> +{
> +  ASSERT (FALSE);
> +  return EFI_UNSUPPORTED;
> +}
> +
> +/**
> +  Subtract two Big Numbers.
> +  Please note, all "out" Big number arguments should be properly initialized
> +  by calling to BigNumInit() or BigNumFromBin() functions.
> +
> +  @param[in]   BnA Big number.
> +  @param[in]   BnB Big number.
> +  @param[out]  BnRes   The result of BnA - BnB.
> +
> +  @retval EFI_SUCCESS  On success.
> +  @retval EFI_PROTOCOL_ERROR   Otherwise.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BigNumSub (
> +  IN CONST VOID  *BnA,
> +  IN CONST VOID  *BnB,
> +  OUT VOID   *BnRes
> +  )
> +{
> +  ASSERT (FALSE);
> +  return EFI_UNSUPPORTED;
> +}
> +
> +/**
> +  Calculate remainder: BnRes = BnA % BnB.
> +  Please note, all "out" Big number arguments should be properly initialized
> +  by calling to BigNumInit() or BigNumFromBin() functions.
> +
> +  @param[in]   BnA Big number.
> +  @param[in]   BnB Big number.
> +  @param[out]  BnRes   The result of BnA % BnB.
> +
> +  @retval EFI_SUCCESS  On success.
> +  @retval EFI_OUT_OF_RESOURCES In case of internal allocation failures.
> +  @retval EFI_PROTOCOL_ERROR   Otherwise.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BigNumMod (
> +  IN CONST VOID  *BnA,
> +  IN CONST VOID  *BnB,
> +  OUT VOID   *BnRes
> +  )
> +{
> +  ASSERT (FALSE);
> +  return EFI_UNSUPPORTED;
> +}
> +
> +/**
> +  Compute BnA to the BnP-th power modulo BnM.
> +  Please note, all "out" Big number arguments should be properly initialized.
> +  by calling to BigNumInit() or BigNumFromBin() functions.
> +
> +  @param[in]   BnA Big number.
> +  @param[in]   BnP Big number (power).
> +  @param[in]   BnM Big number (modulo).
> +  @param[out]  BnRes   The result of (BnA

Re: [edk2-devel] [PATCH 2/2] NetworkPkg: Add the missing VariablePolicyHelperLib in NetworkPkg.dsc

2022-01-29 Thread Wu, Jiaxin
Reviewed-by: Jiaxin Wu 



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of
> gaoliming
> Sent: Friday, January 28, 2022 5:14 PM
> To: devel@edk2.groups.io
> Cc: Maciej Rabeda ; Wu, Jiaxin
> ; Fu, Siyuan 
> Subject: [edk2-devel] [PATCH 2/2] NetworkPkg: Add the missing
> VariablePolicyHelperLib in NetworkPkg.dsc
> 
> This change is required by f4b7b473b4afd0093768905529bfae09a2061d41.
> 
> Signed-off-by: Liming Gao 
> Cc: Maciej Rabeda 
> Cc: Jiaxin Wu 
> Cc: Siyuan Fu 
> ---
>  NetworkPkg/NetworkPkg.dsc | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/NetworkPkg/NetworkPkg.dsc b/NetworkPkg/NetworkPkg.dsc
> index 8691a0f5d0..762134023d 100644
> --- a/NetworkPkg/NetworkPkg.dsc
> +++ b/NetworkPkg/NetworkPkg.dsc
> @@ -45,6 +45,7 @@
> 
> DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTabl
> eLib.inf
>SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
>RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf
> +
> VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Va
> riablePolicyHelperLib.inf
> 
>  !ifdef CONTINUOUS_INTEGRATION
>BaseCryptLib|CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> --
> 2.27.0.windows.1
> 
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH v2 2/2] OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf

2022-01-29 Thread Abner Chang


> -Original Message-
> From: Ard Biesheuvel 
> Sent: Sunday, January 30, 2022 1:17 AM
> To: edk2-devel-groups-io ; Chang, Abner (HPS
> SW/FW Technologist) 
> Cc: Schaefer, Daniel (ROM Janitor) ; Sunil V L
> ; Ard Biesheuvel ;
> Jiewen Yao ; Jordan Justen
> ; Gerd Hoffmann ; Leif
> Lindholm ; Sami Mujawar 
> Subject: Re: [edk2-devel] [PATCH v2 2/2]
> OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf
> 
> On Sat, 29 Jan 2022 at 18:05, Abner Chang  wrote:
> >
> > Remove the dependency with ArmVirtPkg and add RISCV64 in
> VALID_ARCHITECTURES.
> >
> > Signed-off-by: Abner Chang 
> > Cc: Daniel Schaefer 
> > Cc: Sunil V L 
> > Cc: Ard Biesheuvel 
> > Cc: Jiewen Yao 
> > Cc: Jordan Justen 
> > Cc: Gerd Hoffmann 
> > Cc: Leif Lindholm 
> > Cc: Sami Mujawar 
> > ---
> >  .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git
> a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> > index 33568f568f..0383a37cbf 100644
> > ---
> a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> > +++
> b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> > @@ -21,15 +21,15 @@
> >CONSTRUCTOR= PciExpressLibInitialize
> >
> >  #
> > -#  VALID_ARCHITECTURES   = ARM AARCH64
> > +#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64
> >  #
> >
> 
> I am going to fold the above hunk into patch #1, given that
> 
> >  [Sources]
> >PciExpressLib.c
> >
> >  [Packages]
> > -  ArmVirtPkg/ArmVirtPkg.dec
> >MdePkg/MdePkg.dec
> > +  OvmfPkg/OvmfPkg.dec
> >
> 
> this change is unnecessary - either package reference is unnecessary
> so I will just drop the reference to ArmVirtPkg/ArmVirtPkg.dec when
> moving it.
[Abner] 
Thanks.
Yes,  adding OvmfPkg is redundant.

BTW, I saw CI reported the errors on this merge. However, those errors seem 
irrelevant to the code changes. Does that matter?
https://github.com/tianocore/edk2/runs/4992385347

Abner

> 
> >  [LibraryClasses]
> >BaseLib
> > --
> > 2.31.1
> >
> >
> >
> > 
> > Groups.io Links: You receive all messages sent to this group.
> > View/Reply Online (#86214):
> https://edk2.groups.io/g/devel/message/86214
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> [ardb+tianoc...@kernel.org]
> > 
> >
> >


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Re: [edk2-devel] [PATCH v3 3/8] DynamicTablesPkg: AcpiSsdtPcieLibArm: Fix _PRT description

2022-01-29 Thread Marc Zyngier
On Sat, 29 Jan 2022 15:52:02 +,
Ard Biesheuvel  wrote:
> 
> (+ Marc)
> 
> On Fri, 28 Jan 2022 at 16:41,  wrote:
> >
> > From: Pierre Gondois 
> >
> > In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts
> > can be defined following 2 models.
> > In the first model, a _SRS object must be described to modify the PCI
> > interrupt. The _CRS and _PRS object allows to describe the PCI
> > interrupt (level/edge triggered, active high/low).
> > In the second model, the PCI interrupt cannot be described with a
> > similar granularity. PCI interrupts are by default level triggered,
> > active low.
> >
> > GicV2 SPI interrupts are level or edge triggered, active high. To
> > correctly describe PCI interrupts, the first model is used, even though
> > Arm Base Boot Requirements v1.0 requires to use the second mode.
> >
> 
> There are two different issues here:
> 
> - using separate 'interrupt link' device objects with an Interrupt()
> resource rather than a simple GSIV number
> - whether _PRS and _SRS need to be implemented on those link objects.
> 
> The latter is simply not true - _PRS and _SRS are optional, and
> pointless if there is only a single possible value, so there is really
> no need to add them here.
> 
> As for the choice between the link object or the GSIV number: I don't
> think INTx interrupts on ARM systems are actually level low, and the
> GSIV option is widely used, also in platforms that exist in
> edk2-platforms, without any reported issues.
> 
> I've cc'ed Marc, perhaps he can shed some light on this, but I'd
> prefer to stick to the GSIV approach if we can, as it is much simpler.

I don't immediately see the point either. Yes, the GIC only supports
level-high interrupts. However, all the PCIe implementations connected
to it are inverting the level. If they don't, that's even simpler (the
HW is broken).

Is this to address an apparent disconnect with the spec?

[...]

> > -  The _PRS and _SRS are not supported, cf Arm Base Boot Requirements v1.0:
> > +  Warning: The Arm Base Boot Requirements v1.0 states the following:
> >"The _PRS (Possible Resource Settings) and _SRS (Set Resource Settings)
> >are not supported."
> > +  However, the first model to describe PCI legacy interrupts is used (cf. 
> > ACPI
> > +  6.4 s6.2.13) as PCI defaults (Level Triggered, Active Low) are not 
> > compatible
> > +  with GICv2 (must be Active High).

nit: GICv3 has the exact same behaviour. Why is v2 singled out?

Thanks,

M.

-- 
Without deviation from the norm, progress is not possible.


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