Re: [Openocd-development] 0.4.0-RC1 status ...

[Michel Catudal]

David Brownell a écrit : On Monday 11 January 2010, Michel Catudal wrote: That is correct. As for the watchdog, once you enable it you can no longer debug as it keep reseting. Isn't there an STM32-specific register to prevent the watchdog from counting while the core is in debug halt state? There is a register to disable the watchdog during debug. I am not sure why IAR doesn't use it. With Micronas it would disable the watchdog automatically whenever you would be debugging. The solution would be simplier to the interrupts since the watchdog could stay disabled during debugging. -- Tired of Microsoft's rebootive multitasking? then it's time to upgrade to Linux. http://home.comcast.net/~mcatudal

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