On Monday 09 November 2009, Thomas Kindler wrote: > Using an Amontec JTAGkey-Tiny and STM32 (on cygwin), every time I do an > "reset", the chip actually resets twice. > > The problem exists since I first used OpenOCD (< 0.1.0).
And it's not specific to that hardware. You can see what causes it by looking at src/helper/startup.tcl in the procedure "ocd_process_reset_inner": - init_reset ... does the first SRST, although it's commented as being only a JTAG reset - $t arp_reset assert $halt ...starts the second SRST, although it's allegedly a target-specific reset Fixing that SRST abuse hasn't been a priority for me, since it's mostly just obnoxious rather than actively harmful (on common hardware.) And there are much more significant reset issues to resolve, which show up on hardware like BeagleBoard ... like, generic support for running without any SRST support at all. > Even "reset halt" will let the CPU run for some amount of time (e.g. > enough to print a Hello-World string to the serial port..). Now *that* is a bug. And one that I suspect is specific to STM32, or at least to your particular chip, since I've not observed it on my tiny sample of Stellaris chips. What happens if you tell OpenOCD not to use SRST? The Cortex-M3 can reset using NVIC, without SRST. It has two NVIC resets ... see cortex_m3_assert_reset(). I've been curious which of those two resets STM32 needs; someone commented that those chips aren't wired quite the same way Stellaris is, so it may need to use the other one (read comments in that routine). In any case, it *should* be possible for OpenOCD to run STM32 without SRST, and you could help sort that out. - Dave _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
