Using an Amontec JTAGkey-Tiny and STM32 (on cygwin), every time I do an
"reset", the chip actually resets twice.
The problem exists since I first used OpenOCD (< 0.1.0).
Even "reset halt" will let the CPU run for some amount of time (e.g.
enough to print a Hello-World string to the serial port..).
Here's a minimal example using the current git-Version (with Simon
Quian's patch to get it working at all ;) ):
$ src/openocd -d3 -f tcl/interface/jtagkey.cfg -f tcl/target/stm32.cfg
-c "init; reset; shutdown"
[see attachment]
tkind...@pc-kindler ~/openocd
$ src/openocd -d3 -f tcl/interface/jtagkey.cfg -f tcl/target/stm32.cfg -c
"init; reset; shutdown"
Open On-Chip Debugger 0.4.0-dev-00099-g2689f58 (2009-11-09-15:09)
$URL$
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
User : 5 1 command.c:400 command_print(): debug_level: 3
Debug: 6 3 configuration.c:83 find_file(): found tcl/interface/jtagkey.cfg
Debug: 8 4 command.c:68 script_debug(): command - interface
Debug: 9 5 command.c:77 script_debug(): interface - argv[0]=ocd_interface
Debug: 10 6 command.c:77 script_debug(): interface - argv[1]=ft2232
Debug: 12 8 command.c:68 script_debug(): command - ft2232_device_desc
Debug: 13 9 command.c:77 script_debug(): ft2232_device_desc -
argv[0]=ocd_ft2232_device_desc
Debug: 14 9 command.c:77 script_debug(): ft2232_device_desc - argv[1]=Amontec
JTAGkey
Debug: 16 10 command.c:68 script_debug(): command - ft2232_layout
Debug: 17 11 command.c:77 script_debug(): ft2232_layout -
argv[0]=ocd_ft2232_layout
Debug: 18 12 command.c:77 script_debug(): ft2232_layout - argv[1]=jtagkey
Debug: 20 13 command.c:68 script_debug(): command - ft2232_vid_pid
Debug: 21 13 command.c:77 script_debug(): ft2232_vid_pid -
argv[0]=ocd_ft2232_vid_pid
Debug: 22 14 command.c:77 script_debug(): ft2232_vid_pid - argv[1]=0x0403
Debug: 23 15 command.c:77 script_debug(): ft2232_vid_pid - argv[2]=0xcff8
Debug: 24 16 configuration.c:83 find_file(): found tcl/target/stm32.cfg
Debug: 26 18 command.c:68 script_debug(): command - jtag_khz
Debug: 27 19 command.c:77 script_debug(): jtag_khz - argv[0]=ocd_jtag_khz
Debug: 28 19 command.c:77 script_debug(): jtag_khz - argv[1]=1000
Debug: 29 20 core.c:1581 jtag_config_khz(): handle jtag khz
Debug: 30 21 core.c:1537 jtag_khz_to_speed(): convert khz to interface specific
speed value
User : 31 22 command.c:400 command_print(): 1000 kHz
Debug: 33 23 command.c:68 script_debug(): command - jtag_nsrst_delay
Debug: 34 24 command.c:77 script_debug(): jtag_nsrst_delay -
argv[0]=ocd_jtag_nsrst_delay
Debug: 35 24 command.c:77 script_debug(): jtag_nsrst_delay - argv[1]=100
User : 36 25 command.c:400 command_print(): jtag_nsrst_delay: 100
Debug: 38 26 command.c:68 script_debug(): command - jtag_ntrst_delay
Debug: 39 27 command.c:77 script_debug(): jtag_ntrst_delay -
argv[0]=ocd_jtag_ntrst_delay
Debug: 40 28 command.c:77 script_debug(): jtag_ntrst_delay - argv[1]=100
User : 41 28 command.c:400 command_print(): jtag_ntrst_delay: 100
Debug: 43 29 command.c:68 script_debug(): command - reset_config
Debug: 44 30 command.c:77 script_debug(): reset_config -
argv[0]=ocd_reset_config
Debug: 45 31 command.c:77 script_debug(): reset_config - argv[1]=trst_and_srst
User : 46 32 command.c:400 command_print(): trst_and_srst separate
srst_gates_jtag trst_push_pull sr
st_open_drain
Debug: 47 32 tcl.c:245 jim_newtap_cmd(): Creating New Tap, Chip: stm32, Tap:
cpu, Dotted: stm32.cpu,
8 params
Debug: 48 33 tcl.c:262 jim_newtap_cmd(): Processing option: -irlen
Debug: 49 34 tcl.c:262 jim_newtap_cmd(): Processing option: -ircapture
Debug: 50 35 tcl.c:262 jim_newtap_cmd(): Processing option: -irmask
Debug: 51 36 tcl.c:262 jim_newtap_cmd(): Processing option: -expected-id
Debug: 52 37 core.c:1314 jtag_tap_init(): Created Tap: stm32.cpu @ abs position
0, irlen 4, capture:
0x1 mask: 0xf
Debug: 53 38 tcl.c:245 jim_newtap_cmd(): Creating New Tap, Chip: stm32, Tap:
bs, Dotted: stm32.bs, 1
2 params
Debug: 54 39 tcl.c:262 jim_newtap_cmd(): Processing option: -irlen
Debug: 55 40 tcl.c:262 jim_newtap_cmd(): Processing option: -expected-id
Debug: 56 40 tcl.c:262 jim_newtap_cmd(): Processing option: -expected-id
Debug: 57 41 tcl.c:262 jim_newtap_cmd(): Processing option: -expected-id
Debug: 58 41 tcl.c:262 jim_newtap_cmd(): Processing option: -expected-id
Debug: 59 42 tcl.c:262 jim_newtap_cmd(): Processing option: -expected-id
Debug: 60 42 core.c:1314 jtag_tap_init(): Created Tap: stm32.bs @ abs position
0, irlen 5, capture:
0x1 mask: 0x3
Debug: 61 43 target.c:4512 jim_target(): Target command params:
Debug: 62 44 target.c:4513 jim_target(): target create stm32.cpu cortex_m3
-endian little -chain-pos
ition stm32.cpu
Debug: 64 47 command.c:68 script_debug(): command - bank
Debug: 65 48 command.c:77 script_debug(): bank - argv[0]=ocd_flash_bank
Debug: 66 49 command.c:77 script_debug(): bank - argv[1]=stm32x
Debug: 67 50 command.c:77 script_debug(): bank - argv[2]=0
Debug: 68 51 command.c:77 script_debug(): bank - argv[3]=0
Debug: 69 51 command.c:77 script_debug(): bank - argv[4]=0
Debug: 70 52 command.c:77 script_debug(): bank - argv[5]=0
Debug: 71 53 command.c:77 script_debug(): bank - argv[6]=stm32.cpu
Debug: 73 55 command.c:68 script_debug(): command - init
Debug: 74 56 command.c:77 script_debug(): init - argv[0]=ocd_init
Debug: 75 58 openocd.c:129 handle_init_command(): target init complete
Debug: 76 59 ft2232.c:2113 ft2232_init(): ft2232 interface using shortest path
jtag state transition
s
Debug: 77 60 ft2232.c:1859 ft2232_init_ftd2xx(): 'ft2232' interface using
FTD2XX with 'jtagkey' layo
ut (0403:cff8)
Debug: 78 112 ft2232.c:1970 ft2232_init_ftd2xx(): current latency timer: 2
Info : 79 114 ft2232.c:1997 ft2232_init_ftd2xx(): device: 4 "2232C"
Info : 80 115 ft2232.c:1998 ft2232_init_ftd2xx(): deviceID: 67358712
Info : 81 116 ft2232.c:1999 ft2232_init_ftd2xx(): SerialNumber: T1R89RORA
Info : 82 116 ft2232.c:2000 ft2232_init_ftd2xx(): Description: Amontec JTAGkey A
Debug: 83 117 ft2232.c:2369 jtagkey_init(): 80 08 1b
Debug: 84 119 ft2232.c:2428 jtagkey_init(): 82 09 0f
Debug: 85 120 core.c:1537 jtag_khz_to_speed(): convert khz to interface
specific speed value
Debug: 86 121 core.c:1541 jtag_khz_to_speed(): have interface set up
Debug: 87 122 ft2232.c:524 ft2232_speed(): 86 05 00
Debug: 88 130 core.c:1537 jtag_khz_to_speed(): convert khz to interface
specific speed value
Debug: 89 131 core.c:1541 jtag_khz_to_speed(): have interface set up
Info : 90 132 core.c:1364 jtag_interface_init(): clock speed 1000 kHz
Debug: 91 133 openocd.c:136 handle_init_command(): jtag interface init complete
Debug: 92 134 ft2232.c:1342 jtagkey_reset(): trst: 0, srst: 0, high_output:
0x09, high_direction: 0x
0f
Debug: 93 135 core.c:702 jtag_add_reset(): SRST line released
Debug: 94 136 core.c:727 jtag_add_reset(): TRST line released
Debug: 95 137 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 96 361 core.c:1378 jtag_init_inner(): Init JTAG chain
Debug: 97 362 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 98 363 core.c:1039 jtag_examine_chain(): DR scan interrogation for
IDCODE/BYPASS
Debug: 99 364 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 100 367 core.c:948 jtag_examine_chain_display(): JTAG tap: stm32.cpu
tap/device found: 0x3ba0
0477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
Info : 101 368 core.c:948 jtag_examine_chain_display(): JTAG tap: stm32.bs
tap/device found: 0x06414
041 (mfg: 0x020, part: 0x6414, ver: 0x0)
Debug: 102 369 core.c:1204 jtag_validate_ircapture(): IR capture validation scan
Debug: 103 371 core.c:1257 jtag_validate_ircapture(): stm32.cpu: IR capture 0x01
Debug: 104 372 core.c:1257 jtag_validate_ircapture(): stm32.bs: IR capture 0x01
Debug: 105 373 openocd.c:142 handle_init_command(): jtag init complete
Debug: 106 374 arm_adi_v5.c:960 ahbap_debugport_init():
Debug: 107 380 arm_adi_v5.c:1005 ahbap_debugport_init(): AHB-AP ID Register
0x14770011, Debug ROM Ad
dress 0xe00ff003
Debug: 108 384 target.c:1558 target_read_u32(): address: 0xe000ed00, value:
0x411fc231
Debug: 109 385 cortex_m3.c:1612 cortex_m3_examine(): CORTEX-M3 processor
detected
Debug: 110 386 cortex_m3.c:1613 cortex_m3_examine(): cpuid: 0x411fc231
Debug: 111 389 target.c:1558 target_read_u32(): address: 0xe0002000, value:
0x00000261
Debug: 112 389 cortex_m3.c:1630 cortex_m3_examine(): FPB fpcr 0x261, numcode 6,
numlit 2
Debug: 113 393 target.c:1558 target_read_u32(): address: 0xe0001000, value:
0x40000000
Debug: 114 393 cortex_m3.c:1583 cortex_m3_dwt_setup(): DWT dwtcr 0x40000000,
comp 4, watch/trigger
Debug: 115 394 openocd.c:145 handle_init_command(): jtag examine complete
Debug: 116 395 openocd.c:151 handle_init_command(): flash init complete
Debug: 117 396 openocd.c:155 handle_init_command(): mflash init complete
Debug: 118 397 openocd.c:159 handle_init_command(): NAND init complete
Debug: 119 398 openocd.c:163 handle_init_command(): pld init complete
Debug: 120 452 gdb_server.c:2243 gdb_init(): gdb service for target cortex_m3
at TCP port 3333
Debug: 122 471 command.c:68 script_debug(): command - reset
Debug: 123 471 command.c:77 script_debug(): reset - argv[0]=ocd_reset
Debug: 124 473 target.c:4512 jim_target(): Target command params:
Debug: 125 473 target.c:4513 jim_target(): target names
Debug: 126 474 core.c:1465 jtag_init_reset(): Initializing with hard TRST+SRST
reset
Debug: 127 475 ft2232.c:1342 jtagkey_reset(): trst: 1, srst: 0, high_output:
0x08, high_direction: 0
x0f
Debug: 128 477 core.c:722 jtag_add_reset(): TRST line asserted
Debug: 129 478 ft2232.c:1342 jtagkey_reset(): trst: 1, srst: 1, high_output:
0x00, high_direction: 0
x0f
Debug: 130 479 core.c:697 jtag_add_reset(): SRST line asserted
Debug: 131 479 ft2232.c:1342 jtagkey_reset(): trst: 0, srst: 1, high_output:
0x01, high_direction: 0
x0f
Debug: 132 481 core.c:727 jtag_add_reset(): TRST line released
Debug: 133 482 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 135 589 ft2232.c:1342 jtagkey_reset(): trst: 0, srst: 0, high_output:
0x09, high_direction: 0
x0f
Debug: 136 590 core.c:702 jtag_add_reset(): SRST line released
Debug: 137 699 core.c:1378 jtag_init_inner(): Init JTAG chain
Debug: 138 700 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 139 701 core.c:1039 jtag_examine_chain(): DR scan interrogation for
IDCODE/BYPASS
Debug: 140 702 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 141 705 core.c:948 jtag_examine_chain_display(): JTAG tap: stm32.cpu
tap/device found: 0x3ba0
0477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
Info : 142 706 core.c:948 jtag_examine_chain_display(): JTAG tap: stm32.bs
tap/device found: 0x06414
041 (mfg: 0x020, part: 0x6414, ver: 0x0)
Debug: 143 707 core.c:1204 jtag_validate_ircapture(): IR capture validation scan
Debug: 144 708 core.c:1257 jtag_validate_ircapture(): stm32.cpu: IR capture 0x01
Debug: 145 709 core.c:1257 jtag_validate_ircapture(): stm32.bs: IR capture 0x01
Debug: 146 710 arm_adi_v5.c:960 ahbap_debugport_init():
Debug: 147 716 arm_adi_v5.c:1005 ahbap_debugport_init(): AHB-AP ID Register
0x14770011, Debug ROM Ad
dress 0xe00ff003
Debug: 148 717 cortex_m3.c:700 cortex_m3_assert_reset(): target->state: running
Debug: 149 727 cortex_m3.c:153 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 150 731 ft2232.c:1342 jtagkey_reset(): trst: 0, srst: 1, high_output:
0x01, high_direction: 0
x0f
Debug: 151 733 core.c:697 jtag_add_reset(): SRST line asserted
Debug: 152 734 cortex_m3.c:833 cortex_m3_deassert_reset(): target->state: reset
Debug: 153 789 ft2232.c:1342 jtagkey_reset(): trst: 0, srst: 0, high_output:
0x09, high_direction: 0
x0f
Debug: 154 790 core.c:702 jtag_add_reset(): SRST line released
Debug: 155 901 cortex_m3.c:415 cortex_m3_poll(): Exit from reset with dcb_dhcsr
0x1010001
Debug: 156 905 cortex_m3.c:190 cortex_m3_endreset_event(): DCB_DEMCR =
0x01000500
Debug: 157 911 target.c:1635 target_write_u32(): address: 0xe0002000, value:
0x00000003
Debug: 158 915 target.c:1635 target_write_u32(): address: 0xe0002008, value:
0x00000000
Debug: 159 916 target.c:1635 target_write_u32(): address: 0xe000200c, value:
0x00000000
Debug: 160 918 target.c:1635 target_write_u32(): address: 0xe0002010, value:
0x00000000
Debug: 161 922 target.c:1635 target_write_u32(): address: 0xe0002014, value:
0x00000000
Debug: 162 924 target.c:1635 target_write_u32(): address: 0xe0002018, value:
0x00000000
Debug: 163 926 target.c:1635 target_write_u32(): address: 0xe000201c, value:
0x00000000
Debug: 164 928 target.c:1635 target_write_u32(): address: 0xe0002020, value:
0x00000000
Debug: 165 931 target.c:1635 target_write_u32(): address: 0xe0002024, value:
0x00000000
Debug: 166 933 target.c:1635 target_write_u32(): address: 0xe0001020, value:
0x00000000
Debug: 167 935 target.c:1635 target_write_u32(): address: 0xe0001024, value:
0x00000000
Debug: 168 937 target.c:1635 target_write_u32(): address: 0xe0001028, value:
0x00000000
Debug: 169 939 target.c:1635 target_write_u32(): address: 0xe0001030, value:
0x00000000
Debug: 170 943 target.c:1635 target_write_u32(): address: 0xe0001034, value:
0x00000000
Debug: 171 945 target.c:1635 target_write_u32(): address: 0xe0001038, value:
0x00000000
Debug: 172 949 target.c:1635 target_write_u32(): address: 0xe0001040, value:
0x00000000
Debug: 173 953 target.c:1635 target_write_u32(): address: 0xe0001044, value:
0x00000000
Debug: 174 958 target.c:1635 target_write_u32(): address: 0xe0001048, value:
0x00000000
Debug: 175 960 target.c:1635 target_write_u32(): address: 0xe0001050, value:
0x00000000
Debug: 176 964 target.c:1635 target_write_u32(): address: 0xe0001054, value:
0x00000000
Debug: 177 968 target.c:1635 target_write_u32(): address: 0xe0001058, value:
0x00000000
Debug: 179 979 command.c:68 script_debug(): command - shutdown
Debug: 180 979 command.c:77 script_debug(): shutdown - argv[0]=ocd_shutdown
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