On 29 November 2017 at 22:46, Gert Wollny <gw.foss...@gmail.com> wrote: > Am Mittwoch, den 29.11.2017, 14:36 +1000 schrieb Dave Airlie: >> This set of patches enables compute shaders on r600 and exposes GLSL >> 4.30 support. They are pretty alpha level, but I'd like to land some >> of them (maybe disabled) so I can avoid the rebasing fun with the >> more intrusive ones. >> >> It is based on the previous ssbo support patch. >> >> It may not be stable, I have a few patches sitting on top locally >> for flushing various things I want to figure out if they are required >> or if I can fix things properly. >> > > I run the arb_compute_shader piglits on BARTS, the piglits > > basic-texelfetch > border-color > multiple-workgroups > basic-uniform-access > multiple-texture-reading > simple-barrier > > result in GPU lockups and, consequently, fail. The other 20 tests pass.
Does the attached patch help with the lockups at all? Dave.
From 3aa8b83628190d452639810d2dbaea8aae8a104d Mon Sep 17 00:00:00 2001 From: Dave Airlie <airl...@redhat.com> Date: Fri, 3 Nov 2017 15:44:51 +1000 Subject: [PATCH] r600/cs more flushes add some missing flushes --- src/gallium/drivers/r600/evergreen_compute.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index 4c888a2..ec77bb0 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -799,13 +799,21 @@ static void compute_emit_cs(struct r600_context *rctx, /* Emit dispatch state and dispatch packet */ evergreen_emit_dispatch(rctx, info); + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cs, EVENT_TYPE(0x6)); + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4)); + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_CS_PARTIAL_FLUSH) | EVENT_INDEX(4)); if (rctx->cs_shader_state.shader->ir_type == PIPE_SHADER_IR_TGSI) evergreen_emit_atomic_buffer_save(rctx, true, combined_atomics, &atomic_used_mask); /* XXX evergreen_flush_emit() hardcodes the CP_COHER_SIZE to 0xffffffff */ rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE | R600_CONTEXT_INV_VERTEX_CACHE | - R600_CONTEXT_INV_TEX_CACHE; + R600_CONTEXT_INV_TEX_CACHE | + R600_CONTEXT_PS_PARTIAL_FLUSH | + R600_CONTEXT_FLUSH_AND_INV_CB; r600_flush_emit(rctx); rctx->b.flags = 0; -- 2.9.5
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