> From: Gala Kumar-B11780 > Sent: Thursday, November 19, 2009 7:51 PM > > + * Cache SRAM handling for QorIQ platform > > should say PQ3 & some QorIQ platforms
Ok > > > +config FSL_85XX_CACHE_SRAM_BASE > > + hex > > + depends on FSL_85XX_CACHE_SRAM > > + default "0xfff00000" > > + > > I really don't like setting the physical address this way, > can we not do this via the device tree? Cache-sram does not have any device tree entry since it is not a hardware as such. Putting it under chosen can be another option. I think, Scott (cc'ed) was of the opinion that since 32b base address support is missing; so there is no point in moving this address to the command line and .config should be okay for now for it. > > > + * QorIQ based Cache Controller Memory Mapped Registers > > PQ3 or some QorIQ Ok > > > + * Simple memory allocator abstraction for QorIQ (P1/P2) based > > Cache-SRAM > > PQ3 or some QorIQ Ok > > > > + > > + if (!param || (strict_strtoul(param, 0, &val) < 0)) > > + return -EINVAL; > > + > > we should use memparse() Ok Thanks, Vivek _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
