Wolfgang Denk wrote:
Dear Vivek Mahajan,
In message <1256129459-10685-2-git-send-email-vivek.maha...@freescale.com> you
wrote:
Adds documentation for Freescale's QorIQ based cache-sram as under:-
* How to enable it from a low level driver
* How to set its size
...
+The size of the above cache SRAM memory window is passed via the
+kernel command line as <cache-sram-size=....>
Would it not make more sense to configure this property through the
device tree?
The device tree describes the hardware. It is not a kernel config tree.
-Scott
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