On Sat, Mar 31, 2012 at 11:21:58AM +0200, Daniel Vetter wrote: > Contrary to the other clock gating w/a in GEN6_UCGCTL1, this one is > actually documented in Bspec, vol1g "GT Interface Registers [SNB]", > Section 1.5.1 "UCGCTL1 - Unit Level Clock Gating Control 1". > > Supposedly this can prevent hangs on the media ring. > > Signed-Off-by: Daniel Vetter <daniel.vet...@ffwll.ch> Reviewed-by: Ben Widawsky <b...@bwidawsk.net> _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
- [Intel-gfx] [PATCH 0/7] A set of SNB workarounds Daniel Vetter
- [Intel-gfx] [PATCH 1/7] drm/i915: implement ColorBlt w/... Daniel Vetter
- Re: [Intel-gfx] [PATCH 1/7] drm/i915: implement Col... Chris Wilson
- Re: [Intel-gfx] [PATCH 1/7] drm/i915: implement... Chris Wilson
- Re: [Intel-gfx] [PATCH 1/7] drm/i915: implement Col... Michael Groh
- Re: [Intel-gfx] [PATCH 1/7] drm/i915: implement Col... Paul Menzel
- Re: [Intel-gfx] [PATCH 1/7] drm/i915: implement Col... Ben Widawsky
- [Intel-gfx] [PATCH 2/7] drm/i915: implement a media han... Daniel Vetter
- Re: [Intel-gfx] [PATCH 2/7] drm/i915: implement a m... Ben Widawsky
- Re: [Intel-gfx] [PATCH 2/7] drm/i915: implement... Ben Widawsky
- Re: [Intel-gfx] [PATCH 2/7] drm/i915: implement a m... Ben Widawsky
- [Intel-gfx] [PATCH 3/7] drm/i915: set w/a bit for snb p... Daniel Vetter
- [Intel-gfx] [PATCH 4/7] drm/i915: properly set ppgtt ca... Daniel Vetter
- Re: [Intel-gfx] [PATCH 4/7] drm/i915: properly set ... Ben Widawsky
- Re: [Intel-gfx] [PATCH 4/7] drm/i915: properly ... Daniel Vetter
- Re: [Intel-gfx] [PATCH 4/7] drm/i915: prope... Ben Widawsky
- [Intel-gfx] [PATCH 5/7] drm/i915: implement w/a for inc... Daniel Vetter
- Re: [Intel-gfx] [PATCH 5/7] drm/i915: implement w/a... Ben Widawsky
- Re: [Intel-gfx] [PATCH 5/7] drm/i915: implement... Daniel Vetter
- [Intel-gfx] [PATCH 6/7] drm/i915: implement async flush... Daniel Vetter