On Thu, Jun 19, 2008 at 03:50:34PM -0500, Joel Sherrill wrote: > >On Thu, Jun 19, 2008 at 1:36 PM, Joel Sherrill > ><[EMAIL PROTECTED]> wrote: > > > >>Hi, > >> > >>I ran into something tracking down a test > >>failure on psim and now thing there is a > >>target specific issue that needs addressing. > >> > > Andrew Pinski wrote: > >lwsync is sync with the bit 9 set. So it should be ok as it was a > >reserved field and was supposed to be ignored on the hardware which > >did not implement those bits and have it as a sync (but I could be > >wrong).
Based on http://gcc.gnu.org/ml/gcc-patches/2006-11/msg01238.html it appears that it is not ignored, but rather traps, on at least some hardware. As a rule (thanks to some bad experiences with the Motorola 68000) processor architects tend to make sure that reserved bits and unused bits generate a trap, otherwise the software developers start using those bits for some other purpose and constrain future processor development. > I really don't know what to make of this now. Should > gcc not generate lwsync for a 603e and psim is right > Or should psim be fixed to allow bit 9 to be set? If psim's going to support both older and newer processors, simulated, it appears it has to depend on the specific processor being simulated (so psim should make both behaviors possible).
