The ARMv8.1 architecture extension adds two Adv.SIMD instructions,. This
patch adds support in Dejagnu for ARMv8.1 Adv.SIMD specifiers and
checks.
The new test options are
- { dg-add-options arm_v8_1a_neon }: Add compiler options needed to
enable ARMv8.1 Adv.SIMD.
- { dg-require-effective-target arm_v8_1a_neon_hw }: Require a target
capable of executing ARMv8.1 Adv.SIMD instructions.
The new options support AArch64 only.
Tested the series for aarch64-none-linux-gnu with native bootstrap and
make check on an ARMv8 architecture. Also tested aarch64-none-elf with
cross-compiled check-gcc on an ARMv8.1 emulator.
Ok for trunk?
Matthew
gcc/testsuite
2015-10-23 Matthew Wahab <matthew.wa...@arm.com>
* lib/target-supports.exp (add_options_for_arm_v8_1a_neon): New.
(check_effective_target_arm_arch_FUNC_ok)
(add_options_for_arm_arch_FUNC)
(check_effective_target_arm_arch_FUNC_multilib): Add "armv8.1-a"
to the list to be generated.
(check_effective_target_arm_v8_1a_neon_ok_nocache): New.
(check_effective_target_arm_v8_1a_neon_ok): New.
(check_effective_target_arm_v8_1a_neon_hw): New.
>From 4c218c6972f510aee2b438180084baafda80b37f Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wa...@arm.com>
Date: Thu, 27 Aug 2015 13:41:15 +0100
Subject: [PATCH 5/7] [Testsuite] Add dejagnu options for armv8.1 neon
Change-Id: Ic8edc48aa701aa159303f13154710a6fdae816d0
---
gcc/testsuite/lib/target-supports.exp | 50 ++++++++++++++++++++++++++++++++++-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 4d5b0a3d..b03ea02 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2700,6 +2700,16 @@ proc add_options_for_arm_v8_neon { flags } {
return "$flags $et_arm_v8_neon_flags -march=armv8-a"
}
+# Add the options needed for ARMv8.1 Adv.SIMD.
+
+proc add_options_for_arm_v8_1a_neon { flags } {
+ if { [istarget aarch64*-*-*] } {
+ return "$flags -march=armv8.1-a"
+ } else {
+ return "$flags"
+ }
+}
+
proc add_options_for_arm_crc { flags } {
if { ! [check_effective_target_arm_crc_ok] } {
return "$flags"
@@ -2984,7 +2994,8 @@ foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
v7r "-march=armv7-r" __ARM_ARCH_7R__
v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
- v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
+ v8a "-march=armv8-a" __ARM_ARCH_8A__
+ v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
proc check_effective_target_arm_arch_FUNC_ok { } {
if { [ string match "*-marm*" "FLAG" ] &&
@@ -3141,6 +3152,22 @@ proc check_effective_target_arm_neonv2_hw { } {
} [add_options_for_arm_neonv2 ""]]
}
+# Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
+# otherwise. The test is valid for AArch64.
+
+proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
+ return [check_no_compiler_messages_nocache arm_v8_1a_neon_ok assembly {
+ #if !defined (__ARM_FEATURE_QRDMX)
+ #error FOO
+ #endif
+ } [add_options_for_arm_v8_1a_neon ""]]
+}
+
+proc check_effective_target_arm_v8_1a_neon_ok { } {
+ return [check_cached_effective_target arm_v8_1a_neon_ok \
+ check_effective_target_arm_v8_1a_neon_ok_nocache]
+}
+
# Return 1 if the target supports executing ARMv8 NEON instructions, 0
# otherwise.
@@ -3159,6 +3186,27 @@ proc check_effective_target_arm_v8_neon_hw { } {
} [add_options_for_arm_v8_neon ""]]
}
+# Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
+# otherwise. The test is valid for AArch64.
+
+proc check_effective_target_arm_v8_1a_neon_hw { } {
+ return [check_runtime_nocache arm_v8_1a_neon_hw_available {
+ int
+ main (void)
+ {
+ long long a = 0, b = 1;
+ long long result = 0;
+
+ asm ("sqrdmlah %s0,%s1,%s2"
+ : "=w"(result)
+ : "w"(a), "w"(b)
+ : /* No clobbers. */);
+
+ return result;
+ }
+ } [add_options_for_arm_v8_1a_neon ""]]
+}
+
# Return 1 if this is a ARM target with NEON enabled.
proc check_effective_target_arm_neon { } {
--
2.1.4
