Thanks, Rich, Interesting analysis. I plan to take apart a few supplies and determine what is actually happening. Clearly a resonance is involved because one stress pulse produces both polarities in response.
The generator, often an ESD gun is not a low impedance impedeance after the discharge, potentially 150 pF for a short while. Safety issue and/or causing equipment malfunction, this is an important effect. I am generating new data this week and it will eventually be published at the EOS/ESD Symposium, possibly as an invited or special paper. Before that I will be presenting my new findings within my class later this month. I can determine where the discharge is happening without any connections to the power supply using speed of light techniques I use to find glitches on PCBs and ESD events in equipment or in larger structures. It is important not to connect directly to the supply as the connection will affect the mechanism in the supply. I have been describing these techniques for years now in my papers and classes. First started using these techniques about 1994 or so. Solved a lot of problems in the intervening years. Doug [https://lh4.googleusercontent.com/_HuR3Ky2TF_XhFHyxnYRmiq7nHQldnMsPNYFaLG6kb5T4y8MeCe-BDC_BscJtSFgszSSjssihHS-pjM3-jwNP8S0CwE-gN8fsRsPkojiAlmpBwb20vIVizS-siCUywW_jqrefbVr] From: Richard Nute <ri...@ieee.org> Sent: Monday, March 3, 2025 14:56 To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: Re: [PSES] major safety issue possibly affecting 20% of the electronic devices in use Wrong attachment. Correct attachment here. Rich From: Richard Nute <ri...@ieee.org<mailto:ri...@ieee.org>> Sent: Sunday, March 2, 2025 3:35 PM To: EMC-PSTC@LISTSERV.IEEE.ORG<mailto:EMC-PSTC@LISTSERV.IEEE.ORG> Subject: Re: [PSES] major safety issue possibly affecting 20% of the electronic devices in use Hi Doug: Thinking about your findings, one of the specific explanations or accountings for the change in power supply response may be something like this. Consider the attached "schematic" of a typical two-wire direct plug-in power supply. Your test set-up is to apply an 800-volt pulse to one pole of the output while connecting one or both poles of the primary to ground. The pulse then appears (divides) across the secondary circuit, the transformer, and the primary circuit. You monitor the current waveform from the pulse generator to the power supply. (The 138 k resistances in my schematic represent the worst-case -- lowest impedance at 60 Hertz -- Y-capacitors.) The pulses after the initial pulse are from the power supply. (What is the output impedance of the pulse generator after it outputs the pulse?) We don't know what circuits and components are in the boxes, "rect & reg" and "smps." However, we can guess that the "rect & reg" box has a series transistor and several capacitors. And, the 138 k resistors are in actuality capacitors. Capacitors will be charged (over-charged?) to some extent by the pulse. These will discharge, generating pulses back to the source. The semiconductors in the circuit will probably be deteriorated by the 800-volt pulse such that subsequent applications of the 800-volt pulse will have different impedances. And, it will take some time for the semiconductors to react to the pulse. Resistors subject to overvoltage may also be damaged. However, the 238 k (minimum at 60 Hz) Y-capacitors will not be subject to a voltage exceeding their ratings (at least 1,500 volts rms). Likewise, the transformer insulation will not be subjected to insulation damage voltage. (Note that the transformer doesn't act as a transformer for the 800-volt pulse.) My conjecture analysis (above) continues to be that the "protective separation" has not been damaged by the 800-volt pulse. The secondary events are due to discharge of the components in the power supply. Best regards, Rich From: doug emcesd.com <d...@emcesd.com<mailto:d...@emcesd.com>> Sent: Saturday, March 1, 2025 11:38 AM To: ri...@ieee.org<mailto:ri...@ieee.org>; EMC-PSTC@LISTSERV.IEEE.ORG<mailto:EMC-PSTC@LISTSERV.IEEE.ORG> Subject: RE: [PSES] major safety issue possibly affecting 20% of the electronic devices in use Hi Rich, I forgot to adequately answer your question of why I tested the supply unpowered. I always try to get at the simplest configuration that elicits the effect. In this case I made the first discovery of the effect on the power cable of a small router that I was debugging for ESD issues. The power supply of the router was a small AC plug variety. After a few minutes I realized that I could get the effect with the power supply laying on the table not connected to anything, just the ESD gun connected across the mains and output of the supply. The removal of the AC power enabled much more control over the test setup and led to information about the issue than would not have been possible with the mains connected. For instance, the total path on the table of the ESD gun and router connections was about two meters. The observed multiple ESD responses of the power supply from a single ESD event were mostly in the hundreds of nanoseconds in separation, too long for the path on the table but what I would expect for a resonant circuit to break over a barrier. BUT, close examination of the train of pulses generated by the power supply found some cable discharge events (I can tell they are cable discharge events by the waveshape) whose characteristics are just what I would expect from the discharge of a 2 meter cable!!! I would never have been able to make that observation with the power cable connected. So... the barrier was affected not only by internal resonances in the power supply but breakdowns appear to be happening via cable discharge as well! I always whittle the test setup down the simplest one I can that exhibits the desired response. My philosophy carries over as well to debugging high frequency immunity tests such as ESD, EFT, radiated immunity, and conducted immunity. In those tests, my approach is to make all the mechanisms at play in causing the problem (and there are often multiple mechanisms that interact with each other) orthogonal to each other, meaning independent, so I can fix one at a time and know how much of the problem was due to each mechanism. This is not done on the standard test setup but on an engineering bench using techniques I developed over the years. Some of these are described on my website and more are in my courses (like the one at the end of this month), in more detail. Debugging an immunity problem using the standards-based test, like applying ESD while trying to find the ESD problem, generally is very time consuming and usually does not lead to understanding of the mechanisms. People try to do this and often find something that works, but they rarely understand the total effect of what was done and that can lead to more problems in the field later on. This approach is like throwing darts at the wall with the target covered by a sheet. Design of experiments is extremely important but sometimes ignored in the engineering world. Doug [https://lh4.googleusercontent.com/_HuR3Ky2TF_XhFHyxnYRmiq7nHQldnMsPNYFaLG6kb5T4y8MeCe-BDC_BscJtSFgszSSjssihHS-pjM3-jwNP8S0CwE-gN8fsRsPkojiAlmpBwb20vIVizS-siCUywW_jqrefbVr] ________________________________ ________________________________ This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. 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