DCIF is the i.MX94 Display Controller Interface which is used to drive a TFT LCD panel or connects to a display interface depending on the chip configuration.
Signed-off-by: Laurentiu Palcu <laurentiu.pa...@oss.nxp.com> --- .../bindings/display/imx/nxp,imx94-dcif.yaml | 93 +++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml new file mode 100644 index 0000000000000..207ddf0f550df --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2025 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX94 Display Control Interface (DCIF) + +maintainers: + - Laurentiu Palcu <laurentiu.pa...@oss.nxp.com> + +description: + The Display Control Interface(DCIF) is a system master that fetches graphics + stored in memory and displays them on a TFT LCD panel or connects to a + display interface depending on the chip configuration. + +properties: + compatible: + const: nxp,imx94-dcif + + reg: + maxItems: 1 + + interrupts: + items: + - description: + Interrupt output for CPU domain 0 (controlled by common registers group). + - description: + Interrupt output for CPU domain 1 (controlled by background layer registers group). + - description: + Interrupt output for CPU domain 2 (controlled by foreground layer registers group). + + interrupt-names: + items: + - const: common + - const: bg_layer + - const: fg_layer + + clocks: + items: + - description: APB bus clock + - description: AXI bus clock + - description: Pixel clock + + clock-names: + items: + - const: apb + - const: axi + - const: pix + + power-domains: + maxItems: 1 + + nxp,blk-ctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: A phandle which points to NXP displaymix blk-ctrl. + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Display Pixel Interface(DPI) output port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + display-controller@4b120000 { + compatible = "nxp,imx94-dcif"; + reg = <0x0 0x4b120000 0x0 0x300000>; + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "common", "bg_layer", "fg_layer"; + clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>; + clock-names = "apb", "axi", "pix"; + assigned-clocks = <&dispmix_csr 0>; + assigned-clock-parents = <&ldb_pll_pixel>; + power-domains = <&scmi_devpd 11>; + nxp,blk-ctrl = <&dispmix_csr>; + + port { + dcif_out: endpoint { + remote-endpoint = <&ldb_in>; + }; + }; + }; + }; -- 2.34.1
