[PATCH v2 05/10] drm/bridge: fsl-ldb: Add support for i.MX94

[Laurentiu Palcu]

i.MX94 series LDB controller shares the same LDB and LVDS control
registers as i.MX8MP and i.MX93 but supports a higher maximum clock
frequency.

Add a 'max_clk_khz' member to the fsl_ldb_devdata structure in order to
be able to set different max frequencies for other platforms.

Signed-off-by: Laurentiu Palcu <laurentiu.pa...@oss.nxp.com>
---
 drivers/gpu/drm/bridge/fsl-ldb.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c
index 665053d0cb79d..4052e1ea9201f 100644
--- a/drivers/gpu/drm/bridge/fsl-ldb.c
+++ b/drivers/gpu/drm/bridge/fsl-ldb.c
@@ -57,6 +57,7 @@ enum fsl_ldb_devtype {
        IMX6SX_LDB,
        IMX8MP_LDB,
        IMX93_LDB,
+       IMX94_LDB,
 };
 
 struct fsl_ldb_devdata {
@@ -64,21 +65,31 @@ struct fsl_ldb_devdata {
        u32 lvds_ctrl;
        bool lvds_en_bit;
        bool single_ctrl_reg;
+       u32 max_clk_khz;
 };
 
 static const struct fsl_ldb_devdata fsl_ldb_devdata[] = {
        [IMX6SX_LDB] = {
                .ldb_ctrl = 0x18,
                .single_ctrl_reg = true,
+               .max_clk_khz = 80000,
        },
        [IMX8MP_LDB] = {
                .ldb_ctrl = 0x5c,
                .lvds_ctrl = 0x128,
+               .max_clk_khz = 80000,
        },
        [IMX93_LDB] = {
                .ldb_ctrl = 0x20,
                .lvds_ctrl = 0x24,
                .lvds_en_bit = true,
+               .max_clk_khz = 80000,
+       },
+       [IMX94_LDB] = {
+               .ldb_ctrl = 0x04,
+               .lvds_ctrl = 0x08,
+               .lvds_en_bit = true,
+               .max_clk_khz = 165000,
        },
 };
 
@@ -270,8 +281,9 @@ fsl_ldb_mode_valid(struct drm_bridge *bridge,
                   const struct drm_display_mode *mode)
 {
        struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge);
+       u32 ch_max_clk_khz = fsl_ldb->devdata->max_clk_khz;
 
-       if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 160000 : 80000))
+       if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 2 * ch_max_clk_khz : 
ch_max_clk_khz))
                return MODE_CLOCK_HIGH;
 
        return MODE_OK;
@@ -377,6 +389,8 @@ static const struct of_device_id fsl_ldb_match[] = {
          .data = &fsl_ldb_devdata[IMX8MP_LDB], },
        { .compatible = "fsl,imx93-ldb",
          .data = &fsl_ldb_devdata[IMX93_LDB], },
+       { .compatible = "fsl,imx94-ldb",
+         .data = &fsl_ldb_devdata[IMX94_LDB], },
        { /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, fsl_ldb_match);
-- 
2.34.1