Hello, some questions

Le 20/01/2026 à 10:56, Alejandro Vallejo a écrit :
> With the threshold initialised to 1 the guest exits at the first
> buslock. Initialising as zero is invalid and causes an immediate exit.
>
> Signed-off-by: Alejandro Vallejo <[email protected]>
> ---
>   xen/arch/x86/hvm/svm/svm.c  | 4 ++++
>   xen/arch/x86/hvm/svm/vmcb.c | 6 ++++++
>   2 files changed, 10 insertions(+)
>
> diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
> index 9748df87d8..dbb7f99d5e 100644
> --- a/xen/arch/x86/hvm/svm/svm.c
> +++ b/xen/arch/x86/hvm/svm/svm.c
> @@ -3087,6 +3087,10 @@ void asmlinkage svm_vmexit_handler(void)
>           hvm_descriptor_access_intercept(0, 0, desc, write);
>           break;
>       }
> +    case VMEXIT_BUSLOCK:
> +        perfc_incr(buslock);
> +        vmcb->bus_lock_thresh = 1;
> +        break;
>
>       default:
>       unexpected_exit_type:
> diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
> index cbee10d046..7a19b1ab61 100644
> --- a/xen/arch/x86/hvm/svm/vmcb.c
> +++ b/xen/arch/x86/hvm/svm/vmcb.c
> @@ -66,6 +66,12 @@ static int construct_vmcb(struct vcpu *v)
>           GENERAL2_INTERCEPT_XSETBV      | GENERAL2_INTERCEPT_ICEBP       |
>           GENERAL2_INTERCEPT_RDPRU;
>
> +    if ( cpu_has_bus_lock_thresh )
> +    {
> +        vmcb->_general3_intercepts = GENERAL3_INTERCEPT_BUS_LOCK_THRESH;
> +        vmcb->bus_lock_thresh = 1; /* trigger immediately */
> +    }
> +
>       /* Intercept all debug-register writes. */
>       vmcb->_dr_intercepts = ~0u;
>

According to APM,

INTERCEPT_BUS_LOCK_THRESH does
 > Intercept bus lock operations when Bus Lock Threshold Counter is 0

I assume that when set to 0, we intercept all bus locks, so if set to 1,
every 2 bus lock (since we first go from 1 to 0, then at 0 we intercept
the next one) ?

I think we want that to be tunable, as intercepting all bus locks may be
too extreme we probably want to intercept every few ones instead.

Teddy


--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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