On 20/01/2026 9:53 am, Alejandro Vallejo wrote:
> diff --git a/xen/arch/x86/hvm/svm/vmcb.h b/xen/arch/x86/hvm/svm/vmcb.h
> index ba554a9644..85e194f247 100644
> --- a/xen/arch/x86/hvm/svm/vmcb.h
> +++ b/xen/arch/x86/hvm/svm/vmcb.h
> @@ -65,6 +65,11 @@ enum GenericIntercept2bits
> GENERAL2_INTERCEPT_RDPRU = 1 << 14,
> };
>
> +/* general 2 intercepts */
> +enum GenericIntercept3bits
> +{
> + GENERAL3_INTERCEPT_BUS_LOCK_THRESH = 1 << 5,
> +};
Abbreviating thresh like this not great.
For the intercept, it can probably just be called BUS_LOCK. There's no
other form of such intercept.
>
> /* control register intercepts */
> enum CRInterceptBits
> @@ -289,6 +294,7 @@ enum VMEXIT_EXITCODE
> VMEXIT_MWAIT_CONDITIONAL= 140, /* 0x8c */
> VMEXIT_XSETBV = 141, /* 0x8d */
> VMEXIT_RDPRU = 142, /* 0x8e */
> + VMEXIT_BUSLOCK = 165, /* 0xa5 */
VMEXIT_BUS_LOCK for consistency.
> /* Remember to also update VMEXIT_NPF_PERFC! */
> VMEXIT_NPF = 1024, /* 0x400, nested paging fault */
> /* Remember to also update SVM_PERF_EXIT_REASON_SIZE! */
> @@ -405,7 +411,8 @@ struct vmcb_struct {
> u32 _exception_intercepts; /* offset 0x08 - cleanbit 0 */
> u32 _general1_intercepts; /* offset 0x0C - cleanbit 0 */
> u32 _general2_intercepts; /* offset 0x10 - cleanbit 0 */
> - u32 res01[10];
> + u32 _general3_intercepts; /* offset 0x14 - cleanbit 0 */
> + u32 res01[9];
> u16 _pause_filter_thresh; /* offset 0x3C - cleanbit 0 */
> u16 _pause_filter_count; /* offset 0x3E - cleanbit 0 */
> u64 _iopm_base_pa; /* offset 0x40 - cleanbit 1 */
> @@ -489,7 +496,10 @@ struct vmcb_struct {
> u64 nextrip; /* offset 0xC8 */
> u8 guest_ins_len; /* offset 0xD0 */
> u8 guest_ins[15]; /* offset 0xD1 */
> - u64 res10a[100]; /* offset 0xE0 pad to save area */
> + u64 res10a[8]; /* offset 0xE0 */
> + u16 bus_lock_thresh; /* offset 0x120 */
bus_lock_count, which is basically it's APM name anyway.
> diff --git a/xen/arch/x86/include/asm/hvm/svm.h
> b/xen/arch/x86/include/asm/hvm/svm.h
> index a6d7e4aed3..14fe4abf96 100644
> --- a/xen/arch/x86/include/asm/hvm/svm.h
> +++ b/xen/arch/x86/include/asm/hvm/svm.h
> @@ -37,6 +37,7 @@ extern u32 svm_feature_flags;
> #define SVM_FEATURE_VGIF 16 /* Virtual GIF */
> #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */
> #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */
> +#define SVM_FEATURE_BUS_LOCK_THRESH 29 /* Bus Lock Threshold */
>
> static inline bool cpu_has_svm_feature(unsigned int feat)
> {
> @@ -56,6 +57,7 @@ static inline bool cpu_has_svm_feature(unsigned int feat)
> #define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
> #define cpu_has_svm_sss cpu_has_svm_feature(SVM_FEATURE_SSS)
> #define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL)
> +#define cpu_has_bus_lock_thresh
> cpu_has_svm_feature(SVM_FEATURE_BUS_LOCK_THRESH)
We actually discussed this on the x86 call just yesterday. This wants
an svm infix to match the others, and the thresh suffix can be dropped.
I can fix all of these on commit.
~Andrew
