Hi,

this is currently not possible without changing the UHD core manually and re-routing those GPIO lines in the Verilog core code. Some years ago I opened a feature request, it contains some hints on what others tried and what would be required. Unfortunately, I never got an answer.

Would be wonderful if you could support that by voting on the issue and express your interest there. Or if you manage to get it working, share your solution with a PR.

Here is the link: https://github.com/EttusResearch/uhd/issues/666

Best regards
Philipp


Am 3.2.25 um 9:00 schrieb meni.d...@sabra-microsystems.com:

Hello,

I need to establish direct routing between the USRP X410's front panel GPIO pins and custom RFNoC blocks.

Specifically, I want to read the GPIO signals directly into my RFNoC block.

Does anyone have experience implementing such direct GPIO-to-RFNoC connection on the X410?

Any examples or technical documentation would be helpful.

Thanks


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