On 10/28/2020 09:07 PM, Barry Duggan via USRP-users wrote:
Hi Neel,

Thanks for the quick response! As a clarification:

- for half-duplex operation, is the receiver muted (and protected) during transmit?

- I could not find the sample rates on your website.

https://files.ettus.com/manual/page_usrp_b200.html#b200_mcr

It says "ANY value between 5MHz and 61.44MHz", but in reality, it has to be integer, and there are rates that don't work because of the
  PLL architecture--I just can't remember what those restrictions are.

But even if the step size is 10kHz, with integer decimation implemented in the FPGA, that's really a lot of different supported sample rates.

Normally UHD will pick a master clock rate for you, given the desired sample rate. It will try to pick the highest multiple of your desired sample rate that is also a a multiple of two. Sometimes, you'd rather it not try to be "clever", so you specify the master clock
  rate as a device argument and set sample rates accordingly.



_______________________________________________
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Reply via email to