No, it was a 3.3V CMOS variant of that IC. I cannot figure it out as I
would have to take the hardware apart.
Am 27.09.2019 um 09:30 schrieb Daniel Jepson via USRP-users:
Fabian,
I noticed on the SN74LS125A datasheet the minimum input voltage is
4.75V. Is this the correct part that you're using?
-Daniel
On Fri, Sep 27, 2019 at 9:27 AM Daniel Jepson <daniel.jep...@ettus.com
<mailto:daniel.jep...@ettus.com>> wrote:
Thanks Fabian. As long as the input PPS is driven by the same RefClk
that is provided to the X310, this system should be ok. You might
also consider driving the PPS on the falling edge of the RefClk to
ensure timing is met at the X310. There are some timing constraints
here that might affect performance, but I wouldn't expect to see a
10 ns shift.
-Daniel
On Thu, Sep 26, 2019 at 3:18 PM Fabian Schwartau via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
It is a self build device using a 74LS125D as buffer. The level
is 3.3V
digital.
As there were no specifications around for the required input
levels at
the time we needed the device, we just measured the levels
coming from
the 1PPS output and replicated them.
Am 26.09.2019 um 13:51 schrieb Daniel Jepson via USRP-users:
> Hi Fabian, Cherif,
>
> What is the external PPS device you are using?
>
> -Daniel
>
> On Thu, Sep 26, 2019 at 9:18 AM Fabian Schwartau via USRP-users
> <usrp-users@lists.ettus.com
<mailto:usrp-users@lists.ettus.com>
<mailto:usrp-users@lists.ettus.com
<mailto:usrp-users@lists.ettus.com>>> wrote:
>
> Hi,
> I have very similar problem with X310. I am running a C++
application,
> so I have a bit more flexibility I guess. After I do the
> set_time_unknown_pps to sync to the 1PPS signal, I run
the function
> get_time_last_pps and it sometimes has an offset of 10ns
(it was 5ns
> for
> an old firmware due to a bug, which was fixed a few weeks
ago). If that
> is the case I just do the sync again until the offset is
zero.
> I don't know if it is an firmawre problem or if it is
because the
> signal
> integrety of the 1PPS signal is not good enough.
> Maybe that is also a solution for you.
> Best regards,
> Fabian
>
> Am 25.09.2019 um 11:16 schrieb Cherif Diouf via USRP-users:
> > Hello,
> > I am working with the X310 USRP. I have two identical
custom blocks
> > feeding the RF frontends.
> >
> > flowchart
> > -----------------
> > HW Block1 -> RF0-TX1 |---<
> > HW Block2 -> RF1-TX1 |---<
> >
> > The system is synchronized to an external PPS
reference. The
> sampling
> > rate is 200 MSps and the signal bandwidth is 160 MHz
for both
> channels.
> > The two HW blocks start transmitting at the exactly
same time. Time
> > resolution is 5ns.
> > In most cases the two outgoing RF signals present a
1ns time offset.
> > Which can be understood as a phase offset.
> >
> > But From time to time there is a 6ns delay between the
channels. I
> > assume this 6ns comprises the 1ns delay due to phase
offset + 5
> ns delay
> > due to misalignment of outgoing samples.
> >
> > What could be the origin of this one sample
misalignement? Is it
> a way
> > to fix it? Or working close to the limits of the
device should such
> > behavior be expected?
> >
> > Thanks in advance
> >
> > Best Regards
> > Cherif
> >
> >
> > _______________________________________________
> > USRP-users mailing list
> > USRP-users@lists.ettus.com
<mailto:USRP-users@lists.ettus.com>
<mailto:USRP-users@lists.ettus.com
<mailto:USRP-users@lists.ettus.com>>
> >
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
> >
>
> --
> --------------------------------------------------
> M.-Sc. Fabian Schwartau
> Technische Universität Braunschweig
> Institut für Hochfrequenztechnik
> Schleinitzstr. 22
> 38106 Braunschweig
> Germany
>
> Tel.: +49-(0)531-391-2017
> Fax: +49-(0)531-391-2045
> Email: fabian.schwar...@ihf.tu-bs.de
<mailto:fabian.schwar...@ihf.tu-bs.de>
> <mailto:fabian.schwar...@ihf.tu-bs.de
<mailto:fabian.schwar...@ihf.tu-bs.de>>
> WWW: http://www.tu-braunschweig.de/ihf
> --------------------------------------------------
>
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>
>
>
> --
>
> Daniel Jepson
>
> Digital Hardware Engineer
>
> National Instruments
>
> O: +1.512.683.6163
>
> daniel.jep...@ni.com <mailto:daniel.jep...@ni.com>
<mailto:daniel.jep...@ni.com <mailto:daniel.jep...@ni.com>>
>
>
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--
--------------------------------------------------
M.-Sc. Fabian Schwartau
Technische Universität Braunschweig
Institut für Hochfrequenztechnik
Schleinitzstr. 22
38106 Braunschweig
Germany
Tel.: +49-(0)531-391-2017
Fax: +49-(0)531-391-2045
Email: fabian.schwar...@ihf.tu-bs.de
<mailto:fabian.schwar...@ihf.tu-bs.de>
WWW: http://www.tu-braunschweig.de/ihf
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Digital Hardware Engineer
National Instruments
O: +1.512.683.6163
daniel.jep...@ni.com <mailto:daniel.jep...@ni.com>
--
Daniel Jepson
Digital Hardware Engineer
National Instruments
O: +1.512.683.6163
daniel.jep...@ni.com <mailto:daniel.jep...@ni.com>
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--
--------------------------------------------------
M.-Sc. Fabian Schwartau
Technische Universität Braunschweig
Institut für Hochfrequenztechnik
Schleinitzstr. 22
38106 Braunschweig
Germany
Tel.: +49-(0)531-391-2017
Fax: +49-(0)531-391-2045
Email: fabian.schwar...@ihf.tu-bs.de
WWW: http://www.tu-braunschweig.de/ihf
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