Hi,
> Well if the phase difference is constant then i can manage it, but if it is
> random then I have a problem?
>
> There is high residual mutual phase-noise between B205s in this scenario.
> So, not useful for applications that require
> phase-coherence.
If you're ok with a bit of soldering ...
I'm wondering if using one of the GPIO of the FPGA, connect it through
a loop filter to the vctxo control pin, then inside the fpga,
implement a phase detector (basically divide 40M / 4 and xor that with
10M ...) and output that.
You would then use the DAC for the 'coarse' tuning, then be able to
switch to a phase tracking mode when close enough.
Just a thought ...
Cheers,
Sylvain
PS: To make it clear, this will void your warranty, I'm not affiliated
with ettus and this is definitely not any kind of official advice.
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