Hi,

I didn't see the screenshots (not posted to the list ?)

But if absolute precision of the clock doesn't matter, you might be better
off disabling the servo loop once it's "close enough". That will require
fpga modifications to expose the refpll control though.
Actually I think this would be a nice improvement in general for the b205
to have the DAC value exposed in UHD and allow to enable/disable the servo
loop, just a thought :p

Cheers,

    Sylvain Munaut
_______________________________________________
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Reply via email to