Hi,
Before I spend possibly hours tracing this, I was wondering if someone
had an obvious reason for which the FPGA base design size for the B200
increases significantly between 3.9 and 3.13 ?
Just a few examples :
Number used as Memory: 4004 out of 11072 36%
Number used as Memory: 5440 out of 11072 49%
Number of LUT Flip Flop pairs used: 24062
Number of LUT Flip Flop pairs used: 29549
Number of Block RAM/FIFO: 144 out of 172 83%
Number of Block RAM/FIFO: 170 out of 172 98%
AFAIK, the b200 hasn't really gained much (anything ?) in
functionality so ... am I missing something?
Cheers,
Sylvain
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