On 06/18/2018 10:57 AM, Дмитрий Михайличенко via USRP-users wrote:
Is it important to have PPS signal aligned with reference 10 MHz
signal. In my case they come from different sources.
thanks,
Dmitry?
Something to be aware of though is that trying to achieve fine phase
synchronization (with predictable phase offset) between two
entirely-different synthesizer types is not likely to be all that
satisfying.
Different types of synthesizers will interpret the re-synch pulse sent
by the FPGA in slightly different ways, so achieving very-tight
synchronization between different board types is not likely to work.
пн, 18 июн. 2018 г. в 17:37, Marcus D. Leech via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>>:
On 06/18/2018 10:28 AM, Дмитрий Михайличенко via USRP-users wrote:
The frequency is around 600 MHz. I also tried higher frequencies.
The offset is visible on picture attached.
thanks,
Dmitry
If you look here:
https://kb.ettus.com/UBX
You can see that for frequencies below 1GHz, you have to use a
20MHz daughterboard clock for UBX to achieve synchronization.
I don't know if SBX will work correctly with a 20MHz
daughterboard clock, so you can't have "mixed" UBX + SBX on the same
X310.
Also, integer-N tuning can help maintain better phase
synchronization characteristics:
https://files.ettus.com/manual/structuhd_1_1tune__request__t.html
пн, 18 июн. 2018 г. в 14:50, Дмитрий Михайличенко
<mdm...@gmail.com <mailto:mdm...@gmail.com>>:
Hi,
I have a couple of X310 each of them has UBX+SBX cards. The
devices are synchronized by external 10MHz + PPS signal. But
in my test I see random phase delay between all channels that
varies between test runs. The test creates multi usrp device,
sets up time and tunes to the same frequency using timed
command, then it captures some buffers. The same external
signal is supplied to all antenna ports. Is it expected to
have random delay between channels? Is there any way to have
constant phase delay from run to run?
thanks,
Dmitry
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