Hello Koen:

As Ian requested, could you please provide additional detail on exactly
what you're trying to do?

Are you merely trying to access the 64-bit FPGA VITA time from within the
RFNoC block?

Which device are you using?

--​Neel Pandeya




On 5 June 2018 at 09:24, Ian Buckley via USRP-users <
usrp-users@lists.ettus.com> wrote:

> Koen,
> Can you expand a little on the functionality you need pls, its not fully
> clear enough to me to make a suggestion.
> Are you trying to extract time from incoming samples or apply time to
> samples you are processing?
> -Ian
>
>
> On Jun 5, 2018, at 7:36 AM, TIMMEN Koen via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
> Hello all,
>
> Currently I’m working on a RFNoC block that requires a known time
> reference, but I have trouble making this value available. Ideally I would
> like to have the value available in a register designated to the block.
>
> As I understand, a time reference is available through the CHDR, but.. not
> all the time? It is optional I read in the manual. Is this a toggle that
> can be set by the user?
>
> Or is there another way that I am able to obtain the device time reference
> available in a user register?
>
> Kind regards,
>
> Koen
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
>
> _______________________________________________
> USRP-users mailing list
> USRP-users@lists.ettus.com
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
_______________________________________________
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Reply via email to