Hello everyone, I'm looking for a way to drive the GPIO outputs on my x310 with a clock output divided down from the sample clock (or multiplied up from 1 PPS), which I would use to drive an external switch.
I'm hoping for tight, deterministic timing, so I'm skeptical of manual API calls routed through the host for each clock transition. I don't see support for other options in the UHD GPIO API documentation, so I'm guessing I'd need to do this with custom FPGA logic (though please correct me if I'm wrong!). Is anyone aware of any literature or example projects that have implemented something like this? Thanks! Dan
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