On Wed, Sep 26, 2012 at 04:04:15PM -0400, Andrew Bradford wrote:
> If configured to use UART{1,2,4,5}, such as on the Beaglebone RS232
> cape, enable the proper pin-muxing as per the RS232 cape configuration.
>
> Signed-off-by: Andrew Bradford <and...@bradfordembedded.com>
> ---
> arch/arm/cpu/armv7/am33xx/board.c | 14 +++++++++
> arch/arm/include/asm/arch-am33xx/sys_proto.h | 6 +++-
> board/ti/am335x/mux.c | 43
> ++++++++++++++++++++++++++
> 3 files changed, 62 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/armv7/am33xx/board.c
> b/arch/arm/cpu/armv7/am33xx/board.c
> index ecc2671..32d1da4 100644
> --- a/arch/arm/cpu/armv7/am33xx/board.c
> +++ b/arch/arm/cpu/armv7/am33xx/board.c
> @@ -152,7 +152,21 @@ void s_init(void)
> /* UART softreset */
> u32 regVal;
>
> +#ifdef CONFIG_SERIAL1
> enable_uart0_pin_mux();
> +#endif /* CONFIG_SERIAL1 */
> +#ifdef CONFIG_SERIAL2
> + enable_uart1_pin_mux();
> +#endif /* CONFIG_SERIAL2 */
> +#ifdef CONFIG_SERIAL3
> + enable_uart2_pin_mux();
> +#endif /* CONFIG_SERIAL3 */
Same thing here about UART3
> +#ifdef CONFIG_SERIAL5
> + enable_uart4_pin_mux();
> +#endif /* CONFIG_SERIAL5 */
> +#ifdef CONFIG_SERIAL6
> + enable_uart5_pin_mux();
> +#endif /* CONFIG_SERIAL6 */
>
> regVal = readl(&uart_base->uartsyscfg);
> regVal |= UART_RESET;
> diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h
> b/arch/arm/include/asm/arch-am33xx/sys_proto.h
> index 819ea65..4852127 100644
> --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
> +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
> @@ -53,11 +53,15 @@ void ddr_pll_config(unsigned int ddrpll_M);
>
> /*
> * We have three pin mux functions that must exist. We must be able to
> enable
> - * uart0, for initial output and i2c0 to read the main EEPROM. We then have
> a
> + * a uart for initial output and i2c0 to read the main EEPROM. We then have
> a
> * main pinmux function that can be overridden to enable all other pinmux
> that
> * is required on the board.
> */
> void enable_uart0_pin_mux(void);
> +void enable_uart1_pin_mux(void);
> +void enable_uart2_pin_mux(void);
> +void enable_uart4_pin_mux(void);
> +void enable_uart5_pin_mux(void);
> void enable_i2c0_pin_mux(void);
> void enable_board_pin_mux(struct am335x_baseboard_id *header);
> #endif
> diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
> index 80becd5..db47d0e 100644
> --- a/board/ti/am335x/mux.c
> +++ b/board/ti/am335x/mux.c
> @@ -259,6 +259,30 @@ static struct module_pin_mux uart0_pin_mux[] = {
> {-1},
> };
>
> +static struct module_pin_mux uart1_pin_mux[] = {
> + {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
> + {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
> + {-1},
> +};
> +
> +static struct module_pin_mux uart2_pin_mux[] = {
> + {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
> + {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
> + {-1},
> +};
> +
> +static struct module_pin_mux uart4_pin_mux[] = {
> + {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
> + {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
> + {-1},
> +};
> +
> +static struct module_pin_mux uart5_pin_mux[] = {
> + {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
> + {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
> + {-1},
> +};
> +
> static struct module_pin_mux mmc0_pin_mux[] = {
> {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
> {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
> @@ -381,6 +405,25 @@ void enable_uart0_pin_mux(void)
> configure_module_pin_mux(uart0_pin_mux);
> }
>
> +void enable_uart1_pin_mux(void)
> +{
> + configure_module_pin_mux(uart1_pin_mux);
> +}
> +
> +void enable_uart2_pin_mux(void)
> +{
> + configure_module_pin_mux(uart2_pin_mux);
> +}
> +
> +void enable_uart4_pin_mux(void)
> +{
> + configure_module_pin_mux(uart4_pin_mux);
> +}
> +
> +void enable_uart5_pin_mux(void)
> +{
> + configure_module_pin_mux(uart5_pin_mux);
> +}
>
> void enable_i2c0_pin_mux(void)
> {
> --
> 1.7.10
>
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