u-boot version: u-boot-2010.12
My OR and BR register values(according to our memory map):
BR0 0xFF800C21 OR0 0xFF800396
BR1 0xE8000801 OR1 0xFFFF8074
BR2 0xE8009001 OR2 0xFFFF8074
after defining VERBOSE_DEBUG in drivers/mtd/nand/fsl_elbc_nand.c
i gave sacveenv command, igot below logs.
please go through that and resolve asap.
Hit any key to stop autoboot: 0
=> saveenv
Saving Environment to NAND...
Erasing Nand...
nand_erase_opts_1
nand_erase_opts_2
erase_length = 3
erase.addr = 0
meminfo->erasesize = 540672
**********************************************************erase_length =
3 erase.addr = 0 meminfo->erasesize = 540672
skipping bad block =
0
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=4e000000
fcr=70000000
DEBUG: fsl_elbc_run_command: fbar=00000000 fpar=00000000 fbcr=00000001
bank=0
DEBUG: fsl_elbc_run_command: stat=40000001 mdr=00000000
fmr=0000f020
Page size =
0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) =
fffffffb
DEBUG: fsl_elbc_cmdfunc: NAND_CMD_ERASE1, page_addr:
0x420.
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
DEBUG: fsl_elbc_cmdfunc:
NAND_CMD_ERASE2.
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=c2500000
fcr=60d00000
DEBUG: fsl_elbc_run_command: fbar=00000021 fpar=00000000 fbcr=00000000
bank=0
DEBUG: fsl_elbc_run_command: stat=00000000 mdr=00000000
fmr=0000f023
Page size =
0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) =
fffffffb
ctrl->status=
0
---------------------------------------------------
result =
-5
NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
erase_length = 3 erase.addr = 0 meminfo->erasesize = 557056
skipping bad block = 0
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=4e000000
fcr=70000000
DEBUG: fsl_elbc_run_command: fbar=00000000 fpar=00000000 fbcr=00000001
bank=0
DEBUG: fsl_elbc_run_command: stat=00000000 mdr=00000000
fmr=0000f023
Page size =
0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) =
fffffffb
DEBUG: fsl_elbc_cmdfunc: NAND_CMD_ERASE1, page_addr:
0x440.
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
DEBUG: fsl_elbc_cmdfunc:
NAND_CMD_ERASE2.
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=c2500000
fcr=60d00000
DEBUG: fsl_elbc_run_command: fbar=00000022 fpar=00000000 fbcr=00000000
bank=0
DEBUG: fsl_elbc_run_command: stat=40000001 mdr=00000000
fmr=0000f020
Page size =
0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) =
fffffffb
ctrl->status=
40000001
---------------------------------------------------
result =
-5
NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
erase_length = 3 erase.addr = 0 meminfo->erasesize = 573440
skipping bad block = 0
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=4e000000
fcr=70000000
DEBUG: fsl_elbc_run_command: fbar=00000000 fpar=00000000 fbcr=00000001
bank=0
DEBUG: fsl_elbc_run_command: stat=00000000 mdr=00000000
fmr=0000f023
Page size =
0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) = fffffffb
DEBUG: fsl_elbc_cmdfunc: NAND_CMD_ERASE1, page_addr: 0x460.
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
DEBUG: fsl_elbc_cmdfunc: NAND_CMD_ERASE2.
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=c2500000 fcr=60d00000
DEBUG: fsl_elbc_run_command: fbar=00000023 fpar=00000000 fbcr=00000000
bank=0
DEBUG: fsl_elbc_run_command: stat=40000001 mdr=00000000 fmr=0000f023
Page size = 0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) = fffffffb
ctrl->status= 40000001
---------------------------------------------------
result = -5
NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
nand_erase_opts_3
Writing to Nand... nand_write
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=4e000000 fcr=70000000
DEBUG: fsl_elbc_run_command: fbar=00000000 fpar=00000000 fbcr=00000001
bank=0
DEBUG: fsl_elbc_run_command: stat=00000000 mdr=00000000 fmr=0000f023
Page size = 0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) = fffffffb
DEBUG: fsl_elbc_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG, page_addr: 0x420,
column: 0x0.
DEBUG: set_addr: bank=0, ctrl->addr=0xff800000 (0xff800000), index 0,
pes 14 ps 9
DEBUG: fsl_elbc_cmdfunc: NAND_CMD_PAGEPROG writing 528 bytes.
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=c6128d00 fcr=00108000
DEBUG: fsl_elbc_run_command: fbar=00000021 fpar=00000000 fbcr=00000000
bank=0
DEBUG: fsl_elbc_run_command: stat=40000001 mdr=00000000 fmr=0000f020
Page size = 0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) = fffffffb
DEBUG: set_addr: bank=7, ctrl->addr=0xff801c00 (0xff800000), index 206,
pes 14 ps 9
fsl_elbc_run_command
DEBUG: fsl_elbc_run_command: fmr=0000f023 fir=c12e0000 fcr=50000000
DEBUG: fsl_elbc_run_command: fbar=00ffffff fpar=00007e06 fbcr=00000003
bank=0
DEBUG: fsl_elbc_run_command: stat=00000000 mdr=00000000 fmr=0000f023
Page size = 0
ctrl->status(ctrl->status == LTESR_CC ? 0 : -EIO) = fffffffb
ctrl->status= 0
FAILED!
I am expecting your response at earliest.
manukumar
signal-networks
On Tue, 2012-05-22 at 12:56 -0500, Scott Wood wrote:
> On 05/22/2012 09:15 AM, Marek Vasut wrote:
> > Dear Manukumar,
> >
> >> Hello,
> >
> > CCing someone who might actually help you, CCing the uboot mailing list,
> > please
> > keep it that way.
> >
> >> i can able to detect nand flash.
> >> but i had an issue that i could not do operation(Read/write)
> >> on nand flash.
> >> i tried to erase the nand flash i got the error as below:
> >>
> >> NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
> >> NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
> >> NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
> >> NAND 32MiB 3,3V 8-bit: MTD Erase failure: -5
> >>
> >> even if i try to saveenv then also is not saving the envionment
> >> variables
> >>
> >> processor used: P1012
> >> nand flash: samsung K9F5608U0D
> >>
> >> please reply ASAP.
> >>
> >> manukumar
> >> signal-networks
>
> What version of U-Boot is this?
>
> How are you configuring BRn/ORn for this chipselect?
>
> Could you define VERBOSE_DEBUG at the top of
> drivers/mtd/nand/fsl_elbc_nand.c?
>
> -Scott
>
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
