On Fri, Nov 11, 2011 at 11:12 AM, Ira W. Snyder <i...@ovro.caltech.edu> wrote: > Yep, this is a P2020. > > I'll check the Freescale documentation. Hopefully it provides an example > of how to configure the On-Chip ROM to use L2SRAM instead of DDR. > > I'll try and find a U-Boot port that configures DDR via SPD. I'm sure > there are plenty, however any hints are welcome. :)
For an example the P2020DS works like this... I've attached the boot-format dat file as well. -M
config_sram_p2020ds.dat
Description: config_sram_p2020ds.dat
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