On 11/07/11 22:05, Tom Rini wrote:
> This introduces 200MHz Micron parts timing information based on x-loader
> to <asm/arch-omap3/mem.h>. The memory init logic is also based on what
> x-loader does in these cases. Note that while previously u-boot would
> be flashed in with SW ECC in this case it now must be flashed with HW
> ECC.
>
> Cc: Dirk Behme <dirk.be...@gmail.com>
> Beagleboard rev C5, xM rev A:
> Tested-by: Tom Rini <tr...@ti.com>
> Beagleboard xM rev C:
> Tested-by: Matt Ranostay <mranos...@gmail.com>
> Beagleboard rev B7, C2, xM rev B:
> Tested-by: Matt Porter <mpor...@ti.com>
> Signed-off-by: Tom Rini <tr...@ti.com>
> ---
> arch/arm/include/asm/arch-omap3/mem.h | 23 ++++++++++
> board/ti/beagle/beagle.c | 72
> ++++++++++++++++++++++++++++++++-
> board/ti/beagle/config.mk | 33 ---------------
> include/configs/omap3_beagle.h | 55 +++++++++++++++++++++++++
> 4 files changed, 148 insertions(+), 35 deletions(-)
> delete mode 100644 board/ti/beagle/config.mk
>
> diff --git a/arch/arm/include/asm/arch-omap3/mem.h
> b/arch/arm/include/asm/arch-omap3/mem.h
> index 8c6dc3f..f467ba9 100644
> --- a/arch/arm/include/asm/arch-omap3/mem.h
> +++ b/arch/arm/include/asm/arch-omap3/mem.h
> @@ -159,6 +159,29 @@ enum {
> (MICRON_CASL_165 << 4) | (MICRON_SIL_165 << 3) | \
> (MICRON_BL_165))
>
> +/* Micron part (200MHz optimized) 5 ns */
> +#define MICRON_TDAL_200 6
> +#define MICRON_TDPL_200 3
> +#define MICRON_TRRD_200 2
> +#define MICRON_TRCD_200 3
> +#define MICRON_TRP_200 3
> +#define MICRON_TRAS_200 8
> +#define MICRON_TRC_200 11
> +#define MICRON_TRFC_200 15
> +#define MICRON_V_ACTIMA_200 ((MICRON_TRFC_200 << 27) | \
> + (MICRON_TRC_200 << 22) | (MICRON_TRAS_200 << 18) | \
> + (MICRON_TRP_200 << 15) | (MICRON_TRCD_200 << 12) | \
> + (MICRON_TRRD_200 << 9) | (MICRON_TDPL_200 << 6) | \
> + (MICRON_TDAL_200))
> +
> +#define MICRON_TWTR_200 2
> +#define MICRON_TCKE_200 4
> +#define MICRON_TXP_200 2
> +#define MICRON_XSR_200 23
> +#define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200 << 12) | \
> + (MICRON_XSR_200 << 0) | (MICRON_TXP_200 << 8) | \
> + (MICRON_TWTR_200 << 16))
> +
> /*
> * NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
> * ACTIMA
> diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
> index 9482c5e..4ab2d8e 100644
> --- a/board/ti/beagle/beagle.c
> +++ b/board/ti/beagle/beagle.c
> @@ -1,5 +1,5 @@
> /*
> - * (C) Copyright 2004-2008
> + * (C) Copyright 2004-2011
> * Texas Instruments, <www.ti.com>
> *
> * Author :
> @@ -34,9 +34,11 @@
> #include <status_led.h>
> #endif
> #include <twl4030.h>
> +#include <linux/mtd/nand.h>
> #include <asm/io.h>
> #include <asm/arch/mmc_host_def.h>
> #include <asm/arch/mux.h>
> +#include <asm/arch/mem.h>
> #include <asm/arch/sys_proto.h>
> #include <asm/gpio.h>
> #include <asm/mach-types.h>
> @@ -135,6 +137,70 @@ int get_board_revision(void)
> return revision;
> }
>
> +#ifdef CONFIG_SPL_BUILD
> +/*
> + * Routine: board_early_sdrc_init
s/board_early_sdrc_init/get_board_mem_timings/
> + * Description: If we use SPL then there is no x-loader nor config header
> + * so we have to setup the DDR timings outself on both banks.
s/outself/ourself/
> + */
> +void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
> + u32 *mr)
> +{
> + int pop_mfr, pop_id;
> +
> + /*
> + * We need to identify what PoP memory is on the board so that
> + * we know what timings to use. If we can't identify it then
> + * we know it's an xM.
> + */
> + identify_pop_memory(&pop_mfr, &pop_id);
> +
> + /*
> + * We cannot use the MICRON_MCFG_165 as it relies on
> + * PHYS_SDRAM_1_SIZE being defined to the correct value, and we
> + * don't know that value until runtime.
> + */
> + *mr = MICRON_V_MR_165;
> + switch (get_board_revision()) {
> + case REVISION_C4:
> + if ((pop_mfr == NAND_MFR_STMICRO) && (pop_id == 0xba)) {
No need for extra parenthesis.
> + *mcfg = 0x04590099;
> + *ctrla = NUMONYX_V_ACTIMA_165;
> + *ctrlb = NUMONYX_V_ACTIMB_165;
> + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
This will look much better if it will be aligned.
> + break;
> + } else if ((pop_mfr == NAND_MFR_MICRON) && (pop_id == 0xbc)) {
No need for extra parenthesis.
> + /* Beagleboard Rev C5 */
> + *mcfg = 0x03588099;
> + *ctrla = MICRON_V_ACTIMA_200;
> + *ctrlb = MICRON_V_ACTIMB_200;
> + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
This will look much better if it will be aligned.
> + break;
> + }
> + case REVISION_XM_A:
> + case REVISION_XM_B:
> + case REVISION_XM_C:
> + if (pop_mfr == 0) {
> + *mcfg = 0x03588099;
> + *ctrla = MICRON_V_ACTIMA_200;
> + *ctrlb = MICRON_V_ACTIMB_200;
> + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
Same here.
> + } else {
> + *mcfg = 0x04590099;
> + *ctrla = NUMONYX_V_ACTIMA_165;
> + *ctrlb = NUMONYX_V_ACTIMB_165;
> + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
ditto
> + }
> + break;
> + default:
> + *mcfg = 0x02584099;
> + *ctrla = MICRON_V_ACTIMA_165;
> + *ctrlb = MICRON_V_ACTIMB_165;
> + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
ditto
> + }
> +}
> +#endif
> +
> /*
> * Routine: get_expansion_id
> * Description: This function checks for expansion board by checking I2C
> @@ -367,7 +433,7 @@ void set_muxconf_regs(void)
> MUX_BEAGLE();
> }
>
> -#ifdef CONFIG_GENERIC_MMC
> +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
> int board_mmc_init(bd_t *bis)
> {
> omap_mmc_init(0);
> @@ -476,6 +542,7 @@ int ehci_hcd_init(void)
>
> #endif /* CONFIG_USB_EHCI */
>
> +#ifndef CONFIG_SPL_BUILD
> /*
> * This command returns the status of the user button on beagle xM
> * Input - none
> @@ -528,3 +595,4 @@ U_BOOT_CMD(
> "Return the status of the BeagleBoard USER button",
> ""
> );
> +#endif
> diff --git a/board/ti/beagle/config.mk b/board/ti/beagle/config.mk
> deleted file mode 100644
> index cf055db..0000000
> --- a/board/ti/beagle/config.mk
> +++ /dev/null
> @@ -1,33 +0,0 @@
> -#
> -# (C) Copyright 2006
> -# Texas Instruments, <www.ti.com>
> -#
> -# Beagle Board uses OMAP3 (ARM-CortexA8) cpu
> -# see http://www.ti.com/ for more information on Texas Instruments
> -#
> -# See file CREDITS for list of people who contributed to this
> -# project.
> -#
> -# This program is free software; you can redistribute it and/or
> -# modify it under the terms of the GNU General Public License as
> -# published by the Free Software Foundation; either version 2 of
> -# the License, or (at your option) any later version.
> -#
> -# This program is distributed in the hope that it will be useful,
> -# but WITHOUT ANY WARRANTY; without even the implied warranty of
> -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> -# GNU General Public License for more details.
> -#
> -# You should have received a copy of the GNU General Public License
> -# along with this program; if not, write to the Free Software
> -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> -# MA 02111-1307 USA
> -#
> -# Physical Address:
> -# 8000'0000 (bank0)
> -# A000/0000 (bank1)
> -# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
> -# (mem base + reserved)
> -
> -# For use with external or internal boots.
> -CONFIG_SYS_TEXT_BASE = 0x80008000
Removing needless crap is a very good thing, but does not
belong to this patch, is it?
> diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
> index ebb572e..f444a7c 100644
> --- a/include/configs/omap3_beagle.h
> +++ b/include/configs/omap3_beagle.h
> @@ -390,4 +390,59 @@
>
> #define CONFIG_OMAP3_SPI
>
> +/* Defines for SPL */
> +#define CONFIG_SPL
> +#define CONFIG_SPL_NAND_SIMPLE
> +#define CONFIG_SPL_TEXT_BASE 0x40200800
> +#define CONFIG_SPL_MAX_SIZE (45 * 1024)
> +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
> +
> +#define CONFIG_SPL_BSS_START_ADDR 0x80000000
> +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
> +
> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address
> 0x60000 */
> +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
> +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
> +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
> +
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBDISK_SUPPORT
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_MMC_SUPPORT
> +#define CONFIG_SPL_FAT_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_NAND_SUPPORT
> +#define CONFIG_SPL_POWER_SUPPORT
> +#define CONFIG_SPL_OMAP3_POP_PROBE
> +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
> +
> +/* NAND boot config */
> +#define CONFIG_SYS_NAND_5_ADDR_CYCLE
> +#define CONFIG_SYS_NAND_PAGE_COUNT 64
> +#define CONFIG_SYS_NAND_PAGE_SIZE 2048
> +#define CONFIG_SYS_NAND_OOBSIZE 64
> +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
> +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
> + 10, 11, 12, 13}
> +#define CONFIG_SYS_NAND_ECCSIZE 512
> +#define CONFIG_SYS_NAND_ECCBYTES 3
> +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
> + CONFIG_SYS_NAND_ECCSIZE)
> +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
> + CONFIG_SYS_NAND_ECCSTEPS)
> +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
> +
> +/*
> + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
> + * 64 bytes before this address should be set aside for u-boot.img's
> + * header. That is 0x800FFFC0--0x80100000 should not be used for any
> + * other needs.
> + */
> +#define CONFIG_SYS_TEXT_BASE 0x80100000
> +#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
> +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
> +
> #endif /* __CONFIG_H */
--
Regards,
Igor.
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
