On 11/08/2011 12:06 AM, Igor Grinberg wrote:
> Hi Tom,
> 
> On 11/07/11 22:05, Tom Rini wrote:
>> This changes to making the board be responsible for providing the
>> memory initialization timings in SPL and converts the devkit8000
>> to this framework.  In SPL we try and initialize both CS0 and CS1.
>>
>> Cc: Frederik Kriewitz <frede...@kriewitz.eu>
>> Signed-off-by: Tom Rini <tr...@ti.com>
>> ---
>>  arch/arm/cpu/armv7/omap3/sdrc.c             |   28 
>> ++++++++++++++------------
>>  arch/arm/include/asm/arch-omap3/mem.h       |   26 -------------------------
>>  arch/arm/include/asm/arch-omap3/sys_proto.h |    1 +
>>  board/timll/devkit8000/devkit8000.c         |   21 ++++++++++++++++++++
>>  include/configs/devkit8000.h                |    4 ---
>>  5 files changed, 37 insertions(+), 43 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c 
>> b/arch/arm/cpu/armv7/omap3/sdrc.c
>> index 2756024..a27b4b1 100644
>> --- a/arch/arm/cpu/armv7/omap3/sdrc.c
>> +++ b/arch/arm/cpu/armv7/omap3/sdrc.c
>> @@ -148,6 +148,18 @@ void do_sdrc_init(u32 cs, u32 early)
>>      sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
>>      sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
>>  
>> +    /*
>> +     * When called in the early context this may be SPL and we will
>> +     * need to set all of the timings.  This ends up being board
>> +     * specific so we call a helper function to take care of this
>> +     * for us.  Otherwise, to be safe, we need to copy the settings
>> +     * from the first bank to the second.  We will setup CS0,
>> +     * then set cs_cfg to the appropriate value then try and
>> +     * setup CS1.
>> +     */
>> +#ifdef CONFIG_SPL_BUILD
>> +    get_board_mem_timings(&mcfg, &ctrla, &ctrlb, &rfr_ctrl, &mr);
>> +#endif
>>      if (early) {
>>              /* reset sdrc controller */
>>              writel(SOFTRESET, &sdrc_base->sysconfig);
>> @@ -164,22 +176,12 @@ void do_sdrc_init(u32 cs, u32 early)
>>  
>>              writel(ENADLL | DLLPHASE_90, &sdrc_base->dlla_ctrl);
>>              sdelay(0x20000);
>> -/* As long as V_MCFG and V_RFR_CTRL is not defined for all OMAP3 boards we 
>> need
>> - * to prevent this to be build in non-SPL build */
>>  #ifdef CONFIG_SPL_BUILD
>> -            /*
>> -             * If we use a SPL there is no x-loader nor config header so
>> -             * we have to do the job ourselfs
>> -             */
>> -
>> -            mcfg = V_MCFG;
>> -            ctrla = V_ACTIMA_165;
>> -            ctrlb = V_ACTIMB_165;
>> -            rfr_ctrl = V_RFR_CTRL;
>> -            mr = V_MR;
>> -
>>              write_sdrc_timings(CS0, sdrc_actim_base0, mcfg, ctrla, ctrlb,
>>                              rfr_ctrl, mr);
>> +            make_cs1_contiguous();
>> +            write_sdrc_timings(CS0, sdrc_actim_base1, mcfg, ctrla, ctrlb,
>> +                            rfr_ctrl, mr);
>>  #endif
>>  
>>      }
>> diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
>> b/arch/arm/include/asm/arch-omap3/mem.h
>> index a55553c..8c6dc3f 100644
>> --- a/arch/arm/include/asm/arch-omap3/mem.h
>> +++ b/arch/arm/include/asm/arch-omap3/mem.h
>> @@ -198,32 +198,6 @@ enum {
>>              (NUMONYX_XSR_165 << 0) | (NUMONYX_TXP_165 << 8) | \
>>              (NUMONYX_TWTR_165 << 16))
>>  
>> -#ifdef CONFIG_OMAP3_INFINEON_DDR
>> -#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
>> -#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
>> -#endif
>> -
>> -#ifdef CONFIG_OMAP3_MICRON_DDR
>> -#define V_ACTIMA_165                MICRON_V_ACTIMA_165
>> -#define V_ACTIMB_165                MICRON_V_ACTIMB_165
>> -#define V_MCFG                      MICRON_V_MCFG_165
>> -#define V_RFR_CTRL          SDP_3430_SDRC_RFR_CTRL_165MHz
>> -#define V_MR                        MICRON_V_MR_165
>> -#endif
>> -
>> -#ifdef CONFIG_OMAP3_NUMONYX_DDR
>> -#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
>> -#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
>> -#endif
>> -
>> -#if !defined(V_ACTIMA_165) || !defined(V_ACTIMB_165)
>> -#error "Please choose the right DDR type in config header"
>> -#endif
>> -
>> -#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
>> -#error "Please choose the right DDR type in config header"
>> -#endif
>> -
>>  /*
>>   * GPMC settings -
>>   * Definitions is as per the following format
>> diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h 
>> b/arch/arm/include/asm/arch-omap3/sys_proto.h
>> index 9e64410..a53d205 100644
>> --- a/arch/arm/include/asm/arch-omap3/sys_proto.h
>> +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
>> @@ -38,6 +38,7 @@ void per_clocks_enable(void);
>>  void memif_init(void);
>>  void sdrc_init(void);
>>  void do_sdrc_init(u32, u32);
>> +void get_board_mem_timings(u32 *, u32 *, u32 *, u32 *, u32 *);
> 
> This is kind of API declaration, so it is not obvious what
> values it takes and what should be the order of values here.
> Can this declaration also have variable names, so one would
> not have to look at the function call to understand what values
> should be supplied and what is the order?

Not a problem, just following existing style, but I'll change it (and
identify_pop_memory()). for v2

-- 
Tom
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