MT8512 currently declares a separate U_BOOT_DRIVER, mtk_clk_tree,
probe() function and compatible table for each clock gate controller,
despite all of them sharing the same implementation.

Convert MT8512 to use the generic mtk_gate_clk_data infrastructure.
This allows the topckgen-cg and infracfg clock gate controllers to
share a single generic driver.

No functional change intended.

Signed-off-by: Julien Stephan <[email protected]>
---
 drivers/clk/mediatek/clk-mt8512.c | 52 +++++++++++++++++----------------------
 1 file changed, 23 insertions(+), 29 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8512.c 
b/drivers/clk/mediatek/clk-mt8512.c
index 88c55e5ac6c..031c3f87d72 100644
--- a/drivers/clk/mediatek/clk-mt8512.c
+++ b/drivers/clk/mediatek/clk-mt8512.c
@@ -830,16 +830,18 @@ static int mt8512_topckgen_probe(struct udevice *dev)
        return mtk_common_clk_init(dev, &mt8512_topckgen_clk_tree);
 }
 
-static int mt8512_topckgen_cg_probe(struct udevice *dev)
-{
-       return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, top_clks,
-                                       ARRAY_SIZE(top_clks), 0);
-}
+MTK_GATE_CLK_DATA(top_clks);
+MTK_GATE_CLK_DATA(infra_clks);
 
-static int mt8512_infracfg_probe(struct udevice *dev)
+static int mt8512_clk_gate_probe(struct udevice *dev)
 {
-       return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, infra_clks,
-                                       ARRAY_SIZE(infra_clks), 0);
+       struct mtk_gate_clk_data *data;
+
+       data = (void *)dev_get_driver_data(dev);
+
+       return mtk_common_clk_gate_init(dev, &mt8512_clk_tree,
+                                       data->gates, data->num_gates,
+                                       data->gates[0].id);
 }
 
 static const struct udevice_id mt8512_apmixed_compat[] = {
@@ -852,13 +854,15 @@ static const struct udevice_id mt8512_topckgen_compat[] = 
{
        { }
 };
 
-static const struct udevice_id mt8512_topckgen_cg_compat[] = {
-       { .compatible = "mediatek,mt8512-topckgen-cg", },
-       { }
-};
-
-static const struct udevice_id mt8512_infracfg_compat[] = {
-       { .compatible = "mediatek,mt8512-infracfg", },
+static const struct udevice_id mt8512_clk_gate_compat[] = {
+       {
+               .compatible = "mediatek,mt8512-topckgen-cg",
+               .data = (ulong)&top_clks_data
+       },
+       {
+               .compatible = "mediatek,mt8512-infracfg",
+               .data = (ulong)&infra_clks_data
+       },
        { }
 };
 
@@ -884,21 +888,11 @@ U_BOOT_DRIVER(mt8512_clk_topckgen) = {
        .flags = DM_FLAG_PRE_RELOC,
 };
 
-U_BOOT_DRIVER(mt8512_clk_topckgen_cg) = {
-       .name = "mt8512-topckgen-cg",
-       .id = UCLASS_CLK,
-       .of_match = mt8512_topckgen_cg_compat,
-       .probe = mt8512_topckgen_cg_probe,
-       .priv_auto      = sizeof(struct mtk_cg_priv),
-       .ops = &mtk_clk_gate_ops,
-       .flags = DM_FLAG_PRE_RELOC,
-};
-
-U_BOOT_DRIVER(mt8512_clk_infracfg) = {
-       .name = "mt8512-infracfg",
+U_BOOT_DRIVER(mt8512_clk_gate) = {
+       .name = "mt8512-gate-clk",
        .id = UCLASS_CLK,
-       .of_match = mt8512_infracfg_compat,
-       .probe = mt8512_infracfg_probe,
+       .of_match = mt8512_clk_gate_compat,
+       .probe = mt8512_clk_gate_probe,
        .priv_auto      = sizeof(struct mtk_cg_priv),
        .ops = &mtk_clk_gate_ops,
        .flags = DM_FLAG_PRE_RELOC,

-- 
2.54.0

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