This patch adds am654_sdhci_set_control_reg to am654_sdhci.
This is required to fix UHS_MODE_SELECT for TI K3 boards.
If any of HIGH_SPEED_ENA, V1P8_SIGNAL_ENA, UHS_MODE_SELECT
are set, then data will be launched on the pos-edge of the
clock.
Since K3 SoCs did not meet timing requirements for High Speed
SDR mode at rising clock edge, none of these three should be
set, therefore limit UHS_MODE_SELECT to only be set for modes
> MMC_HS_52.
This fixes MMC write issue on am64x evm at mode High Speed
SDR.
Signed-off-by: Judith Mendez <j...@ti.com>
---
drivers/mmc/am654_sdhci.c | 15 +++++++++++++--
drivers/mmc/sdhci.c | 2 +-
include/sdhci.h | 1 +
3 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 28d82afd012..0df3568f073 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -523,13 +523,24 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8
opcode)
return 0;
}
#endif
+
+void am654_sdhci_set_control_reg(struct sdhci_host *host)
+{
+ struct mmc *mmc = host->mmc;
+
+ sdhci_set_voltage(host);
+
+ if (mmc->selected_mode > MMC_HS_52)
+ sdhci_set_uhs_timing(host);
+}
+
const struct sdhci_ops am654_sdhci_ops = {
#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.platform_execute_tuning = am654_sdhci_execute_tuning,
#endif
.deferred_probe = am654_sdhci_deferred_probe,
.set_ios_post = &am654_sdhci_set_ios_post,
- .set_control_reg = sdhci_set_control_reg,
+ .set_control_reg = am654_sdhci_set_control_reg,
.write_b = am654_sdhci_write_b,
};
@@ -589,7 +600,7 @@ const struct sdhci_ops j721e_4bit_sdhci_ops = {
#endif
.deferred_probe = am654_sdhci_deferred_probe,
.set_ios_post = &j721e_4bit_sdhci_set_ios_post,
- .set_control_reg = sdhci_set_control_reg,
+ .set_control_reg = am654_sdhci_set_control_reg,
.write_b = am654_sdhci_write_b,
};
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 4833b5158c7..b5d7a8b6c83 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -547,7 +547,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host)
sdhci_writew(host, reg, SDHCI_HOST_CONTROL2);
}
-static void sdhci_set_voltage(struct sdhci_host *host)
+void sdhci_set_voltage(struct sdhci_host *host)
{
if (IS_ENABLED(CONFIG_MMC_IO_VOLTAGE)) {
struct mmc *mmc = (struct mmc *)host->mmc;
diff --git a/include/sdhci.h b/include/sdhci.h
index 31a49ca6a2f..2372697b743 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -518,6 +518,7 @@ void sdhci_set_uhs_timing(struct sdhci_host *host);
/* Export the operations to drivers */
int sdhci_probe(struct udevice *dev);
int sdhci_set_clock(struct mmc *mmc, unsigned int clock);
+void sdhci_set_voltage(struct sdhci_host *host);
/**
* sdhci_set_control_reg - Set control registers
--
2.49.0
