Hi Jagan,
On 2024-11-04 08:29, Jagan Teki wrote:
> On Sun, 3 Nov 2024 at 02:08, Jonas Karlman <jo...@kwiboo.se> wrote:
>>
>> Implement checkboard() to print current SoC model used by a board,
>> e.g. one of:
>>
>> SoC: RK3582 v1
>> SoC: RK3588 v0
>> SoC: RK3588 v1
>> SoC: RK3588S v0
>> SoC: RK3588S v1
>> SoC: RK3588S2 v1
>>
>> when U-Boot proper is running.
>>
>> U-Boot 2025.01-rc1 (Nov 02 2024 - 20:19:01 +0000)
>>
>> Model: Generic RK3588S/RK3588
>> SoC: RK3588S2 v1
>> DRAM: 8 GiB
>>
>> Information about the SoC model, variant and version is read from OTP.
>>
>> Also update rk3588s-u-boot.dtsi to include OTP in U-Boot pre-reloc phase,
>> where checkboard() is called.
>>
>> Signed-off-by: Jonas Karlman <jo...@kwiboo.se>
>> ---
>> v2:
>> - Update commit message
>> - Update code comments
>> - Drop generic-rk3588_defconfig change
>> ---
>> arch/arm/dts/rk3588s-u-boot.dtsi | 4 ++
>> arch/arm/mach-rockchip/rk3588/rk3588.c | 58 ++++++++++++++++++++++++++
>> 2 files changed, 62 insertions(+)
>>
>> diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi
> b/arch/arm/dts/rk3588s-u-boot.dtsi
>> index 09d8b311cec5..8880d162b11c 100644
>> --- a/arch/arm/dts/rk3588s-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3588s-u-boot.dtsi
>> @@ -69,6 +69,10 @@
>> bootph-all;
>> };
>>
>> +&otp {
>> + bootph-some-ram;
>> +};
>> +
>> &pcfg_pull_down {
>> bootph-all;
>> };
>> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
> b/arch/arm/mach-rockchip/rk3588/rk3588.c
>> index e2dac2a5b806..f9da7a6f1477 100644
>> --- a/arch/arm/mach-rockchip/rk3588/rk3588.c
>> +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
>> @@ -4,6 +4,8 @@
>> * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
>> */
>>
>> +#include <dm.h>
>> +#include <misc.h>
>> #include <spl.h>
>> #include <asm/armv8/mmu.h>
>> #include <asm/arch-rockchip/bootrom.h>
>> @@ -178,3 +180,59 @@ int arch_cpu_init(void)
>> return 0;
>> }
>> #endif
>> +
>> +#define RK3588_OTP_CPU_CODE_OFFSET 0x02
>> +#define RK3588_OTP_SPECIFICATION_OFFSET 0x06
>> +#define RK3588_OTP_CPU_VERSION_OFFSET 0x1c
>> +
>> +int checkboard(void)
>> +{
>> + u8 cpu_code[2], specification, package, cpu_version;
>> + struct udevice *dev;
>> + char suffix[3];
>> + int ret;
>> +
>> + ret = uclass_get_device_by_driver(UCLASS_MISC,
>> + DM_DRIVER_GET(rockchip_otp),
> &dev);
>> + if (ret) {
>> + debug("%s: could not find otp device, ret=%d\n",
> __func__, ret);
>> + return 0;
>> + }
>> +
>> + /* cpu-code: SoC model, e.g. 0x35 0x82 or 0x35 0x88 */
>> + ret = misc_read(dev, RK3588_OTP_CPU_CODE_OFFSET, cpu_code, 2);
>> + if (ret < 0) {
>> + debug("%s: could not read cpu-code, ret=%d\n", __func__,
> ret);
>> + return 0;
>> + }
>> +
>> + /* specification: SoC variant, e.g. 0xA for RK3588J and 0x13 for
> RK3588S */
>> + ret = misc_read(dev, RK3588_OTP_SPECIFICATION_OFFSET,
> &specification, 1);
>
> Any register to find the operating temperature of the chip?
Not that I know of or have looked into, downstream kernel have opp-info
and leakage nvmem cells, and similar exists on rk356x, however my rk356x
boards all had 0x0 in opp-info cells.
Regards,
Jonas
>
> Jagan.
>
