On Thu, Dec 7, 2023 at 2:51 PM Marek Vasut <ma...@denx.de> wrote: > > In case the Buck5 and Buck6 regulators which supply DRAM Vdd1 and Vdd2/Vddq > respectively operate in automatic PWM/PFM mode, the DRAM EDAC detects more > correctable errors than if the regulators operate in forced PWM only mode. > Force DRAM regulators to forced PWM mode only to stop tempting the DRAM. > > Signed-off-by: Marek Vasut <ma...@denx.de>
Reviewed-by: Fabio Estevam <feste...@gmail.com>
