Andre Schwarz <andre.schw...@matrix-vision.de> wrote on 2010/11/15 10:57:30: > > On 11/12/2010 08:31 PM, Scott Wood wrote: > > On Fri, 12 Nov 2010 13:26:17 -0600 > > Kumar Gala<ga...@kernel.crashing.org> wrote: > > > > > >> On Nov 12, 2010, at 11:22 AM, Scott Wood wrote: > >> > >> > >>> On Fri, 12 Nov 2010 09:58:53 -0600 > >>> Kumar Gala<ga...@kernel.crashing.org> wrote: > >>> > >>>> We only do the 'twi' for loads/in_beX not stores/out_beX. > >>>> > >>> Yes, and the readback is a load. > >>> > >> following the store with a load should be sufficient I dont think we need > >> the twi in this case. > >> > > Do we ever need it, or is guarded+cache inhibited sufficient to > > completely hold up execution of anything beyond the load? > > > > Sorry for being insistent : > Is there any explanation why this issue only came up on Jocke's MPC8321 > (?) and my MPC8377 ?
Has anyone else tested 83xx on NOR? My guess is that cache line crossing shifted so that now the CPU doesn't need to read in a new cache at the critical part. > > As mentioned here > (http://lists.denx.de/pipermail/u-boot/2010-November/081459.html) > there's still a mysterious issue which might have the same root cause. > Again : USB is working fine under Linux - it's an U-Boot only issue. > > Is anybody willing to have a closer look - I'm completely stuck here. Nope, don't use USB. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
