On 10/12/2010 05:12 PM, Wolfgang Denk wrote: > Dear stefano babic, > > In message <4cb4776d.8050...@denx.de> you wrote: >> >>> Does it work with both "dcache on" and "dcache off" settings? >> >> Well, as there is not yet support for L2-Cache on the MX51, we can say >> yes ;-). However, this range of memory is used directly from the IPU >> processor and not by the CPU, as well as in Linux without calling any >> function to invalidate the cache. But I agree, it should be tested again >> when support for L2-cache will be integrated. > > What about L1 cache? Have Heiko's chache patches been adapted for MX5 > yet?
No, they are not - however, probably the cache functions in arch/arm/cpu/omap3 can be reused for the i.MX51, too. Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
