Dear Stefano Babic, In message <1286875504-9058-4-git-send-email-sba...@denx.de> you wrote: > Add framebuffer driver for the MX51 processor > working on the IPUv3 internal graphic processor.
Please add reference to original sources. > +/* > + * Allocates the DRAM memory for the frame buffer. This buffer is > remapped > + * into a non-cached, non-buffered, memory region to allow palette and pixel > + * writes to occur without flushing the cache. Once this area is remapped, > + * all virtual memory access to the video memory should occur at the new > region. Is this comment still valid for the U-Boot port? Does it work with both "dcache on" and "dcache off" settings? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It is dangerous to be right on a subject on which the established authorities are wrong. -- Voltaire _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
