Hi Philippe,
On 06.05.19 14:38, Philippe REYNES wrote:
Hi Stefan,
On 03.05.19 19:43, Philippe Reynes wrote:
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.
Signed-off-by: Philippe Reynes <philippe.rey...@softathome.com>
Just curious: Why is this the case? Is this also what's done in
the Linux DT version?
From my understanding, in the linux kernel, the driver doesn't compute
the timeout for the watchdog counter register. Every second, the driver
set the maximum value in the watchdog counter register and compute a
logical tick. If this tick decrease below zero, the watchdog isn't
restarted, so when the watchdog counter reach zero, the board is resetted.
In u-boot, the driver compute the expected timeout and set it
in the watchdog register.
I see. But why "should the watchdog use a clock at 50MHz" instead of
the default 200MHz (from your commit text)?
I'm checking as this change most likely results in a DT difference in
the U-Boot vs the Linux version, which should be avoided.
Thanks,
Stefan
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